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authorJulian Brown <julian@codesourcery.com>2006-08-16 10:32:40 +0000
committerJulian Brown <julian@codesourcery.com>2006-08-16 10:32:40 +0000
commitfcf2bd0a5d19c29541aa83bf142f25d06bbccba2 (patch)
tree8f304c0be89702473b69e286670c764027c8c094
parent92b7f90e36f10d8472cddc6ca8771a870dbd59b2 (diff)
downloadbinutils-redhat-fcf2bd0a5d19c29541aa83bf142f25d06bbccba2.tar.gz
* gas/arm/noarm.s: Add test for disabled ARM insns.
* gas/arm/noarm.d: Drive test for above. * gas/arm/noarm.l: Expected error output.
-rw-r--r--gas/testsuite/ChangeLog6
-rw-r--r--gas/testsuite/gas/arm/noarm.d3
-rw-r--r--gas/testsuite/gas/arm/noarm.l3
-rw-r--r--gas/testsuite/gas/arm/noarm.s13
4 files changed, 25 insertions, 0 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 0e1cf6f7bf..35220b60d6 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2006-08-16 Julian Brown <julian@codesourcery.com>
+
+ * gas/arm/noarm.s: Add test for disabled ARM insns.
+ * gas/arm/noarm.d: Drive test for above.
+ * gas/arm/noarm.l: Expected error output.
+
2006-08-15 Thiemo Seufer <ths@mips.com>
Nigel Stephens <nigel@mips.com>
David Ung <davidu@mips.com>
diff --git a/gas/testsuite/gas/arm/noarm.d b/gas/testsuite/gas/arm/noarm.d
new file mode 100644
index 0000000000..ae34f8342f
--- /dev/null
+++ b/gas/testsuite/gas/arm/noarm.d
@@ -0,0 +1,3 @@
+# name: Disallow ARM instructions on V7M
+# as:
+# error-output: noarm.l
diff --git a/gas/testsuite/gas/arm/noarm.l b/gas/testsuite/gas/arm/noarm.l
new file mode 100644
index 0000000000..edc59a2d53
--- /dev/null
+++ b/gas/testsuite/gas/arm/noarm.l
@@ -0,0 +1,3 @@
+[^:]*: Assembler messages:
+[^:]*:12: Error: selected processor does not support ARM opcodes
+[^:]*:13: Error: attempt to use an ARM instruction on a Thumb-only processor -- `nop'
diff --git a/gas/testsuite/gas/arm/noarm.s b/gas/testsuite/gas/arm/noarm.s
new file mode 100644
index 0000000000..3dadd4468f
--- /dev/null
+++ b/gas/testsuite/gas/arm/noarm.s
@@ -0,0 +1,13 @@
+ .arch armv7a
+ .syntax unified
+ .text
+func:
+ nop
+ movw r0, #0
+
+ .arch armv7
+ .thumb
+ nop
+ movw r0, #0
+ .arm
+ nop