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| author | Eric B. Weddington <eric.weddington@atmel.com> | 2011-03-22 18:10:39 +0000 |
|---|---|---|
| committer | Eric B. Weddington <eric.weddington@atmel.com> | 2011-03-22 18:10:39 +0000 |
| commit | e81a5b49b547af521be99e93f8acd941b477deb3 (patch) | |
| tree | e1f5cc242ecf50bd4f6fb6986a694f29ca7920f9 /bfd/elf32-avr.c | |
| parent | f2a20acf115da27668ae9b158c6c3547ca7e5222 (diff) | |
| download | binutils-redhat-e81a5b49b547af521be99e93f8acd941b477deb3.tar.gz | |
/bfd:
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* archures.c: Add AVR XMEGA architecture information.
* cpu-avr.c (arch_info_struct): Likewise.
* elf32-avr.c (bfd_elf_avr_final_write_processing): Likewise.
(elf32_avr_object_p): Likewise.
/gas:
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* config/tc-avr.c (struct avr_opcodes_s): Add opcode field.
(AVR_INSN): Change definition to match.
(avr_opcodes): Likewise, change to match.
(mcu_types): Add XMEGA architecture names and new XMEGA device names.
(md_show_usage): Add XMEGA architecture names.
(avr_operand): Add 'E' constraint for DES instruction of XMEGA devices.
Add support for SPM Z+ instruction.
* doc/c-avr.texi: Add documentation for XMEGA architectures and
devices.
/include/opcode:
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* avr.h (AVR_ISA_SPMX,AVR_ISA_DES,AVR_ISA_M256,AVR_ISA_XMEGA):
New instruction set flags.
(AVR_INSN): Add new instructions for SPM Z+, DES for XMEGA.
/ld:
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* Makefile.am (ALL_EMULATION_SOURCES): Add AVR XMEGA architectures.
(eavrxmega?.c): Likewise.
* configure.tgt (targ_extra_emuls): Likewise.
* emulparams/avrxmega1.sh: New file.
* emulparams/avrxmega2.sh: Likewise.
* emulparams/avrxmega3.sh: Likewise.
* emulparams/avrxmega4.sh: Likewise.
* emulparams/avrxmega5.sh: Likewise.
* emulparams/avrxmega6.sh: Likewise.
* emulparams/avrxmega7.sh: Likewise.
* emultempl/avrelf.em (avr_elf_${EMULATION_NAME}_before_allocation):
Add avrxmega6, avrxmega7 to list of architectures for no stubs.
/opcodes:
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* avr-dis.c (avr_operand): Add opcode_str parameter. Check for
post-increment to support LPM Z+ instruction. Add support for 'E'
constraint for DES instruction.
(print_insn_avr): Adjust calls to avr_operand. Rename variable.
Diffstat (limited to 'bfd/elf32-avr.c')
| -rw-r--r-- | bfd/elf32-avr.c | 56 |
1 files changed, 56 insertions, 0 deletions
diff --git a/bfd/elf32-avr.c b/bfd/elf32-avr.c index ecc60de7ac..1bc40c4403 100644 --- a/bfd/elf32-avr.c +++ b/bfd/elf32-avr.c @@ -1298,6 +1298,34 @@ bfd_elf_avr_final_write_processing (bfd *abfd, case bfd_mach_avr6: val = E_AVR_MACH_AVR6; break; + + case bfd_mach_avrxmega1: + val = E_AVR_MACH_XMEGA1; + break; + + case bfd_mach_avrxmega2: + val = E_AVR_MACH_XMEGA2; + break; + + case bfd_mach_avrxmega3: + val = E_AVR_MACH_XMEGA3; + break; + + case bfd_mach_avrxmega4: + val = E_AVR_MACH_XMEGA4; + break; + + case bfd_mach_avrxmega5: + val = E_AVR_MACH_XMEGA5; + break; + + case bfd_mach_avrxmega6: + val = E_AVR_MACH_XMEGA6; + break; + + case bfd_mach_avrxmega7: + val = E_AVR_MACH_XMEGA7; + break; } elf_elfheader (abfd)->e_machine = EM_AVR; @@ -1360,6 +1388,34 @@ elf32_avr_object_p (bfd *abfd) case E_AVR_MACH_AVR6: e_set = bfd_mach_avr6; break; + + case E_AVR_MACH_XMEGA1: + e_set = bfd_mach_avrxmega1; + break; + + case E_AVR_MACH_XMEGA2: + e_set = bfd_mach_avrxmega2; + break; + + case E_AVR_MACH_XMEGA3: + e_set = bfd_mach_avrxmega3; + break; + + case E_AVR_MACH_XMEGA4: + e_set = bfd_mach_avrxmega4; + break; + + case E_AVR_MACH_XMEGA5: + e_set = bfd_mach_avrxmega5; + break; + + case E_AVR_MACH_XMEGA6: + e_set = bfd_mach_avrxmega6; + break; + + case E_AVR_MACH_XMEGA7: + e_set = bfd_mach_avrxmega7; + break; } } return bfd_default_set_arch_mach (abfd, bfd_arch_avr, |