BFD and include/coff support for tic54x target.

14 files changed, 932 insertions, 7 deletions

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index a1f2d4f096..ab63a3529c 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,18 @@
+2000-04-07  Timothy Wall  <twall@cygnus.com>
+
+	* targets.c: Added vecs for tic54x.
+	* reloc.c: Added relocs for tic54x.
+	* libbfd.h: Regenerated.
+	* configure: Add TI COFF vecs for tic54x.
+	* configure.in: Ditto.
+	* config.bfd (targ_cpu): Recognize new tic54x target.
+	* coffcode.h (coff_slurp_symbol_table): Additions for TI COFF handling.
+	* bfd-in2.h: Add tic54x target and relocations.
+	* Makefile.am, Makefile.in: Add tic54x target.
+	* archures.c (bfd_archures_list): Add tic54x target.
+	* coff-tic54x.c: New.
+	* cpu-tic54x.c: New.
+	
 2000-04-06  Michael Snyder  <msnyder@seadog.cygnus.com>
 
 	* elfcore.h (elf_core_file_p): call backend_object_p which
diff --git a/bfd/Makefile.am b/bfd/Makefile.am
index b8537dba4a..b3a157ade4 100644
--- a/bfd/Makefile.am
+++ b/bfd/Makefile.am
@@ -66,6 +66,7 @@ ALL_MACHINES = \
 	cpu-sh.lo \
 	cpu-sparc.lo \
 	cpu-tic30.lo \
+	cpu-tic54x.lo \
 	cpu-tic80.lo \
 	cpu-v850.lo \
 	cpu-vax.lo \
@@ -103,6 +104,7 @@ ALL_MACHINES_CFILES = \
 	cpu-sh.c \
 	cpu-sparc.c \
 	cpu-tic30.c \
+	cpu-tic54x.c \
 	cpu-tic80.c \
 	cpu-v850.c \
 	cpu-vax.c \
@@ -145,6 +147,7 @@ BFD32_BACKENDS = \
 	coff-stgo32.lo \
 	coff-svm68k.lo \
 	coff-tic30.lo \
+	coff-tic54x.lo \
 	coff-tic80.lo \
 	coff-u68k.lo \
 	coff-we32k.lo \
@@ -275,6 +278,7 @@ BFD32_BACKENDS_CFILES = \
 	coff-stgo32.c \
 	coff-svm68k.c \
 	coff-tic30.c \
+	coff-tic54x.c \
 	coff-tic80.c \
 	coff-u68k.c \
 	coff-we32k.c \
@@ -715,6 +719,7 @@ cpu-sh.lo: cpu-sh.c
 cpu-sparc.lo: cpu-sparc.c
 cpu-tic30.lo: cpu-tic30.c
 cpu-tic80.lo: cpu-tic80.c
+cpu-tic54x.lo: cpu-tic54x.c
 cpu-v850.lo: cpu-v850.c
 cpu-vax.lo: cpu-vax.c
 cpu-we32k.lo: cpu-we32k.c
@@ -809,6 +814,8 @@ coff-tic30.lo: coff-tic30.c $(INCDIR)/bfdlink.h $(INCDIR)/coff/tic30.h \
   $(INCDIR)/coff/internal.h libcoff.h coffcode.h coffswap.h
 coff-tic80.lo: coff-tic80.c $(INCDIR)/bfdlink.h $(INCDIR)/coff/tic80.h \
   $(INCDIR)/coff/internal.h libcoff.h coffcode.h coffswap.h
+coff-tic54x.lo: coff-tic54x.c $(INCDIR)/bfdlink.h $(INCDIR)/coff/tic54x.h \
+  $(INCDIR)/coff/internal.h libcoff.h coffcode.h coffswap.h
 coff-u68k.lo: coff-u68k.c coff-m68k.c $(INCDIR)/coff/m68k.h \
   $(INCDIR)/coff/internal.h libcoff.h $(INCDIR)/bfdlink.h \
   coffcode.h coffswap.h
diff --git a/bfd/Makefile.in b/bfd/Makefile.in
index faa84591ab..b229d16d35 100644
--- a/bfd/Makefile.in
+++ b/bfd/Makefile.in
@@ -184,6 +184,7 @@ ALL_MACHINES = \
 	cpu-sh.lo \
 	cpu-sparc.lo \
 	cpu-tic30.lo \
+	cpu-tic54x.lo \
 	cpu-tic80.lo \
 	cpu-v850.lo \
 	cpu-vax.lo \
@@ -222,6 +223,7 @@ ALL_MACHINES_CFILES = \
 	cpu-sh.c \
 	cpu-sparc.c \
 	cpu-tic30.c \
+	cpu-tic54x.c \
 	cpu-tic80.c \
 	cpu-v850.c \
 	cpu-vax.c \
@@ -265,6 +267,7 @@ BFD32_BACKENDS = \
 	coff-stgo32.lo \
 	coff-svm68k.lo \
 	coff-tic30.lo \
+	coff-tic54x.lo \
 	coff-tic80.lo \
 	coff-u68k.lo \
 	coff-we32k.lo \
@@ -396,6 +399,7 @@ BFD32_BACKENDS_CFILES = \
 	coff-stgo32.c \
 	coff-svm68k.c \
 	coff-tic30.c \
+	coff-tic54x.c \
 	coff-tic80.c \
 	coff-u68k.c \
 	coff-we32k.c \
@@ -1262,6 +1266,7 @@ cpu-sh.lo: cpu-sh.c
 cpu-sparc.lo: cpu-sparc.c
 cpu-tic30.lo: cpu-tic30.c
 cpu-tic80.lo: cpu-tic80.c
+cpu-tic54x.lo: cpu-tic54x.c
 cpu-v850.lo: cpu-v850.c
 cpu-vax.lo: cpu-vax.c
 cpu-we32k.lo: cpu-we32k.c
@@ -1356,6 +1361,9 @@ coff-tic30.lo: coff-tic30.c $(INCDIR)/bfdlink.h $(INCDIR)/coff/tic30.h \
   $(INCDIR)/coff/internal.h libcoff.h coffcode.h coffswap.h
 coff-tic80.lo: coff-tic80.c $(INCDIR)/bfdlink.h $(INCDIR)/coff/tic80.h \
   $(INCDIR)/coff/internal.h libcoff.h coffcode.h coffswap.h
+coff-tic54x.lo: coff-tic54x.c $(INCDIR)/bfdlink.h $(INCDIR)/coff/ti.h \
+  $(INCDIR)/coff/tic54x.h $(INCDIR)/coff/internal.h \
+  libcoff.h coffcode.h coffswap.h
 coff-u68k.lo: coff-u68k.c coff-m68k.c $(INCDIR)/coff/m68k.h \
   $(INCDIR)/coff/internal.h libcoff.h $(INCDIR)/bfdlink.h \
   coffcode.h coffswap.h
diff --git a/bfd/archures.c b/bfd/archures.c
index 7462592742..d24ee820b7 100644
--- a/bfd/archures.c
+++ b/bfd/archures.c
@@ -181,6 +181,7 @@ DESCRIPTION
 .  bfd_arch_ns32k,     {* National Semiconductors ns32000 *}
 .  bfd_arch_w65,       {* WDC 65816 *}
 .  bfd_arch_tic30,     {* Texas Instruments TMS320C30 *}
+.  bfd_arch_tic54x,    {* Texas Instruments TMS320C54X *}
 .  bfd_arch_tic80,     {* TI TMS320c80 (MVP) *}
 .  bfd_arch_v850,      {* NEC V850 *}
 .#define bfd_mach_v850          0
@@ -267,6 +268,7 @@ extern const bfd_arch_info_type bfd_pj_arch;
 extern const bfd_arch_info_type bfd_sh_arch;
 extern const bfd_arch_info_type bfd_sparc_arch;
 extern const bfd_arch_info_type bfd_tic30_arch;
+extern const bfd_arch_info_type bfd_tic54x_arch;
 extern const bfd_arch_info_type bfd_tic80_arch;
 extern const bfd_arch_info_type bfd_vax_arch;
 extern const bfd_arch_info_type bfd_we32k_arch;
@@ -307,6 +309,7 @@ static const bfd_arch_info_type * const bfd_archures_list[] =
   &bfd_sh_arch,
   &bfd_sparc_arch,
   &bfd_tic30_arch,
+  &bfd_tic54x_arch,
   &bfd_tic80_arch,
   &bfd_vax_arch,
   &bfd_we32k_arch,
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index 68e2db5300..06276d3ff2 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -1407,6 +1407,7 @@ enum bfd_architecture
   bfd_arch_ns32k,      /* National Semiconductors ns32000 */
   bfd_arch_w65,        /* WDC 65816 */
   bfd_arch_tic30,      /* Texas Instruments TMS320C30 */
+  bfd_arch_tic54x,     /* Texas Instruments TMS320C54X */
   bfd_arch_tic80,      /* TI TMS320c80 (MVP) */
   bfd_arch_v850,       /* NEC V850 */
 #define bfd_mach_v850          0
@@ -2281,6 +2282,30 @@ significant 8 bits of a 24 bit word are placed into the least
 significant 8 bits of the opcode. */
   BFD_RELOC_TIC30_LDP,
 
+/* This is a 7bit reloc for the tms320c54x, where the least
+significant 7 bits of a 16 bit word are placed into the least
+significant 7 bits of the opcode. */
+  BFD_RELOC_TIC54X_PARTLS7,
+
+/* This is a 9bit DP reloc for the tms320c54x, where the most
+significant 9 bits of a 16 bit word are placed into the least
+significant 9 bits of the opcode. */
+  BFD_RELOC_TIC54X_PARTMS9,
+
+/* This is an extended address 23-bit reloc for the tms320c54x. */
+  BFD_RELOC_TIC54X_23,
+
+/* This is a 16-bit reloc for the tms320c54x, where the least 
+significant 16 bits of a 23-bit extended address are placed into 
+the opcode. */
+  BFD_RELOC_TIC54X_16_OF_23,
+
+/* This is a reloc for the tms320c54x, where the most
+significant 7 bits of a 23-bit extended address are placed into 
+the opcode. */
+  BFD_RELOC_TIC54X_MS7_OF_23,
+
+
 /* This is a 48 bit reloc for the FR30 that stores 32 bits. */
   BFD_RELOC_FR30_48,
 
diff --git a/bfd/coff-tic54x.c b/bfd/coff-tic54x.c
new file mode 100644
index 0000000000..f67343a753
--- /dev/null
+++ b/bfd/coff-tic54x.c
@@ -0,0 +1,680 @@
+/* BFD back-end for TMS320C54X coff binaries.
+   Copyright (C) 1998 Free Software Foundation, Inc.
+   Contributed by Steven Haworth (steve@pm.cse.rmit.edu.au)
+
+   This file is part of BFD, the Binary File Descriptor library.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+   02111-1307, USA.  */
+
+#include "bfd.h"
+#include "sysdep.h"
+#include "libbfd.h"
+#include "bfdlink.h"
+#include "coff/tic54x.h"
+#include "coff/internal.h"
+#include "libcoff.h"
+
+#undef F_LSYMS
+#define	F_LSYMS		F_LSYMS_TICOFF
+
+/*
+  32-bit operations
+  The octet order is screwy.  words are LSB first (LS octet, actually), but
+  longwords are MSW first.  For example, 0x12345678 is encoded 0x5678 in the
+  first word and 0x1234 in the second.  When looking at the data as stored in
+  the COFF file, you would see the octets ordered as 0x78, 0x56, 0x34, 0x12.
+  Don't bother with 64-bits, as there aren't any.
+ */
+static bfd_vma
+tic54x_getl32(addr)
+  register const bfd_byte *addr;
+{
+  unsigned long v;
+  v = (unsigned long) addr[2];
+  v |= (unsigned long) addr[3] << 8;
+  v |= (unsigned long) addr[0] << 16;
+  v |= (unsigned long) addr[1] << 24;
+  return (bfd_vma) v;
+}
+
+static void
+tic54x_putl32 (data, addr)
+     bfd_vma data;
+     register bfd_byte *addr;
+{
+  addr[2] = (bfd_byte)data;
+  addr[3] = (bfd_byte)(data >>  8);
+  addr[0] = (bfd_byte)(data >> 16);
+  addr[1] = (bfd_byte)(data >> 24);
+}
+
+bfd_signed_vma
+tic54x_getl_signed_32 (addr)
+     register const bfd_byte *addr;
+{
+  unsigned long v;
+
+  v = (unsigned long) addr[2];
+  v |= (unsigned long) addr[3] << 8;
+  v |= (unsigned long) addr[0] << 16;
+  v |= (unsigned long) addr[1] << 24;
+#define COERCE32(x) \
+  ((bfd_signed_vma) (long) (((unsigned long) (x) ^ 0x80000000) - 0x80000000))
+  return COERCE32 (v);
+}
+
+static bfd_reloc_status_type
+tic54x_relocation (abfd, reloc_entry, symbol, data, input_section, 
+                   output_bfd, error_message)
+  bfd *abfd ATTRIBUTE_UNUSED;
+  arelent *reloc_entry;
+  asymbol *symbol ATTRIBUTE_UNUSED;
+  PTR data ATTRIBUTE_UNUSED;
+  asection *input_section;
+  bfd *output_bfd;
+  char **error_message ATTRIBUTE_UNUSED;
+{
+  
+  if (output_bfd != (bfd *) NULL)
+    {
+      /* This is a partial relocation, and we want to apply the
+ 	 relocation to the reloc entry rather than the raw data.
+ 	 Modify the reloc inplace to reflect what we now know.  */
+      reloc_entry->address += input_section->output_offset;
+      return bfd_reloc_ok;
+    }
+  return bfd_reloc_continue;
+}
+
+reloc_howto_type tic54x_howto_table[] =
+{
+/* type,rightshift,size (0=byte, 1=short, 2=long),
+   bit size, pc_relative, bitpos, dont complain_on_overflow,
+   special_function, name, partial_inplace, src_mask, dst_mask, pcrel_offset */
+
+  /* NORMAL BANK */
+  /* 16-bit direct reference to symbol's address */
+  HOWTO (R_RELWORD,0,1,16,false,0,complain_overflow_dont,    
+         tic54x_relocation,"REL16",false,0xFFFF,0xFFFF,false),
+
+  /* 7 LSBs of an address */
+  HOWTO (R_PARTLS7,0,1,7,false,0,complain_overflow_dont,
+         tic54x_relocation,"LS7",false,0x007F,0x007F,false),
+
+  /* 9 MSBs of an address */
+  /* TI assembler doesn't shift its encoding, and is thus incompatible */
+  HOWTO (R_PARTMS9,7,1,9,false,0,complain_overflow_dont,
+         tic54x_relocation,"MS9",false,0x01FF,0x01FF,false),
+
+  /* 23-bit relocation */
+  HOWTO (R_EXTWORD,0,2,23,false,0,complain_overflow_dont,
+         tic54x_relocation,"RELEXT",false,0x7FFFFF,0x7FFFFF,false),
+
+  /* 16 bits of 23-bit extended address */
+  HOWTO (R_EXTWORD16,0,1,16,false,0,complain_overflow_dont,
+         tic54x_relocation,"RELEXT16",false,0x7FFFFF,0x7FFFFF,false),
+
+  /* upper 7 bits of 23-bit extended address */
+  HOWTO (R_EXTWORDMS7,16,1,7,false,0,complain_overflow_dont,
+         tic54x_relocation,"RELEXTMS7",false,0x7F,0x7F,false),
+
+  /* ABSOLUTE BANK */
+  /* 16-bit direct reference to symbol's address, absolute */
+  HOWTO (R_RELWORD,0,1,16,false,0,complain_overflow_dont,    
+         tic54x_relocation,"AREL16",false,0xFFFF,0xFFFF,false),
+
+  /* 7 LSBs of an address, absolute */
+  HOWTO (R_PARTLS7,0,1,7,false,0,complain_overflow_dont,
+         tic54x_relocation,"ALS7",false,0x007F,0x007F,false),
+
+  /* 9 MSBs of an address, absolute */
+  /* TI assembler doesn't shift its encoding, and is thus incompatible */
+  HOWTO (R_PARTMS9,7,1,9,false,0,complain_overflow_dont,
+         tic54x_relocation,"AMS9",false,0x01FF,0x01FF,false),
+
+  /* 23-bit direct reference, absolute */
+  HOWTO (R_EXTWORD,0,2,23,false,0,complain_overflow_dont,
+         tic54x_relocation,"ARELEXT",false,0x7FFFFF,0x7FFFFF,false),
+
+  /* 16 bits of 23-bit extended address, absolute */
+  HOWTO (R_EXTWORD16,0,1,16,false,0,complain_overflow_dont,
+         tic54x_relocation,"ARELEXT16",false,0x7FFFFF,0x7FFFFF,false),
+
+  /* upper 7 bits of 23-bit extended address, absolute */
+  HOWTO (R_EXTWORDMS7,16,1,7,false,0,complain_overflow_dont,
+         tic54x_relocation,"ARELEXTMS7",false,0x7F,0x7F,false),
+
+  /* 32-bit relocation exclusively for stabs */
+  HOWTO (R_RELLONG,0,2,32,false,0,complain_overflow_dont,
+         tic54x_relocation,"STAB",false,0xFFFFFFFF,0xFFFFFFFF,false),
+
+};
+
+#define coff_bfd_reloc_type_lookup tic54x_coff_reloc_type_lookup
+
+/* For the case statement use the code values used tc_gen_reloc (defined in
+   bfd/reloc.c) to map to the howto table entries */
+reloc_howto_type *
+tic54x_coff_reloc_type_lookup (abfd, code)
+     bfd *abfd ATTRIBUTE_UNUSED;
+     bfd_reloc_code_real_type code;
+{
+  switch (code)
+    {
+    case BFD_RELOC_16:
+      return &tic54x_howto_table[0];
+    case BFD_RELOC_TIC54X_PARTLS7:
+      return &tic54x_howto_table[1];
+    case BFD_RELOC_TIC54X_PARTMS9:
+      return &tic54x_howto_table[2];
+    case BFD_RELOC_TIC54X_23:
+      return &tic54x_howto_table[3];
+    case BFD_RELOC_TIC54X_16_OF_23:
+      return &tic54x_howto_table[4];
+    case BFD_RELOC_TIC54X_MS7_OF_23:
+      return &tic54x_howto_table[5];
+    case BFD_RELOC_32:
+      return &tic54x_howto_table[12];
+    default:
+      return (reloc_howto_type *) NULL;
+    }
+}
+
+/* Code to turn a r_type into a howto ptr, uses the above howto table. 
+   Called after some initial checking by the tic54x_rtype_to_howto fn below */
+static void
+tic54x_lookup_howto (internal, dst)
+     arelent *internal;
+     struct internal_reloc *dst;
+{
+  unsigned i;
+  int bank = (dst->r_symndx == -1) ? HOWTO_BANK : 0;
+  for (i = 0; i < sizeof tic54x_howto_table/sizeof tic54x_howto_table[0]; i++)
+    {
+      if (tic54x_howto_table[i].type == dst->r_type)
+	{
+	  internal->howto = tic54x_howto_table + i + bank;
+	  return;
+	}
+    }
+
+  (*_bfd_error_handler) (_("Unrecognized reloc type 0x%x"),
+			 (unsigned int) dst->r_type);
+  abort();
+}
+
+#define RELOC_PROCESSING(RELENT,RELOC,SYMS,ABFD,SECT)\
+ tic54x_reloc_processing(RELENT,RELOC,SYMS,ABFD,SECT)
+
+static void tic54x_reloc_processing();
+
+#define coff_rtype_to_howto coff_tic54x_rtype_to_howto
+
+static reloc_howto_type *
+coff_tic54x_rtype_to_howto (abfd, sec, rel, h, sym, addendp)
+     bfd *abfd ATTRIBUTE_UNUSED;
+     asection *sec;
+     struct internal_reloc *rel;
+     struct coff_link_hash_entry *h ATTRIBUTE_UNUSED;
+     struct internal_syment *sym ATTRIBUTE_UNUSED;
+     bfd_vma *addendp;
+{
+  arelent genrel;
+
+  if (rel->r_symndx == -1 && addendp != NULL)
+    {
+      /* This is a TI "internal relocation", which means that the relocation
+	 amount is the amount by which the current section is being relocated
+	 in the output section. */
+      *addendp = (sec->output_section->vma + sec->output_offset) - sec->vma;
+    }
+
+  tic54x_lookup_howto (&genrel, rel);
+
+  return genrel.howto;
+}
+
+static boolean
+ticoff0_bad_format_hook (abfd, filehdr)
+     bfd * abfd ATTRIBUTE_UNUSED;
+     PTR filehdr;
+{
+  struct internal_filehdr *internal_f = (struct internal_filehdr *) filehdr;
+
+  if (COFF0_BADMAG (*internal_f))
+    return false;
+
+  return true;
+}
+
+static boolean
+ticoff1_bad_format_hook (abfd, filehdr)
+     bfd * abfd ATTRIBUTE_UNUSED;
+     PTR filehdr;
+{
+  struct internal_filehdr *internal_f = (struct internal_filehdr *) filehdr;
+
+  if (COFF1_BADMAG (*internal_f))
+    return false;
+
+  return true;
+}
+
+/* replace the stock _bfd_coff_is_local_label_name to recognize TI COFF local
+   labels */
+static boolean 
+ticoff_bfd_is_local_label_name (abfd, name)
+  bfd *abfd ATTRIBUTE_UNUSED;
+  const char *name;
+{
+  if (TICOFF_LOCAL_LABEL_P(name))
+    return true;
+  return false;
+}
+
+#define coff_bfd_is_local_label_name ticoff_bfd_is_local_label_name
+
+/* Customize coffcode.h; the default coff_ functions are set up to use COFF2; 
+   coff_bad_format_hook uses BADMAG, so set that for COFF2.  The COFF1
+   and COFF0 vectors use custom _bad_format_hook procs instead of setting
+   BADMAG. 
+ */ 
+#define BADMAG(x) COFF2_BADMAG(x)
+#include "coffcode.h"
+
+static void
+tic54x_reloc_processing (relent, reloc, symbols, abfd, section)
+     arelent *relent;
+     struct internal_reloc *reloc;
+     asymbol **symbols;
+     bfd *abfd;
+     asection *section;
+{
+  asymbol *ptr;
+
+  relent->address = reloc->r_vaddr;
+  
+  if (reloc->r_symndx != -1)
+    {
+      if (reloc->r_symndx < 0 || reloc->r_symndx >= obj_conv_table_size (abfd))
+        {
+          (*_bfd_error_handler)
+            (_("%s: warning: illegal symbol index %ld in relocs"),
+             bfd_get_filename (abfd), reloc->r_symndx);
+          relent->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
+          ptr = NULL;
+        }
+      else
+        {
+          relent->sym_ptr_ptr = (symbols
+                                 + obj_convert (abfd)[reloc->r_symndx]);
+          ptr = *(relent->sym_ptr_ptr);
+        }
+    }
+  else
+    {
+      relent->sym_ptr_ptr = section->symbol_ptr_ptr;
+      ptr = *(relent->sym_ptr_ptr);
+    }
+  
+  /* The symbols definitions that we have read in have been
+     relocated as if their sections started at 0. But the offsets
+     refering to the symbols in the raw data have not been
+     modified, so we have to have a negative addend to compensate.
+     
+     Note that symbols which used to be common must be left alone */
+  
+  /* Calculate any reloc addend by looking at the symbol */
+  CALC_ADDEND (abfd, ptr, *reloc, relent);
+  
+  relent->address -= section->vma;
+  /* !!     relent->section = (asection *) NULL;*/
+  
+  /* Fill in the relent->howto field from reloc->r_type */
+  tic54x_lookup_howto (relent, reloc);
+}
+
+/* COFF0 differs in file/section header size and relocation entry size */
+static CONST bfd_coff_backend_data ticoff0_swap_table = 
+{
+  coff_SWAP_aux_in, coff_SWAP_sym_in, coff_SWAP_lineno_in,
+  coff_SWAP_aux_out, coff_SWAP_sym_out,
+  coff_SWAP_lineno_out, coff_SWAP_reloc_out,
+  coff_SWAP_filehdr_out, coff_SWAP_aouthdr_out,
+  coff_SWAP_scnhdr_out,
+  FILHSZ_V0, AOUTSZ, SCNHSZ_V01, SYMESZ, AUXESZ, RELSZ_V0, LINESZ, FILNMLEN,
+#ifdef COFF_LONG_FILENAMES
+  true,
+#else
+  false,
+#endif
+#ifdef COFF_LONG_SECTION_NAMES
+  true,
+#else
+  false,
+#endif
+  COFF_DEFAULT_SECTION_ALIGNMENT_POWER,
+  coff_SWAP_filehdr_in, coff_SWAP_aouthdr_in, coff_SWAP_scnhdr_in,
+  coff_SWAP_reloc_in, ticoff0_bad_format_hook, coff_set_arch_mach_hook,
+  coff_mkobject_hook, styp_to_sec_flags, coff_set_alignment_hook,
+  coff_slurp_symbol_table, symname_in_debug_hook, coff_pointerize_aux_hook,
+  coff_print_aux, coff_reloc16_extra_cases, coff_reloc16_estimate,
+  coff_classify_symbol, coff_compute_section_file_positions,
+  coff_start_final_link, coff_relocate_section, coff_rtype_to_howto,
+  coff_adjust_symndx, coff_link_add_one_symbol,
+  coff_link_output_has_begun, coff_final_link_postscript
+};
+
+/* COFF1 differs in section header size */
+static CONST bfd_coff_backend_data ticoff1_swap_table = 
+{
+  coff_SWAP_aux_in, coff_SWAP_sym_in, coff_SWAP_lineno_in,
+  coff_SWAP_aux_out, coff_SWAP_sym_out,
+  coff_SWAP_lineno_out, coff_SWAP_reloc_out,
+  coff_SWAP_filehdr_out, coff_SWAP_aouthdr_out,
+  coff_SWAP_scnhdr_out,
+  FILHSZ, AOUTSZ, SCNHSZ_V01, SYMESZ, AUXESZ, RELSZ, LINESZ, FILNMLEN,
+#ifdef COFF_LONG_FILENAMES
+  true,
+#else
+  false,
+#endif
+#ifdef COFF_LONG_SECTION_NAMES
+  true,
+#else
+  false,
+#endif
+  COFF_DEFAULT_SECTION_ALIGNMENT_POWER,
+  coff_SWAP_filehdr_in, coff_SWAP_aouthdr_in, coff_SWAP_scnhdr_in,
+  coff_SWAP_reloc_in, ticoff1_bad_format_hook, coff_set_arch_mach_hook,
+  coff_mkobject_hook, styp_to_sec_flags, coff_set_alignment_hook,
+  coff_slurp_symbol_table, symname_in_debug_hook, coff_pointerize_aux_hook,
+  coff_print_aux, coff_reloc16_extra_cases, coff_reloc16_estimate,
+  coff_classify_symbol, coff_compute_section_file_positions,
+  coff_start_final_link, coff_relocate_section, coff_rtype_to_howto,
+  coff_adjust_symndx, coff_link_add_one_symbol,
+  coff_link_output_has_begun, coff_final_link_postscript
+};
+
+
+/* TI COFF v0, DOS tools (little-endian headers) */
+const bfd_target tic54x_coff0_vec =
+{
+  "coff0-c54x",			/* name */
+  bfd_target_coff_flavour,
+  BFD_ENDIAN_LITTLE,		/* data byte order is little */
+  BFD_ENDIAN_LITTLE,		/* header byte order is little (DOS tools) */
+
+  (HAS_RELOC | EXEC_P |		/* object flags */
+   HAS_LINENO | HAS_DEBUG |
+   HAS_SYMS | HAS_LOCALS | WP_TEXT | HAS_LOAD_PAGE ),
+
+  (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* section flags */
+  '_',				/* leading symbol underscore */
+  '/',				/* ar_pad_char */
+  15,				/* ar_max_namelen */
+  bfd_getl64, bfd_getl_signed_64, bfd_putl64,
+  tic54x_getl32, tic54x_getl_signed_32, tic54x_putl32,
+  bfd_getl16, bfd_getl_signed_16, bfd_putl16,	/* data */
+  bfd_getl64, bfd_getl_signed_64, bfd_putl64,
+  bfd_getl32, bfd_getl_signed_32, bfd_putl32,
+  bfd_getl16, bfd_getl_signed_16, bfd_putl16,	/* hdrs */
+
+  {_bfd_dummy_target, coff_object_p,	/* bfd_check_format */
+   bfd_generic_archive_p, _bfd_dummy_target},
+  {bfd_false, coff_mkobject, _bfd_generic_mkarchive,	/* bfd_set_format */
+   bfd_false},
+  {bfd_false, coff_write_object_contents,	/* bfd_write_contents */
+   _bfd_write_archive_contents, bfd_false},
+
+  BFD_JUMP_TABLE_GENERIC (coff),
+  BFD_JUMP_TABLE_COPY (coff),
+  BFD_JUMP_TABLE_CORE (_bfd_nocore),
+  BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff),
+  BFD_JUMP_TABLE_SYMBOLS (coff),
+  BFD_JUMP_TABLE_RELOCS (coff),
+  BFD_JUMP_TABLE_WRITE (coff),
+  BFD_JUMP_TABLE_LINK (coff),
+  BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic),
+  NULL,
+
+  (PTR)&ticoff0_swap_table
+};
+
+/* TI COFF v0, SPARC tools (big-endian headers) */
+const bfd_target tic54x_coff0_beh_vec =
+{
+  "coff0-beh-c54x",			/* name */
+  bfd_target_coff_flavour,
+  BFD_ENDIAN_LITTLE,		/* data byte order is little */
+  BFD_ENDIAN_BIG,		/* header byte order is big */
+
+  (HAS_RELOC | EXEC_P |		/* object flags */
+   HAS_LINENO | HAS_DEBUG |
+   HAS_SYMS | HAS_LOCALS | WP_TEXT | HAS_LOAD_PAGE ),
+
+  (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* section flags */
+  '_',				/* leading symbol underscore */
+  '/',				/* ar_pad_char */
+  15,				/* ar_max_namelen */
+  bfd_getl64, bfd_getl_signed_64, bfd_putl64,
+  tic54x_getl32, tic54x_getl_signed_32, tic54x_putl32,
+  bfd_getl16, bfd_getl_signed_16, bfd_putl16,	/* data */
+  bfd_getb64, bfd_getb_signed_64, bfd_putb64,
+  bfd_getb32, bfd_getb_signed_32, bfd_putb32,
+  bfd_getb16, bfd_getb_signed_16, bfd_putb16,	/* hdrs */
+
+  {_bfd_dummy_target, coff_object_p,	/* bfd_check_format */
+   bfd_generic_archive_p, _bfd_dummy_target},
+  {bfd_false, coff_mkobject, _bfd_generic_mkarchive,	/* bfd_set_format */
+   bfd_false},
+  {bfd_false, coff_write_object_contents,	/* bfd_write_contents */
+   _bfd_write_archive_contents, bfd_false},
+
+  BFD_JUMP_TABLE_GENERIC (coff),
+  BFD_JUMP_TABLE_COPY (coff),
+  BFD_JUMP_TABLE_CORE (_bfd_nocore),
+  BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff),
+  BFD_JUMP_TABLE_SYMBOLS (coff),
+  BFD_JUMP_TABLE_RELOCS (coff),
+  BFD_JUMP_TABLE_WRITE (coff),
+  BFD_JUMP_TABLE_LINK (coff),
+  BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic),
+
+  &tic54x_coff0_vec,
+
+  (PTR)&ticoff0_swap_table
+};
+
+/* TI COFF v1, DOS tools (little-endian headers) */
+const bfd_target tic54x_coff1_vec =
+{
+  "coff1-c54x",			/* name */
+  bfd_target_coff_flavour,
+  BFD_ENDIAN_LITTLE,		/* data byte order is little */
+  BFD_ENDIAN_LITTLE,		/* header byte order is little (DOS tools) */
+
+  (HAS_RELOC | EXEC_P |		/* object flags */
+   HAS_LINENO | HAS_DEBUG |
+   HAS_SYMS | HAS_LOCALS | WP_TEXT | HAS_LOAD_PAGE ),
+
+  (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* section flags */
+  '_',				/* leading symbol underscore */
+  '/',				/* ar_pad_char */
+  15,				/* ar_max_namelen */
+  bfd_getl64, bfd_getl_signed_64, bfd_putl64,
+  tic54x_getl32, tic54x_getl_signed_32, tic54x_putl32,
+  bfd_getl16, bfd_getl_signed_16, bfd_putl16,	/* data */
+  bfd_getl64, bfd_getl_signed_64, bfd_putl64,
+  bfd_getl32, bfd_getl_signed_32, bfd_putl32,
+  bfd_getl16, bfd_getl_signed_16, bfd_putl16,	/* hdrs */
+
+  {_bfd_dummy_target, coff_object_p,	/* bfd_check_format */
+   bfd_generic_archive_p, _bfd_dummy_target},
+  {bfd_false, coff_mkobject, _bfd_generic_mkarchive,	/* bfd_set_format */
+   bfd_false},
+  {bfd_false, coff_write_object_contents,	/* bfd_write_contents */
+   _bfd_write_archive_contents, bfd_false},
+
+  BFD_JUMP_TABLE_GENERIC (coff),
+  BFD_JUMP_TABLE_COPY (coff),
+  BFD_JUMP_TABLE_CORE (_bfd_nocore),
+  BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff),
+  BFD_JUMP_TABLE_SYMBOLS (coff),
+  BFD_JUMP_TABLE_RELOCS (coff),
+  BFD_JUMP_TABLE_WRITE (coff),
+  BFD_JUMP_TABLE_LINK (coff),
+  BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic),
+
+  &tic54x_coff0_beh_vec,
+
+  (PTR)&ticoff1_swap_table
+};
+
+/* TI COFF v1, SPARC tools (big-endian headers) */
+const bfd_target tic54x_coff1_beh_vec =
+{
+  "coff1-beh-c54x",			/* name */
+  bfd_target_coff_flavour,
+  BFD_ENDIAN_LITTLE,		/* data byte order is little */
+  BFD_ENDIAN_BIG,		/* header byte order is big */
+
+  (HAS_RELOC | EXEC_P |		/* object flags */
+   HAS_LINENO | HAS_DEBUG |
+   HAS_SYMS | HAS_LOCALS | WP_TEXT | HAS_LOAD_PAGE ),
+
+  (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* section flags */
+  '_',				/* leading symbol underscore */
+  '/',				/* ar_pad_char */
+  15,				/* ar_max_namelen */
+  bfd_getl64, bfd_getl_signed_64, bfd_putl64,
+  tic54x_getl32, tic54x_getl_signed_32, tic54x_putl32,
+  bfd_getl16, bfd_getl_signed_16, bfd_putl16,	/* data */
+  bfd_getb64, bfd_getb_signed_64, bfd_putb64,
+  bfd_getb32, bfd_getb_signed_32, bfd_putb32,
+  bfd_getb16, bfd_getb_signed_16, bfd_putb16,	/* hdrs */
+
+  {_bfd_dummy_target, coff_object_p,	/* bfd_check_format */
+   bfd_generic_archive_p, _bfd_dummy_target},
+  {bfd_false, coff_mkobject, _bfd_generic_mkarchive,	/* bfd_set_format */
+   bfd_false},
+  {bfd_false, coff_write_object_contents,	/* bfd_write_contents */
+   _bfd_write_archive_contents, bfd_false},
+
+  BFD_JUMP_TABLE_GENERIC (coff),
+  BFD_JUMP_TABLE_COPY (coff),
+  BFD_JUMP_TABLE_CORE (_bfd_nocore),
+  BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff),
+  BFD_JUMP_TABLE_SYMBOLS (coff),
+  BFD_JUMP_TABLE_RELOCS (coff),
+  BFD_JUMP_TABLE_WRITE (coff),
+  BFD_JUMP_TABLE_LINK (coff),
+  BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic),
+
+  &tic54x_coff1_vec,
+
+  (PTR)&ticoff1_swap_table
+};
+
+/* TI COFF v2, TI DOS tools output (little-endian headers) */
+const bfd_target tic54x_coff2_vec =
+{
+  "coff2-c54x",			/* name */
+  bfd_target_coff_flavour,
+  BFD_ENDIAN_LITTLE,		/* data byte order is little */
+  BFD_ENDIAN_LITTLE,		/* header byte order is little (DOS tools) */
+
+  (HAS_RELOC | EXEC_P |		/* object flags */
+   HAS_LINENO | HAS_DEBUG |
+   HAS_SYMS | HAS_LOCALS | WP_TEXT | HAS_LOAD_PAGE ),
+
+  (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* section flags */
+  '_',				/* leading symbol underscore */
+  '/',				/* ar_pad_char */
+  15,				/* ar_max_namelen */
+  bfd_getl64, bfd_getl_signed_64, bfd_putl64,
+  tic54x_getl32, tic54x_getl_signed_32, tic54x_putl32,
+  bfd_getl16, bfd_getl_signed_16, bfd_putl16,	/* data */
+  bfd_getl64, bfd_getl_signed_64, bfd_putl64,
+  bfd_getl32, bfd_getl_signed_32, bfd_putl32,
+  bfd_getl16, bfd_getl_signed_16, bfd_putl16,	/* hdrs */
+
+  {_bfd_dummy_target, coff_object_p,	/* bfd_check_format */
+   bfd_generic_archive_p, _bfd_dummy_target},
+  {bfd_false, coff_mkobject, _bfd_generic_mkarchive,	/* bfd_set_format */
+   bfd_false},
+  {bfd_false, coff_write_object_contents,	/* bfd_write_contents */
+   _bfd_write_archive_contents, bfd_false},
+
+  BFD_JUMP_TABLE_GENERIC (coff),
+  BFD_JUMP_TABLE_COPY (coff),
+  BFD_JUMP_TABLE_CORE (_bfd_nocore),
+  BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff),
+  BFD_JUMP_TABLE_SYMBOLS (coff),
+  BFD_JUMP_TABLE_RELOCS (coff),
+  BFD_JUMP_TABLE_WRITE (coff),
+  BFD_JUMP_TABLE_LINK (coff),
+  BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic),
+
+  &tic54x_coff1_beh_vec,
+
+  COFF_SWAP_TABLE
+};
+
+/* TI COFF v2, TI SPARC tools output (big-endian headers) */
+const bfd_target tic54x_coff2_beh_vec =
+{
+  "coff2-beh-c54x",			/* name */
+  bfd_target_coff_flavour,
+  BFD_ENDIAN_LITTLE,		/* data byte order is little */
+  BFD_ENDIAN_BIG,		/* header byte order is big */
+
+  (HAS_RELOC | EXEC_P |		/* object flags */
+   HAS_LINENO | HAS_DEBUG |
+   HAS_SYMS | HAS_LOCALS | WP_TEXT | HAS_LOAD_PAGE ),
+
+  (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* section flags */
+  '_',				/* leading symbol underscore */
+  '/',				/* ar_pad_char */
+  15,				/* ar_max_namelen */
+  bfd_getl64, bfd_getl_signed_64, bfd_putl64,
+  tic54x_getl32, tic54x_getl_signed_32, tic54x_putl32,
+  bfd_getl16, bfd_getl_signed_16, bfd_putl16,	/* data */
+  bfd_getb64, bfd_getb_signed_64, bfd_putb64,
+  bfd_getb32, bfd_getb_signed_32, bfd_putb32,
+  bfd_getb16, bfd_getb_signed_16, bfd_putb16,	/* hdrs */
+
+  {_bfd_dummy_target, coff_object_p,	/* bfd_check_format */
+   bfd_generic_archive_p, _bfd_dummy_target},
+  {bfd_false, coff_mkobject, _bfd_generic_mkarchive,	/* bfd_set_format */
+   bfd_false},
+  {bfd_false, coff_write_object_contents,	/* bfd_write_contents */
+   _bfd_write_archive_contents, bfd_false},
+
+  BFD_JUMP_TABLE_GENERIC (coff),
+  BFD_JUMP_TABLE_COPY (coff),
+  BFD_JUMP_TABLE_CORE (_bfd_nocore),
+  BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff),
+  BFD_JUMP_TABLE_SYMBOLS (coff),
+  BFD_JUMP_TABLE_RELOCS (coff),
+  BFD_JUMP_TABLE_WRITE (coff),
+  BFD_JUMP_TABLE_LINK (coff),
+  BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic),
+
+  &tic54x_coff2_vec,
+
+  COFF_SWAP_TABLE
+};
diff --git a/bfd/coffcode.h b/bfd/coffcode.h
index c635d3305f..27d467c552 100644
--- a/bfd/coffcode.h
+++ b/bfd/coffcode.h
@@ -398,7 +398,11 @@ sec_to_styp_flags (sec_name, sec_flags)
     }
   else if (!strncmp (sec_name, ".stab", 5))
     {
+#ifdef COFF_ALIGN_IN_S_FLAGS
+      styp_flags = STYP_DSECT;
+#else
       styp_flags = STYP_INFO;
+#endif
     }
 #ifdef RS6000COFF_C
   else if (!strcmp (sec_name, _PAD))
@@ -1520,9 +1524,12 @@ coff_set_alignment_hook (abfd, section, scnhdr)
       break;
 #endif
 #ifdef TIC80COFF
-  /* TI tools hijack bits 8-11 for the alignment */
+  /* TI tools puts the alignment power in bits 8-11 */
   i = (hdr->s_flags >> 8) & 0xF ;
 #endif
+#ifdef COFF_DECODE_ALIGNMENT
+  i = COFF_DECODE_ALIGNMENT(hdr->s_flags);
+#endif
   section->alignment_power = i;
 }
 
@@ -2035,6 +2042,36 @@ coff_set_arch_mach_hook (abfd, filehdr)
       break;
 #endif
 
+#ifdef TICOFF0MAGIC
+#ifdef TICOFF_TARGET_ARCH
+      /* this TI COFF section should be used by all new TI COFF v0 targets */
+    case TICOFF0MAGIC:
+      arch = TICOFF_TARGET_ARCH;
+      break;
+#endif
+#endif
+
+#ifdef TICOFF1MAGIC
+      /* this TI COFF section should be used by all new TI COFF v1/2 targets */
+      /* TI COFF1 and COFF2 use the target_id field to specify which arch */
+    case TICOFF1MAGIC:
+    case TICOFF2MAGIC:
+      switch (internal_f->f_target_id)
+        {
+#ifdef TI_TARGET_ID
+        case TI_TARGET_ID:
+          arch = TICOFF_TARGET_ARCH;
+          break;
+#endif
+        default:
+          (*_bfd_error_handler)
+            (_("Unrecognized TI COFF target id '0x%x'"), 
+             internal_f->f_target_id);
+          break;
+        }
+      break;
+#endif
+
 #ifdef TIC80_ARCH_MAGIC
     case TIC80_ARCH_MAGIC:
       arch = bfd_arch_tic80;
@@ -2427,6 +2464,33 @@ coff_set_flags (abfd, magicp, flagsp)
       *magicp = TIC30MAGIC;
       return true;
 #endif
+
+#ifdef TICOFF_DEFAULT_MAGIC
+    case TICOFF_TARGET_ARCH:
+      /* if there's no indication of which version we want, use the default */
+      if (!abfd->xvec )
+        *magicp = TICOFF_DEFAULT_MAGIC;
+      else
+        {
+          /* we may want to output in a different COFF version */
+          switch (abfd->xvec->name[4])
+            {
+            case '0':
+              *magicp = TICOFF0MAGIC;
+              break;
+            case '1':
+              *magicp = TICOFF1MAGIC;
+              break;
+            case '2':
+              *magicp = TICOFF2MAGIC;
+              break;
+            default:
+              return false;
+            }
+        }
+      return true;
+#endif
+
 #ifdef TIC80_ARCH_MAGIC
     case bfd_arch_tic80:
       *magicp = TIC80_ARCH_MAGIC;
@@ -2661,7 +2725,7 @@ sort_by_secaddr (arg1, arg2)
 #ifndef I960
 #define ALIGN_SECTIONS_IN_FILE
 #endif
-#ifdef TIC80COFF
+#if defined(TIC80COFF) || defined(TICOFF)
 #undef ALIGN_SECTIONS_IN_FILE
 #endif
 
@@ -3253,10 +3317,13 @@ coff_write_object_contents (abfd)
       section.s_align = (current->alignment_power
 			 ? 1 << current->alignment_power
 			 : 0);
-#else
-#ifdef TIC80COFF
+#endif
+#ifdef TIC80COFF 
+      /* TI COFF puts the alignment power in bits 8-11 of the flags */
       section.s_flags |= (current->alignment_power & 0xF) << 8;
 #endif
+#ifdef COFF_ENCODE_ALIGNMENT
+      COFF_ENCODE_ALIGNMENT(section, current->alignment_power);
 #endif
 
 #ifdef COFF_IMAGE_WITH_PE
@@ -3446,6 +3513,11 @@ coff_write_object_contents (abfd)
     internal_f.f_flags |= F_AR32W;
 #endif
 
+#ifdef TI_TARGET_ID
+  /* target id is used in TI COFF v1 and later; COFF0 won't use this field,
+     but it doesn't hurt to set it internally */
+  internal_f.f_target_id = TI_TARGET_ID;
+#endif
 #ifdef TIC80_TARGET_ID
   internal_f.f_target_id = TIC80_TARGET_ID;
 #endif
@@ -3487,6 +3559,10 @@ coff_write_object_contents (abfd)
       internal_a.magic = NMAGIC; /* Assume separate i/d */
 #define __A_MAGIC_SET__
 #endif /* A29K */
+#ifdef TICOFF_AOUT_MAGIC
+    internal_a.magic = TICOFF_AOUT_MAGIC;
+#define __A_MAGIC_SET__
+#endif
 #ifdef TIC80COFF
     internal_a.magic = TIC80_ARCH_MAGIC;
 #define __A_MAGIC_SET__
@@ -4220,7 +4296,8 @@ coff_slurp_symbol_table (abfd)
 #endif
 	    case C_REGPARM:	/* register parameter		 */
 	    case C_REG:	/* register variable		 */
-#ifndef TIC80COFF
+              /* C_AUTOARG conflictes with TI COFF C_UEXT */
+#if !defined (TIC80COFF) && !defined (TICOFF)
 #ifdef C_AUTOARG
 	    case C_AUTOARG:	/* 960-specific storage class */
 #endif
@@ -4347,8 +4424,8 @@ coff_slurp_symbol_table (abfd)
 	      /* NT uses 0x67 for a weak symbol, not C_ALIAS.  */
 	    case C_ALIAS:	/* duplicate tag		 */
 #endif
-	      /* New storage classes for TIc80 */
-#ifdef TIC80COFF
+	      /* New storage classes for TI COFF */ 
+#if defined(TIC80COFF) || defined(TICOFF)
 	    case C_UEXT:	/* Tentative external definition */
 #endif
 	    case C_EXTLAB:	/* External load time label */
diff --git a/bfd/config.bfd b/bfd/config.bfd
index d8f91d2e16..3d290a4eae 100644
--- a/bfd/config.bfd
+++ b/bfd/config.bfd
@@ -33,6 +33,7 @@ arm*)	targ_archs=bfd_arm_arch ;;
 strongarm*) targ_archs=bfd_arm_arch ;;
 thumb*)	targ_archs=bfd_arm_arch ;;
 c30*)	targ_archs=bfd_tic30_arch ;;
+c54x*)	targ_archs=bfd_tic54x_arch ;;
 hppa*)	targ_archs=bfd_hppa_arch ;;
 i[3456]86) targ_archs=bfd_i386_arch ;;
 i370)   targ_archs=bfd_i370_arch ;;
@@ -186,6 +187,12 @@ case "${targ}" in
     targ_defvec=tic30_coff_vec
     ;;
 
+  c54x*-*-*coff* | tic54x-*-*coff*)
+    targ_defvec=tic54x_coff1_vec
+    targ_selvecs="tic54x_coff1_beh_vec tic54x_coff2_vec tic54x_coff2_beh_vec tic54x_coff0_vec tic54x_coff0_beh_vec"
+    targ_underscore=yes
+    ;;
+
   d10v-*-*)
     targ_defvec=bfd_elf32_d10v_vec
     ;;
diff --git a/bfd/configure b/bfd/configure
index 049cad961d..748ed8b999 100755
--- a/bfd/configure
+++ b/bfd/configure
@@ -5213,6 +5213,12 @@ do
     tekhex_vec)			tb="$tb tekhex.lo" ;;
     tic30_aout_vec)		tb="$tb aout-tic30.lo" ;;
     tic30_coff_vec)		tb="$tb coff-tic30.lo" ;;
+    tic54x_coff0_vec)		tb="$tb coff-tic54x.lo" ;;
+    tic54x_coff0_beh_vec)	tb="$tb coff-tic54x.lo" ;;
+    tic54x_coff1_vec)		tb="$tb coff-tic54x.lo" ;;
+    tic54x_coff1_beh_vec)	tb="$tb coff-tic54x.lo" ;;
+    tic54x_coff2_vec)		tb="$tb coff-tic54x.lo" ;;
+    tic54x_coff2_beh_vec)	tb="$tb coff-tic54x.lo" ;;
     tic80coff_vec)		tb="$tb coff-tic80.lo cofflink.lo" ;;
     versados_vec)		tb="$tb versados.lo" ;;
     vms_alpha_vec)		tb="$tb vms.lo vms-hdr.lo vms-gsd.lo vms-tir.lo vms-misc.lo"
diff --git a/bfd/configure.in b/bfd/configure.in
index bb71da8448..6371d688c8 100644
--- a/bfd/configure.in
+++ b/bfd/configure.in
@@ -574,6 +574,12 @@ do
     tekhex_vec)			tb="$tb tekhex.lo" ;;
     tic30_aout_vec)		tb="$tb aout-tic30.lo" ;;
     tic30_coff_vec)		tb="$tb coff-tic30.lo" ;;
+    tic54x_coff0_vec)		tb="$tb coff-tic54x.lo" ;;
+    tic54x_coff0_beh_vec)	tb="$tb coff-tic54x.lo" ;;
+    tic54x_coff1_vec)		tb="$tb coff-tic54x.lo" ;;
+    tic54x_coff1_beh_vec)	tb="$tb coff-tic54x.lo" ;;
+    tic54x_coff2_vec)		tb="$tb coff-tic54x.lo" ;;
+    tic54x_coff2_beh_vec)	tb="$tb coff-tic54x.lo" ;;
     tic80coff_vec)		tb="$tb coff-tic80.lo cofflink.lo" ;;
     versados_vec)		tb="$tb versados.lo" ;;
     vms_alpha_vec)		tb="$tb vms.lo vms-hdr.lo vms-gsd.lo vms-tir.lo vms-misc.lo"
diff --git a/bfd/cpu-tic54x.c b/bfd/cpu-tic54x.c
new file mode 100644
index 0000000000..3913b560b5
--- /dev/null
+++ b/bfd/cpu-tic54x.c
@@ -0,0 +1,39 @@
+/* BFD support for the Texas Instruments TMS320C54X architecture.
+   Copyright 1998 Free Software Foundation, Inc.
+
+   This file is part of BFD, the Binary File Descriptor library.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+   02111-1307, USA.  */
+
+#include "bfd.h"
+#include "sysdep.h"
+#include "libbfd.h"
+
+const bfd_arch_info_type bfd_tic54x_arch =
+{
+  16,				/* 16 bits in a word */
+  16,				/* 16 bits in an address (except '548) */
+  16,				/* 16 bits in a byte */
+  bfd_arch_tic54x,
+  0,				/* only 1 machine */
+  "tic54x",
+  "tms320c54x",
+  1,
+  true,				/* the one and only */
+  bfd_default_compatible,
+  bfd_default_scan,             
+  0,
+};
diff --git a/bfd/libbfd.h b/bfd/libbfd.h
index 774cfc3ebf..44d6205fa1 100644
--- a/bfd/libbfd.h
+++ b/bfd/libbfd.h
@@ -859,6 +859,11 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
   "BFD_RELOC_MN10300_32_PCREL",
   "BFD_RELOC_MN10300_16_PCREL",
   "BFD_RELOC_TIC30_LDP",
+  "BFD_RELOC_TIC54X_PARTLS7",
+  "BFD_RELOC_TIC54X_PARTMS9",
+  "BFD_RELOC_TIC54X_23",
+  "BFD_RELOC_TIC54X_16_OF_23",
+  "BFD_RELOC_TIC54X_MS7_OF_23",
   "BFD_RELOC_FR30_48",
   "BFD_RELOC_FR30_20",
   "BFD_RELOC_FR30_6_IN_4",
diff --git a/bfd/reloc.c b/bfd/reloc.c
index 3b1a00ff08..aafa71a877 100644
--- a/bfd/reloc.c
+++ b/bfd/reloc.c
@@ -2539,6 +2539,41 @@ ENUMDOC
   significant 8 bits of a 24 bit word are placed into the least
   significant 8 bits of the opcode.
 
+COMMENT
+ENUM
+  BFD_RELOC_TIC54X_PARTLS7
+ENUMDOC
+  This is a 7bit reloc for the tms320c54x, where the least
+  significant 7 bits of a 16 bit word are placed into the least
+  significant 7 bits of the opcode.
+
+ENUM
+  BFD_RELOC_TIC54X_PARTMS9
+ENUMDOC
+  This is a 9bit DP reloc for the tms320c54x, where the most
+  significant 9 bits of a 16 bit word are placed into the least
+  significant 9 bits of the opcode.
+
+ENUM
+  BFD_RELOC_TIC54X_23
+ENUMDOC
+  This is an extended address 23-bit reloc for the tms320c54x.
+
+ENUM
+  BFD_RELOC_TIC54X_16_OF_23
+ENUMDOC
+  This is a 16-bit reloc for the tms320c54x, where the least 
+  significant 16 bits of a 23-bit extended address are placed into 
+  the opcode.
+
+ENUM
+  BFD_RELOC_TIC54X_MS7_OF_23
+ENUMDOC
+  This is a reloc for the tms320c54x, where the most
+  significant 7 bits of a 23-bit extended address are placed into 
+  the opcode.
+COMMENT
+
 ENUM
   BFD_RELOC_FR30_48
 ENUMDOC
diff --git a/bfd/targets.c b/bfd/targets.c
index 1f2217b9fd..e54eb29a71 100644
--- a/bfd/targets.c
+++ b/bfd/targets.c
@@ -625,6 +625,12 @@ extern const bfd_target sunos_big_vec;
 extern const bfd_target tekhex_vec;
 extern const bfd_target tic30_aout_vec;
 extern const bfd_target tic30_coff_vec;
+extern const bfd_target tic54x_coff0_vec;
+extern const bfd_target tic54x_coff0_beh_vec;
+extern const bfd_target tic54x_coff1_vec;
+extern const bfd_target tic54x_coff1_beh_vec;
+extern const bfd_target tic54x_coff2_vec;
+extern const bfd_target tic54x_coff2_beh_vec;
 extern const bfd_target tic80coff_vec;
 extern const bfd_target vaxnetbsd_vec;
 extern const bfd_target versados_vec;
@@ -862,6 +868,12 @@ const bfd_target * const bfd_target_vector[] = {
 	&aout0_big_vec,
 	&tic30_aout_vec,
 	&tic30_coff_vec,
+	&tic54x_coff0_vec,
+	&tic54x_coff0_beh_vec,
+	&tic54x_coff1_vec,
+	&tic54x_coff1_beh_vec,
+	&tic54x_coff2_vec,
+	&tic54x_coff2_beh_vec,
 	&tic80coff_vec,
 	&vaxnetbsd_vec,
 	&versados_vec,