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authorDave Brolley <brolley@redhat.com>2003-10-08 17:53:40 +0000
committerDave Brolley <brolley@redhat.com>2003-10-08 17:53:40 +0000
commit255d1f6b6b6322b7f76e402524a38943cda711ee (patch)
treeb37850dc1268d23c58b862e4ea6b0a1878f98340 /cpu/frv.opc
parent4f016061b36dc1cde728371cfa19c144e5af881e (diff)
downloadbinutils-redhat-255d1f6b6b6322b7f76e402524a38943cda711ee.tar.gz
2003-10-06 Dave Brolley <brolley@redhat.com>
* frv.cpu, frv.opc: Add support for fr550.
Diffstat (limited to 'cpu/frv.opc')
-rw-r--r--cpu/frv.opc278
1 files changed, 252 insertions, 26 deletions
diff --git a/cpu/frv.opc b/cpu/frv.opc
index cd3572f0bd..e149508edf 100644
--- a/cpu/frv.opc
+++ b/cpu/frv.opc
@@ -1,6 +1,6 @@
/* Fujitsu FRV opcode support, for GNU Binutils. -*- C -*-
- Copyright 2003 Free Software Foundation, Inc.
+ Copyright 2000, 2001, 2003 Free Software Foundation, Inc.
Contributed by Red Hat Inc; developed under contract from Fujitsu.
@@ -49,7 +49,8 @@
#define CGEN_VERBOSE_ASSEMBLER_ERRORS
/* Vliw support. */
-#define FRV_VLIW_SIZE 4 /* fr500 has largest vliw size of 4. */
+#define FRV_VLIW_SIZE 8 /* fr550 has largest vliw size of 8. */
+#define PAD_VLIW_COMBO ,UNIT_NIL,UNIT_NIL,UNIT_NIL,UNIT_NIL
typedef CGEN_ATTR_VALUE_TYPE VLIW_COMBO[FRV_VLIW_SIZE];
typedef struct
@@ -61,6 +62,7 @@ typedef struct
CGEN_ATTR_VALUE_TYPE *unit_mapping;
VLIW_COMBO *current_vliw;
CGEN_ATTR_VALUE_TYPE major[FRV_VLIW_SIZE];
+ const CGEN_INSN* insn[FRV_VLIW_SIZE];
} FRV_VLIW;
int frv_is_branch_major PARAMS ((CGEN_ATTR_VALUE_TYPE, unsigned long));
@@ -76,6 +78,7 @@ int spr_valid PARAMS ((long));
/* -- opc.c */
#include "elf/frv.h"
+#include <stdio.h>
static int match_unit
PARAMS ((FRV_VLIW *, CGEN_ATTR_VALUE_TYPE, CGEN_ATTR_VALUE_TYPE));
@@ -89,8 +92,10 @@ static int fr400_check_insn_major_constraints
PARAMS ((FRV_VLIW *, CGEN_ATTR_VALUE_TYPE));
static int fr500_check_insn_major_constraints
PARAMS ((FRV_VLIW *, CGEN_ATTR_VALUE_TYPE));
+static int fr550_check_insn_major_constraints
+ PARAMS ((FRV_VLIW *, CGEN_ATTR_VALUE_TYPE, const CGEN_INSN *));
static int check_insn_major_constraints
- PARAMS ((FRV_VLIW *, CGEN_ATTR_VALUE_TYPE));
+ PARAMS ((FRV_VLIW *, CGEN_ATTR_VALUE_TYPE, const CGEN_INSN *));
int
frv_is_branch_major (CGEN_ATTR_VALUE_TYPE major, unsigned long mach)
@@ -190,32 +195,69 @@ frv_is_media_insn (const CGEN_INSN *insn)
static VLIW_COMBO fr400_allowed_vliw[] =
{
/* slot0 slot1 slot2 slot3 */
- { UNIT_I0, UNIT_I1, UNIT_NIL, UNIT_NIL },
- { UNIT_I0, UNIT_FM0, UNIT_NIL, UNIT_NIL },
- { UNIT_I0, UNIT_B0, UNIT_NIL, UNIT_NIL },
- { UNIT_FM0, UNIT_FM1, UNIT_NIL, UNIT_NIL },
- { UNIT_FM0, UNIT_B0, UNIT_NIL, UNIT_NIL },
- { UNIT_B0, UNIT_NIL, UNIT_NIL, UNIT_NIL },
- { UNIT_C, UNIT_NIL, UNIT_NIL, UNIT_NIL },
- { UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL }
+ { UNIT_I0, UNIT_I1, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO },
+ { UNIT_I0, UNIT_FM0, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO },
+ { UNIT_I0, UNIT_B0, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO },
+ { UNIT_FM0, UNIT_FM1, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO },
+ { UNIT_FM0, UNIT_B0, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO },
+ { UNIT_B0, UNIT_NIL, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO },
+ { UNIT_C, UNIT_NIL, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO },
+ { UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO }
};
/* This table represents the allowable packing for vliw insns for the fr500.
+ The fr500 has only 4 vliw slots. Represent this by not allowing any insns
+ in the extra slots.
Subsets of any given row are also allowed. */
static VLIW_COMBO fr500_allowed_vliw[] =
{
/* slot0 slot1 slot2 slot3 */
- { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1 },
- { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_B0 },
- { UNIT_I0, UNIT_FM0, UNIT_FM1, UNIT_B0 },
- { UNIT_I0, UNIT_FM0, UNIT_B0, UNIT_B1 },
- { UNIT_I0, UNIT_I1, UNIT_B0, UNIT_B1 },
- { UNIT_I0, UNIT_B0, UNIT_B1, UNIT_NIL },
- { UNIT_FM0, UNIT_FM1, UNIT_B0, UNIT_B1 },
- { UNIT_FM0, UNIT_B0, UNIT_B1, UNIT_NIL },
- { UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL },
- { UNIT_C, UNIT_NIL, UNIT_NIL, UNIT_NIL },
- { UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL }
+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1 PAD_VLIW_COMBO },
+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_B0 PAD_VLIW_COMBO },
+ { UNIT_I0, UNIT_FM0, UNIT_FM1, UNIT_B0 PAD_VLIW_COMBO },
+ { UNIT_I0, UNIT_FM0, UNIT_B0, UNIT_B1 PAD_VLIW_COMBO },
+ { UNIT_I0, UNIT_I1, UNIT_B0, UNIT_B1 PAD_VLIW_COMBO },
+ { UNIT_I0, UNIT_B0, UNIT_B1, UNIT_NIL PAD_VLIW_COMBO },
+ { UNIT_FM0, UNIT_FM1, UNIT_B0, UNIT_B1 PAD_VLIW_COMBO },
+ { UNIT_FM0, UNIT_B0, UNIT_B1, UNIT_NIL PAD_VLIW_COMBO },
+ { UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO },
+ { UNIT_C, UNIT_NIL, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO },
+ { UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO }
+};
+
+/* This table represents the allowable packing for vliw insns for the fr550.
+ Subsets of any given row are also allowed. */
+static VLIW_COMBO fr550_allowed_vliw[] =
+{
+ /* slot0 slot1 slot2 slot3 slot4 slot5 slot6 slot7 */
+ { UNIT_I0, UNIT_I1, UNIT_I2, UNIT_I3, UNIT_B0, UNIT_B1 , UNIT_NIL, UNIT_NIL },
+ { UNIT_I0, UNIT_I1, UNIT_I2, UNIT_B0, UNIT_B1 , UNIT_NIL, UNIT_NIL, UNIT_NIL },
+ { UNIT_I0, UNIT_I1, UNIT_B0, UNIT_B1 , UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL },
+ { UNIT_I0, UNIT_B0, UNIT_B1 , UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL },
+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1, UNIT_I2, UNIT_FM2, UNIT_I3, UNIT_FM3 },
+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1, UNIT_I2, UNIT_FM2, UNIT_I3, UNIT_B0 },
+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1, UNIT_I2, UNIT_FM2, UNIT_FM3, UNIT_B0 },
+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1, UNIT_I2, UNIT_FM2, UNIT_B0, UNIT_B1 },
+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1, UNIT_I2, UNIT_I3, UNIT_B0, UNIT_B1 },
+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1, UNIT_I2, UNIT_B0, UNIT_B1, UNIT_NIL },
+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1, UNIT_FM2, UNIT_FM3, UNIT_B0, UNIT_B1 },
+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1, UNIT_FM2, UNIT_FM3, UNIT_B0, UNIT_B1 },
+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1, UNIT_FM2, UNIT_B0, UNIT_B1, UNIT_NIL },
+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1, UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL },
+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_I2, UNIT_I3, UNIT_B0, UNIT_B1, UNIT_NIL },
+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_I2, UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL },
+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL, UNIT_NIL },
+ { UNIT_I0, UNIT_FM0, UNIT_FM1, UNIT_FM2, UNIT_FM3, UNIT_B0, UNIT_B1, UNIT_NIL },
+ { UNIT_I0, UNIT_FM0, UNIT_FM1, UNIT_FM2, UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL },
+ { UNIT_I0, UNIT_FM0, UNIT_FM1, UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL, UNIT_NIL },
+ { UNIT_I0, UNIT_FM0, UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL },
+ { UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL },
+ { UNIT_C, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL },
+ { UNIT_FM0, UNIT_FM1, UNIT_FM2, UNIT_FM3, UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL },
+ { UNIT_FM0, UNIT_FM1, UNIT_FM2, UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL, UNIT_NIL },
+ { UNIT_FM0, UNIT_FM1, UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL },
+ { UNIT_FM0, UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL },
+ { UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL }
};
/* Some insns are assigned specialized implementation units which map to
@@ -228,10 +270,14 @@ static CGEN_ATTR_VALUE_TYPE fr400_unit_mapping[] =
/* I0 */ UNIT_I0,
/* I1 */ UNIT_I1,
/* I01 */ UNIT_I01,
+/* I2 */ UNIT_NIL, /* no I2 or I3 unit */
+/* I3 */ UNIT_NIL,
/* IALL */ UNIT_I01, /* only I0 and I1 units */
/* FM0 */ UNIT_FM0,
/* FM1 */ UNIT_FM1,
/* FM01 */ UNIT_FM01,
+/* FM2 */ UNIT_NIL, /* no F2 or M2 units */
+/* FM3 */ UNIT_NIL, /* no F3 or M3 units */
/* FMALL */ UNIT_FM01,/* Only F0,F1,M0,M1 units */
/* FMLOW */ UNIT_FM0, /* Only F0,M0 units */
/* B0 */ UNIT_B0, /* branches only in B0 unit. */
@@ -254,10 +300,14 @@ static CGEN_ATTR_VALUE_TYPE fr500_unit_mapping[] =
/* I0 */ UNIT_I0,
/* I1 */ UNIT_I1,
/* I01 */ UNIT_I01,
+/* I2 */ UNIT_NIL, /* no I2 or I3 unit */
+/* I3 */ UNIT_NIL,
/* IALL */ UNIT_I01, /* only I0 and I1 units */
/* FM0 */ UNIT_FM0,
/* FM1 */ UNIT_FM1,
/* FM01 */ UNIT_FM01,
+/* FM2 */ UNIT_NIL, /* no F2 or M2 units */
+/* FM3 */ UNIT_NIL, /* no F3 or M2 units */
/* FMALL */ UNIT_FM01,/* Only F0,F1,M0,M1 units */
/* FMLOW */ UNIT_FM0, /* Only F0,M0 units */
/* B0 */ UNIT_B0,
@@ -273,6 +323,36 @@ static CGEN_ATTR_VALUE_TYPE fr500_unit_mapping[] =
/* MCLRACC-1*/ UNIT_FM01 /* mclracc,A==1 in FM0 or FM1 unit. */
};
+static CGEN_ATTR_VALUE_TYPE fr550_unit_mapping[] =
+{
+/* unit in insn actual unit */
+/* NIL */ UNIT_NIL,
+/* I0 */ UNIT_I0,
+/* I1 */ UNIT_I1,
+/* I01 */ UNIT_I01,
+/* I2 */ UNIT_I2,
+/* I3 */ UNIT_I3,
+/* IALL */ UNIT_IALL,
+/* FM0 */ UNIT_FM0,
+/* FM1 */ UNIT_FM1,
+/* FM01 */ UNIT_FM01,
+/* FM2 */ UNIT_FM2,
+/* FM3 */ UNIT_FM3,
+/* FMALL */ UNIT_FMALL,
+/* FMLOW */ UNIT_FM01, /* Only F0,F1,M0,M1 units */
+/* B0 */ UNIT_B0,
+/* B1 */ UNIT_B1,
+/* B01 */ UNIT_B01,
+/* C */ UNIT_C,
+/* MULT-DIV */ UNIT_I01, /* multiply and divide in I0 or I1 unit. */
+/* LOAD */ UNIT_I01, /* load in I0 or I1 unit. */
+/* STORE */ UNIT_I01, /* store in I0 or I1 unit. */
+/* SCAN */ UNIT_IALL, /* scan in any integer unit. */
+/* DCPL */ UNIT_I0, /* dcpl only in I0 unit. */
+/* MDUALACC */ UNIT_FMALL,/* media dual acc insn in all media units */
+/* MCLRACC-1*/ UNIT_FM01 /* mclracc,A==1 in FM0 or FM1 unit. */
+};
+
void
frv_vliw_reset (FRV_VLIW *vliw, unsigned long mach, unsigned long elf_flags)
{
@@ -287,6 +367,10 @@ frv_vliw_reset (FRV_VLIW *vliw, unsigned long mach, unsigned long elf_flags)
vliw->current_vliw = fr400_allowed_vliw;
vliw->unit_mapping = fr400_unit_mapping;
break;
+ case bfd_mach_fr550:
+ vliw->current_vliw = fr550_allowed_vliw;
+ vliw->unit_mapping = fr550_unit_mapping;
+ break;
default:
vliw->current_vliw = fr500_allowed_vliw;
vliw->unit_mapping = fr500_unit_mapping;
@@ -319,6 +403,13 @@ match_unit (FRV_VLIW *vliw,
if (unit1 - unit2 <= 2)
return 1;
break;
+ case UNIT_IALL:
+ case UNIT_FMALL:
+ /* The ALL versions of these units are within 5 enums of the 0, 1, 2 or 3
+ versions. */
+ if (unit1 - unit2 <= 5)
+ return 1;
+ break;
default:
break;
}
@@ -353,7 +444,11 @@ add_next_to_vliw (FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE unit)
VLIW_COMBO *potential;
if (next <= 0)
- abort (); /* Should never happen */
+ {
+ fprintf (stderr, "frv-opc.c line %d: bad vliw->next_slot value.\n",
+ __LINE__);
+ abort (); /* Should never happen */
+ }
/* The table is sorted by units allowed within slots, so vliws with
identical starting sequences are together. */
@@ -408,6 +503,123 @@ fr400_check_insn_major_constraints (
}
static int
+find_unit_in_vliw (
+ FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE unit
+)
+{
+ int i;
+ for (i = 0; i < vliw->next_slot; ++i)
+ if (CGEN_INSN_ATTR_VALUE (vliw->insn[i], CGEN_INSN_UNIT) == unit)
+ return 1;
+
+ return 0; /* not found */
+}
+
+static int
+find_major_in_slot (
+ FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major, CGEN_ATTR_VALUE_TYPE slot
+)
+{
+ int i;
+
+ for (i = 0; i < vliw->next_slot; ++i)
+ if (vliw->major[i] == major && (*vliw->current_vliw)[i] == slot)
+ return 1;
+
+ return 0;
+}
+
+static int
+fr550_find_media_in_vliw (FRV_VLIW *vliw)
+{
+ int i;
+
+ for (i = 0; i < vliw->next_slot; ++i)
+ {
+ if (vliw->major[i] < FR550_MAJOR_M_1 || vliw->major[i] > FR550_MAJOR_M_5)
+ continue;
+
+ /* Found a media insn, however, MNOP and MCLRACC don't count. */
+ if (CGEN_INSN_NUM (vliw->insn[i]) == FRV_INSN_MNOP
+ || CGEN_INSN_NUM (vliw->insn[i]) == FRV_INSN_MCLRACC_0
+ || CGEN_INSN_NUM (vliw->insn[i]) == FRV_INSN_MCLRACC_1)
+ continue;
+
+ return 1; /* found one */
+ }
+
+ return 0;
+}
+
+static int
+fr550_find_float_in_vliw (FRV_VLIW *vliw)
+{
+ int i;
+
+ for (i = 0; i < vliw->next_slot; ++i)
+ {
+ if (vliw->major[i] < FR550_MAJOR_F_1 || vliw->major[i] > FR550_MAJOR_F_4)
+ continue;
+
+ /* Found a floating point insn, however, FNOP doesn't count. */
+ if (CGEN_INSN_NUM (vliw->insn[i]) == FRV_INSN_FNOP)
+ continue;
+
+ return 1; /* found one */
+ }
+
+ return 0;
+}
+
+static int
+fr550_check_insn_major_constraints (
+ FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major, const CGEN_INSN *insn
+)
+{
+ CGEN_ATTR_VALUE_TYPE unit;
+ CGEN_ATTR_VALUE_TYPE slot = (*vliw->current_vliw)[vliw->next_slot];
+ switch (slot)
+ {
+ case UNIT_I2:
+ /* If it's a store, then there must be another store in I1 */
+ unit = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_UNIT);
+ if (unit == UNIT_STORE)
+ return find_unit_in_vliw (vliw, UNIT_STORE);
+ break;
+ case UNIT_FM2:
+ case UNIT_FM3:
+ /* Floating point insns other than FNOP in slot f2 or f3 cannot coexist with
+ media insns. */
+ if (major >= FR550_MAJOR_F_1 && major <= FR550_MAJOR_F_4
+ && CGEN_INSN_NUM (insn) != FRV_INSN_FNOP)
+ return ! fr550_find_media_in_vliw (vliw);
+ /* Media insns other than MNOP in slot m2 or m3 cannot coexist with
+ floating point insns. */
+ if (major >= FR550_MAJOR_M_1 && major <= FR550_MAJOR_M_5
+ && CGEN_INSN_NUM (insn) != FRV_INSN_MNOP)
+ return ! fr550_find_float_in_vliw (vliw);
+ /* F-2 in slot f2 or f3 cannot coexist with F-2 or F-4 in slot f1 or f2
+ respectively.
+ */
+ if (major == FR550_MAJOR_F_2)
+ return ! find_major_in_slot (vliw, FR550_MAJOR_F_2, slot - (UNIT_FM2 - UNIT_FM0))
+ && ! find_major_in_slot (vliw, FR550_MAJOR_F_4, slot - (UNIT_FM2 - UNIT_FM0));
+ /* M-2 or M-5 in slot m2 or m3 cannot coexist with M-2 in slot m1 or m2
+ respectively. */
+ if (major == FR550_MAJOR_M_2 || major == FR550_MAJOR_M_5)
+ return ! find_major_in_slot (vliw, FR550_MAJOR_M_2, slot - (UNIT_FM2 - UNIT_FM0));
+ /* M-4 in slot m2 or m3 cannot coexist with M-4 in slot m1 or m2
+ respectively. */
+ if (major == FR550_MAJOR_M_4)
+ return ! find_major_in_slot (vliw, FR550_MAJOR_M_4, slot - (UNIT_FM2 - UNIT_FM0));
+ break;
+ default:
+ break;
+ }
+ return 1; /* all ok */
+}
+
+static int
fr500_check_insn_major_constraints (
FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major
)
@@ -508,6 +720,8 @@ fr500_check_insn_major_constraints (
&& ! find_major_in_vliw (vliw, FR500_MAJOR_F_6)
&& ! find_major_in_vliw (vliw, FR500_MAJOR_F_7);
default:
+ fprintf (stderr, "frv-opc.c, line %d: bad major code, aborting.\n",
+ __LINE__);
abort ();
break;
}
@@ -516,7 +730,7 @@ fr500_check_insn_major_constraints (
static int
check_insn_major_constraints (
- FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major
+ FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major, const CGEN_INSN *insn
)
{
int rc;
@@ -525,6 +739,9 @@ check_insn_major_constraints (
case bfd_mach_fr400:
rc = fr400_check_insn_major_constraints (vliw, major);
break;
+ case bfd_mach_fr550:
+ rc = fr550_check_insn_major_constraints (vliw, major, insn);
+ break;
default:
rc = fr500_check_insn_major_constraints (vliw, major);
break;
@@ -551,13 +768,20 @@ frv_vliw_add_insn (FRV_VLIW *vliw, const CGEN_INSN *insn)
unit = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_UNIT);
if (unit == UNIT_NIL)
- abort (); /* no UNIT specified for this insn in frv.cpu */
+ {
+ fprintf (stderr, "frv-opc.c line %d: bad insn unit.\n",
+ __LINE__);
+ abort (); /* no UNIT specified for this insn in frv.cpu */
+ }
switch (vliw->mach)
{
case bfd_mach_fr400:
major = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR400_MAJOR);
break;
+ case bfd_mach_fr550:
+ major = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR550_MAJOR);
+ break;
default:
major = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR500_MAJOR);
break;
@@ -569,6 +793,7 @@ frv_vliw_add_insn (FRV_VLIW *vliw, const CGEN_INSN *insn)
while (! match_unit (vliw, unit, (*vliw->current_vliw)[0]))
++vliw->current_vliw;
vliw->major[0] = major;
+ vliw->insn[0] = insn;
vliw->next_slot = 1;
return 0;
}
@@ -579,10 +804,11 @@ frv_vliw_add_insn (FRV_VLIW *vliw, const CGEN_INSN *insn)
if (! (vliw->elf_flags & EF_FRV_NOPACK))
{
new_vliw = add_next_to_vliw (vliw, unit);
- if (new_vliw && check_insn_major_constraints (vliw, major))
+ if (new_vliw && check_insn_major_constraints (vliw, major, insn))
{
vliw->current_vliw = new_vliw;
vliw->major[index] = major;
+ vliw->insn[index] = insn;
vliw->next_slot++;
return 0;
}