summaryrefslogtreecommitdiff
path: root/cpu
diff options
context:
space:
mode:
authorNick Clifton <nickc@redhat.com>2005-07-18 14:13:36 +0000
committerNick Clifton <nickc@redhat.com>2005-07-18 14:13:36 +0000
commit28ed9ab5c7c64bfb90344ead1b89a41488f6f724 (patch)
tree57a7325daa01f9e41a2c0228cd9e5d295cddee79 /cpu
parent9b094831f5770ebfca491115308cbe7804e2a317 (diff)
downloadbinutils-redhat-28ed9ab5c7c64bfb90344ead1b89a41488f6f724.tar.gz
Fix building for MS1 and M32C.
Restore alpha- sorting to the architecture tables.
Diffstat (limited to 'cpu')
-rw-r--r--cpu/m32c.cpu91
-rw-r--r--cpu/m32c.opc513
2 files changed, 208 insertions, 396 deletions
diff --git a/cpu/m32c.cpu b/cpu/m32c.cpu
index 7c7dca113c..095e7cd12a 100644
--- a/cpu/m32c.cpu
+++ b/cpu/m32c.cpu
@@ -195,6 +195,7 @@
(dnf f-16-1 "opcode" (all-isas) 16 1)
(dnf f-16-2 "opcode" (all-isas) 16 2)
(dnf f-16-4 "opcode" (all-isas) 16 4)
+(dnf f-16-8 "opcode" (all-isas) 16 8)
(dnf f-18-1 "opcode" (all-isas) 18 1)
(dnf f-18-2 "opcode" (all-isas) 18 2)
(dnf f-18-3 "opcode" (all-isas) 18 3)
@@ -204,6 +205,8 @@
(dnf f-20-4 "opcode" (all-isas) 20 4)
(dnf f-21-3 "opcode" (all-isas) 21 3)
(dnf f-24-2 "opcode" (all-isas) 24 2)
+(dnf f-24-8 "opcode" (all-isas) 24 8)
+(dnf f-32-16 "opcode" (all-isas) 32 16)
;-------------------------------------------------------------
; Registers
@@ -554,6 +557,14 @@
(and UHI (srl UHI value 8) #x00ff)
(and UHI (sll UHI value 8) #xff00))) ; extract
)
+(df f-dsp-8-u24 "24 bit unsigned" (all-isas) 8 24 UINT
+ ((value pc) (or SI
+ (or (srl value 16) (and value #xff00))
+ (sll (and value #xff) 16)))
+ ((value pc) (or SI
+ (or (srl value 16) (and value #xff00))
+ (sll (and value #xff) 16)))
+ )
(dnmf f-dsp-16-u24 "24 bit unsigned" (all-isas) UINT
(f-dsp-16-u16 f-dsp-32-u8)
@@ -876,15 +887,16 @@
; Labels
;-------------------------------------------------------------
-(df f-lab-5-3 "3 bit pc relative signed offset" (PCREL-ADDR all-isas) 5 3 INT
+(df f-lab-5-3 "3 bit pc relative unsigned offset" (PCREL-ADDR all-isas) 5 3 UINT
((value pc) (sub SI value (add SI pc 2))) ; insert
((value pc) (add SI value (add SI pc 2))) ; extract
)
(dnmf f-lab32-jmp-s "unsigned 3 bit pc relative offset" (PCREL-ADDR all-isas) UINT
(f-2-2 f-7-1)
- (sequence () ; insert
- (set (ifield f-7-1) (and (sub (ifield f-lab32-jmp-s) pc) #x1))
- (set (ifield f-2-2) (srl (sub (ifield f-lab32-jmp-s) pc) 1))
+ (sequence ((SI val)) ; insert
+ (set val (sub (sub (ifield f-lab32-jmp-s) pc) 2))
+ (set (ifield f-7-1) (and val #x1))
+ (set (ifield f-2-2) (srl val 1))
)
(sequence () ; extract
(set (ifield f-lab32-jmp-s) (add pc (add (or (sll (ifield f-2-2) 1)
@@ -1744,6 +1756,10 @@
h-sint DFLT f-dsp-8-s8
((parse "signed8")) () ()
)
+(define-full-operand Dsp-8-u24 "unsigned 24 bit displacement at offset 8 bits" (all-isas)
+ h-uint DFLT f-dsp-8-u24
+ ((parse "unsigned24")) () ()
+)
(define-full-operand Dsp-10-u6 "unsigned 6 bit displacement at offset 10 bits" (all-isas)
h-uint DFLT f-dsp-10-u6
((parse "unsigned6")) () ()
@@ -1825,7 +1841,7 @@
((parse "unsigned8")) () ()
)
(define-full-operand Dsp-40-s8 "signed 8 bit displacement at offset 40 bits" (all-isas)
- h-uint DFLT f-dsp-40-s8
+ h-sint DFLT f-dsp-40-s8
((parse "signed8")) () ()
)
(define-full-operand Dsp-40-u16 "unsigned 16 bit displacement at offset 40 bits" (all-isas)
@@ -1833,7 +1849,7 @@
((parse "unsigned16")) () ()
)
(define-full-operand Dsp-40-s16 "signed 16 bit displacement at offset 40 bits" (all-isas)
- h-uint DFLT f-dsp-40-s16
+ h-sint DFLT f-dsp-40-s16
((parse "signed16")) () ()
)
(define-full-operand Dsp-40-u24 "unsigned 24 bit displacement at offset 40 bits" (all-isas)
@@ -1845,7 +1861,7 @@
((parse "unsigned8")) () ()
)
(define-full-operand Dsp-48-s8 "signed 8 bit displacement at offset 48 bits" (all-isas)
- h-uint DFLT f-dsp-48-s8
+ h-sint DFLT f-dsp-48-s8
((parse "signed8")) () ()
)
(define-full-operand Dsp-48-u16 "unsigned 16 bit displacement at offset 48 bits" (all-isas)
@@ -1853,7 +1869,7 @@
((parse "unsigned16")) () ()
)
(define-full-operand Dsp-48-s16 "signed 16 bit displacement at offset 48 bits" (all-isas)
- h-uint DFLT f-dsp-48-s16
+ h-sint DFLT f-dsp-48-s16
((parse "signed16")) () ()
)
(define-full-operand Dsp-48-u24 "unsigned 24 bit displacement at offset 48 bits" (all-isas)
@@ -1886,7 +1902,7 @@
() () ()
)
(define-full-operand Imm-13-u3 "signed 3 bit immediate at offset 13 bits" (all-isas)
- h-uint DFLT f-imm-13-u3
+ h-sint DFLT f-imm-13-u3
((parse "signed4")) () ()
)
(define-full-operand Imm-20-s4 "signed 4 bit immediate at offset 20 bits" (all-isas)
@@ -1994,7 +2010,7 @@
((parse "unsigned_bitbase8") (print "unsigned_bitbase")) () ()
)
(define-full-operand BitBase16-16-s8 "signed bit,base:8 at offset 16for m16c" (m16c-isa)
- h-uint DFLT f-dsp-16-s8
+ h-sint DFLT f-dsp-16-s8
((parse "signed_bitbase8") (print "signed_bitbase")) () ()
)
(define-full-operand BitBase16-16-u16 "unsigned bit,base:16 at offset 16 for m16c" (m16c-isa)
@@ -2002,7 +2018,7 @@
((parse "unsigned_bitbase16") (print "unsigned_bitbase")) () ()
)
(define-full-operand BitBase16-8-u11-S "signed bit,base:11 at offset 16 for m16c" (m16c-isa)
- h-sint DFLT f-bitbase16-u11-S
+ h-uint DFLT f-bitbase16-u11-S
((parse "unsigned_bitbase11") (print "unsigned_bitbase")) () ()
)
@@ -2050,12 +2066,18 @@
; Labels
;-------------------------------------------------------------
-(dnop Lab-5-3 "3 bit label" (all-isas) h-iaddr f-lab-5-3)
-(dnop Lab32-jmp-s "3 bit label" (all-isas) h-iaddr f-lab32-jmp-s)
-(dnop Lab-8-8 "8 bit label" (all-isas) h-iaddr f-lab-8-8)
-(dnop Lab-8-16 "16 bit label" (all-isas) h-iaddr f-lab-8-16)
+(define-full-operand Lab-5-3 "3 bit label" (all-isas RELAX)
+ h-iaddr DFLT f-lab-5-3
+ ((parse "lab_5_3")) () () )
+
+(define-full-operand Lab32-jmp-s "3 bit label" (all-isas RELAX)
+ h-iaddr DFLT f-lab32-jmp-s
+ ((parse "lab_5_3")) () () )
+
+(dnop Lab-8-8 "8 bit label" (all-isas RELAX) h-iaddr f-lab-8-8)
+(dnop Lab-8-16 "16 bit label" (all-isas RELAX) h-iaddr f-lab-8-16)
(dnop Lab-8-24 "24 bit label" (all-isas) h-iaddr f-lab-8-24)
-(dnop Lab-16-8 "8 bit label" (all-isas) h-iaddr f-lab-16-8)
+(dnop Lab-16-8 "8 bit label" (all-isas RELAX) h-iaddr f-lab-16-8)
(dnop Lab-24-8 "8 bit label" (all-isas) h-iaddr f-lab-24-8)
(dnop Lab-32-8 "8 bit label" (all-isas) h-iaddr f-lab-32-8)
(dnop Lab-40-8 "8 bit label" (all-isas) h-iaddr f-lab-40-8)
@@ -7957,7 +7979,7 @@
(dni jcnd16-5
"jCnd label"
- ((machine 16))
+ (RELAXABLE (machine 16))
"j$cond16j5 ${Lab-8-8}"
(+ (f-0-4 #x6) (f-4-1 1) cond16j5 Lab-8-8)
(jcnd16-sem cond16j5 Lab-8-8)
@@ -7966,7 +7988,7 @@
(dni jcnd16
"jCnd label"
- ((machine 16))
+ (RELAXABLE (machine 16))
"j$cond16j ${Lab-16-8}"
(+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xC) cond16j Lab-16-8)
(jcnd16-sem cond16j Lab-16-8)
@@ -7975,7 +7997,7 @@
(dni jcnd32
"jCnd label"
- ((machine 32))
+ (RELAXABLE (machine 32))
"j$cond32j ${Lab-8-8}"
(+ (f-0-1 1) (f-4-3 5) cond32j Lab-8-8)
(jcnd32-sem cond32j Lab-8-8)
@@ -7987,19 +8009,19 @@
;-------------------------------------------------------------
; jmp.s label3 (m16 #1)
-(dni jmp16.s "jmp.s Lab-5-3" ((machine 16))
+(dni jmp16.s "jmp.s Lab-5-3" (RELAXABLE (machine 16))
("jmp.s ${Lab-5-3}")
(+ (f-0-4 6) (f-4-1 0) Lab-5-3)
(sequence () (set pc Lab-5-3))
())
; jmp.b label8 (m16 #2)
-(dni jmp16.b "jmp.b Lab-8-8" ((machine 16))
+(dni jmp16.b "jmp.b Lab-8-8" (RELAXABLE (machine 16))
("jmp.b ${Lab-8-8}")
(+ (f-0-4 #xF) (f-4-4 #xE) Lab-8-8)
(sequence () (set pc Lab-8-8))
())
; jmp.w label16 (m16 #3)
-(dni jmp16.w "jmp.w Lab-8-16" ((machine 16))
+(dni jmp16.w "jmp.w Lab-8-16" (RELAXABLE (machine 16))
("jmp.w ${Lab-8-16}")
(+ (f-0-4 #xF) (f-4-4 4) Lab-8-16)
(sequence () (set pc Lab-8-16))
@@ -8032,20 +8054,20 @@
; jmp.s label3 (m32 #1)
(dni jmp32.s
"jmp.s label"
- ((machine 32))
+ (RELAXABLE (machine 32))
"jmp.s ${Lab32-jmp-s}"
(+ (f-0-2 1) (f-4-3 5) Lab32-jmp-s)
(set pc Lab32-jmp-s)
()
)
; jmp.b label8 (m32 #2)
-(dni jmp32.b "jmp.b Lab-8-8" ((machine 32))
+(dni jmp32.b "jmp.b Lab-8-8" (RELAXABLE (machine 32))
("jmp.b ${Lab-8-8}")
(+ (f-0-4 #xB) (f-4-4 #xB) Lab-8-8)
(set pc Lab-8-8)
())
; jmp.w label16 (m32 #3)
-(dni jmp32.w "jmp.w Lab-8-16" ((machine 32))
+(dni jmp32.w "jmp.w Lab-8-16" (RELAXABLE (machine 32))
("jmp.w ${Lab-8-16}")
(+ (f-0-4 #xC) (f-4-4 #xE) Lab-8-16)
(set pc Lab-8-16)
@@ -8089,7 +8111,7 @@
)
; jsr.w label16 (m16 #1)
-(dni jsr16.w "jsr.w Lab-8-16" ((machine 16))
+(dni jsr16.w "jsr.w Lab-8-16" (RELAXABLE (machine 16))
("jsr.w ${Lab-8-16}")
(+ (f-0-4 #xF) (f-4-4 5) Lab-8-16)
(jsr16-sem 3 Lab-8-16)
@@ -8145,7 +8167,7 @@
(jsr32-sem 6 dst32-16-24-Unprefixed-SI)
())
; jsr.w label16 (m32 #1)
-(dni jsr32.w "jsr.w label" ((machine 32))
+(dni jsr32.w "jsr.w label" (RELAXABLE (machine 32))
("jsr.w ${Lab-8-16}")
(+ (f-0-4 #xC) (f-4-4 #xF) Lab-8-16)
(jsr32-sem 3 Lab-8-16)
@@ -8531,11 +8553,6 @@
(binary-arith-imm-dst mov G (f-0-4 7) (f-4-3 2) (f-8-4 #xC) #x9 #x2 #xF mov-sem)
; mov.L:G #imm32,dst (m32 #2)
(binary-arith32-imm-dst-defn SI SI .l 0 mov G #xB #x3 #x1 mov-sem)
-; mov.size:Q #imm4,dst (m16 #2 m32 #3)
-(binary-arith16-imm4-dst-defn QI .b 0 0 mov (f-0-4 #xD) (f-4-3 4) mov-sem)
-(binary-arith16-imm4-dst-defn QI .w 0 1 mov (f-0-4 #xD) (f-4-3 4) mov-sem)
-(binary-arith32-imm4-dst-defn QI .b 1 0 mov #x7 #x2 mov-sem)
-(binary-arith32-imm4-dst-defn HI .w 1 1 mov #x7 #x2 mov-sem)
; mov.BW:S #imm,dst2 (m32 #4)
(binary-arith32-s-imm-dst QI .b 0 mov #x0 #x2 mov-sem)
(binary-arith32-s-imm-dst HI .w 1 mov #x0 #x2 mov-sem)
@@ -8558,8 +8575,14 @@
)
(mov32-wl-s-defn HI w #x9 Imm-8-HI a0 #xC)
(mov32-wl-s-defn HI w #x9 Imm-8-HI a1 #xD)
-(mov32-wl-s-defn SI l #xB Dsp-16-u24 a0 #xC)
-(mov32-wl-s-defn SI l #xB Dsp-16-u24 a1 #xD)
+(mov32-wl-s-defn SI l #xB Dsp-8-u24 a0 #xC)
+(mov32-wl-s-defn SI l #xB Dsp-8-u24 a1 #xD)
+
+; mov.size:Q #imm4,dst (m16 #2 m32 #3)
+(binary-arith16-imm4-dst-defn QI .b 0 0 mov (f-0-4 #xD) (f-4-3 4) mov-sem)
+(binary-arith16-imm4-dst-defn QI .w 0 1 mov (f-0-4 #xD) (f-4-3 4) mov-sem)
+(binary-arith32-imm4-dst-defn QI .b 1 0 mov #x7 #x2 mov-sem)
+(binary-arith32-imm4-dst-defn HI .w 1 1 mov #x7 #x2 mov-sem)
; mov.BW:Z #0,dst (m16 #5 m32 #6)
(dni mov16.b-Z-imm8-dst3
diff --git a/cpu/m32c.opc b/cpu/m32c.opc
index 3824118ddc..7caf21d6f6 100644
--- a/cpu/m32c.opc
+++ b/cpu/m32c.opc
@@ -33,8 +33,7 @@
<arch>-opc.c additions use: "-- opc.c"
<arch>-asm.c additions use: "-- asm.c"
<arch>-dis.c additions use: "-- dis.c"
- <arch>-ibd.h additions use: "-- ibd.h"
-*/
+ <arch>-ibd.h additions use: "-- ibd.h". */
/* -- opc.h */
@@ -76,7 +75,7 @@ m32c_asm_hash (const char *mnem)
}
/* -- asm.c */
-#include <ctype.h>
+#include "safe-ctype.h"
#define MACH_M32C 5 /* Must match md_begin. */
@@ -104,25 +103,40 @@ m32c_cgen_isa_register (const char **strp)
return 0;
}
+#define PARSE_UNSIGNED \
+ do \
+ { \
+ /* Don't successfully parse literals beginning with '['. */ \
+ if (**strp == '[') \
+ return "Invalid literal"; /* Anything -- will not be seen. */ \
+ \
+ errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);\
+ if (errmsg) \
+ return errmsg; \
+ } \
+ while (0)
+
+#define PARSE_SIGNED \
+ do \
+ { \
+ /* Don't successfully parse literals beginning with '['. */ \
+ if (**strp == '[') \
+ return "Invalid literal"; /* Anything -- will not be seen. */ \
+ \
+ errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); \
+ if (errmsg) \
+ return errmsg; \
+ } \
+ while (0)
+
static const char *
parse_unsigned6 (CGEN_CPU_DESC cd, const char **strp,
int opindex, unsigned long *valuep)
{
const char *errmsg = 0;
unsigned long value;
- long have_zero = 0;
-
- /* Don't successfully parse literals beginning with '[' */
- if (**strp == '[')
- return "Invalid literal"; /* anything -- will not be seen */
- if (strncmp (*strp, "0x0", 3) == 0
- || (**strp == '0' && *(*strp + 1) != 'x'))
- have_zero = 1;
-
- errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
- if (errmsg)
- return errmsg;
+ PARSE_UNSIGNED;
if (value > 0x3f)
return _("imm:6 immediate is out of range");
@@ -139,17 +153,11 @@ parse_unsigned8 (CGEN_CPU_DESC cd, const char **strp,
unsigned long value;
long have_zero = 0;
- /* Don't successfully parse literals beginning with '[' */
- if (**strp == '[')
- return "Invalid literal"; /* anything -- will not be seen */
-
if (strncmp (*strp, "0x0", 3) == 0
|| (**strp == '0' && *(*strp + 1) != 'x'))
have_zero = 1;
- errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
- if (errmsg)
- return errmsg;
+ PARSE_UNSIGNED;
if (value > 0xff)
return _("dsp:8 immediate is out of range");
@@ -169,18 +177,12 @@ parse_signed4 (CGEN_CPU_DESC cd, const char **strp,
const char *errmsg = 0;
signed long value;
long have_zero = 0;
-
- /* Don't successfully parse literals beginning with '[' */
- if (**strp == '[')
- return "Invalid literal"; /* anything -- will not be seen */
if (strncmp (*strp, "0x0", 3) == 0
|| (**strp == '0' && *(*strp + 1) != 'x'))
have_zero = 1;
- errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
- if (errmsg)
- return errmsg;
+ PARSE_SIGNED;
if (value < -8 || value > 7)
return _("Immediate is out of range -8 to 7");
@@ -200,13 +202,7 @@ parse_signed8 (CGEN_CPU_DESC cd, const char **strp,
const char *errmsg = 0;
signed long value;
- /* Don't successfully parse literals beginning with '[' */
- if (**strp == '[')
- return "Invalid literal"; /* anything -- will not be seen */
-
- errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
- if (errmsg)
- return errmsg;
+ PARSE_SIGNED;
if (value <= 255 && value > 127)
value -= 0x100;
@@ -226,13 +222,13 @@ parse_unsigned16 (CGEN_CPU_DESC cd, const char **strp,
unsigned long value;
long have_zero = 0;
- /* Don't successfully parse literals beginning with '[' */
+ /* Don't successfully parse literals beginning with '['. */
if (**strp == '[')
- return "Invalid literal"; /* anything -- will not be seen */
+ return "Invalid literal"; /* Anything -- will not be seen. */
- /* Don't successfully parse register names */
+ /* Don't successfully parse register names. */
if (m32c_cgen_isa_register (strp))
- return "Invalid literal"; /* anything -- will not be seen */
+ return "Invalid literal"; /* Anything -- will not be seen. */
if (strncmp (*strp, "0x0", 3) == 0
|| (**strp == '0' && *(*strp + 1) != 'x'))
@@ -262,14 +258,8 @@ parse_signed16 (CGEN_CPU_DESC cd, const char **strp,
{
const char *errmsg = 0;
signed long value;
-
- /* Don't successfully parse literals beginning with '[' */
- if (**strp == '[')
- return "Invalid literal"; /* anything -- will not be seen */
- errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
- if (errmsg)
- return errmsg;
+ PARSE_SIGNED;
if (value <= 65535 && value > 32767)
value -= 0x10000;
@@ -288,13 +278,13 @@ parse_unsigned20 (CGEN_CPU_DESC cd, const char **strp,
const char *errmsg = 0;
unsigned long value;
- /* Don't successfully parse literals beginning with '[' */
+ /* Don't successfully parse literals beginning with '['. */
if (**strp == '[')
- return "Invalid literal"; /* anything -- will not be seen */
+ return "Invalid literal"; /* Anything -- will not be seen. */
- /* Don't successfully parse register names */
+ /* Don't successfully parse register names. */
if (m32c_cgen_isa_register (strp))
- return "Invalid literal"; /* anything -- will not be seen */
+ return "Invalid literal"; /* Anything -- will not be seen. */
errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
if (errmsg)
@@ -314,13 +304,13 @@ parse_unsigned24 (CGEN_CPU_DESC cd, const char **strp,
const char *errmsg = 0;
unsigned long value;
- /* Don't successfully parse literals beginning with '[' */
+ /* Don't successfully parse literals beginning with '['. */
if (**strp == '[')
- return "Invalid literal"; /* anything -- will not be seen */
+ return "Invalid literal"; /* Anything -- will not be seen. */
- /* Don't successfully parse register names */
+ /* Don't successfully parse register names. */
if (m32c_cgen_isa_register (strp))
- return "Invalid literal"; /* anything -- will not be seen */
+ return "Invalid literal"; /* Anything -- will not be seen. */
errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
if (errmsg)
@@ -335,21 +325,11 @@ parse_unsigned24 (CGEN_CPU_DESC cd, const char **strp,
static const char *
parse_signed32 (CGEN_CPU_DESC cd, const char **strp,
- int opindex, signed long *valuep)
+ int opindex, signed long *valuep)
{
const char *errmsg = 0;
signed long value;
-#if 0
- /* Don't successfully parse literals beginning with '[' */
- if (**strp == '[')
- return "Invalid literal"; /* anything -- will not be seen */
-
- /* Don't successfully parse register names */
- if (m32c_cgen_isa_register (strp))
- return "Invalid literal"; /* anything -- will not be seen */
-#endif
-
errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
if (errmsg)
return errmsg;
@@ -364,18 +344,8 @@ parse_imm1_S (CGEN_CPU_DESC cd, const char **strp,
{
const char *errmsg = 0;
signed long value;
-
-#if 0
- /* Don't successfully parse literals beginning with '[' */
- if (**strp == '[')
- return "Invalid literal"; /* anything -- will not be seen */
- /* Don't successfully parse register names */
- if (m32c_cgen_isa_register (strp))
- return "Invalid literal"; /* anything -- will not be seen */
-#endif
-
- errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
+ errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
if (errmsg)
return errmsg;
@@ -393,17 +363,7 @@ parse_imm3_S (CGEN_CPU_DESC cd, const char **strp,
const char *errmsg = 0;
signed long value;
-#if 0
- /* Don't successfully parse literals beginning with '[' */
- if (**strp == '[')
- return "Invalid literal"; /* anything -- will not be seen */
-
- /* Don't successfully parse register names */
- if (m32c_cgen_isa_register (strp))
- return "Invalid literal"; /* anything -- will not be seen */
-#endif
-
- errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
+ errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
if (errmsg)
return errmsg;
@@ -415,18 +375,48 @@ parse_imm3_S (CGEN_CPU_DESC cd, const char **strp,
}
static const char *
+parse_lab_5_3 (CGEN_CPU_DESC cd,
+ const char **strp,
+ int opindex ATTRIBUTE_UNUSED,
+ int opinfo,
+ enum cgen_parse_operand_result *type_addr,
+ unsigned long *valuep)
+{
+ const char *errmsg = 0;
+ unsigned long value;
+ enum cgen_parse_operand_result op_res;
+
+ errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_5_3,
+ opinfo, & op_res, & value);
+
+ if (type_addr)
+ *type_addr = op_res;
+
+ if (op_res == CGEN_PARSE_OPERAND_ADDRESS)
+ {
+ /* This is a hack; the field cannot handle near-zero signed
+ offsets that CGEN wants to put in to indicate an "empty"
+ operand at first. */
+ *valuep = 2;
+ return 0;
+ }
+ if (errmsg)
+ return errmsg;
+
+ if (value < 2 || value > 9)
+ return _("immediate is out of range 2-9");
+
+ *valuep = value;
+ return 0;
+}
+
+static const char *
parse_Bitno16R (CGEN_CPU_DESC cd, const char **strp,
int opindex, unsigned long *valuep)
{
const char *errmsg = 0;
unsigned long value;
-#if 0
- /* Don't successfully parse literals beginning with '[' */
- if (**strp == '[')
- return "Invalid literal"; /* anything -- will not be seen */
-#endif
-
errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
if (errmsg)
return errmsg;
@@ -449,12 +439,6 @@ parse_unsigned_bitbase (CGEN_CPU_DESC cd, const char **strp,
const char *newp = *strp;
unsigned long long bitbase;
-#if 0
- /* Don't successfully parse literals beginning with '[' */
- if (**strp == '[')
- return "Invalid literal"; /* anything -- will not be seen */
-#endif
-
errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & bit);
if (errmsg)
return errmsg;
@@ -467,7 +451,7 @@ parse_unsigned_bitbase (CGEN_CPU_DESC cd, const char **strp,
if (errmsg)
return errmsg;
- bitbase = (unsigned long long)bit + ((unsigned long long)base * 8);
+ bitbase = (unsigned long long) bit + ((unsigned long long) base * 8);
if (bitbase >= (1ull << bits))
return _("bit,base is out of range");
@@ -489,12 +473,6 @@ parse_signed_bitbase (CGEN_CPU_DESC cd, const char **strp,
long long bitbase;
long long limit;
-#if 0
- /* Don't successfully parse literals beginning with '[' */
- if (**strp == '[')
- return "Invalid literal"; /* anything -- will not be seen */
-#endif
-
errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & bit);
if (errmsg)
return errmsg;
@@ -575,21 +553,22 @@ parse_signed_bitbase19 (CGEN_CPU_DESC cd, const char **strp,
}
/* Parse the suffix as :<char> or as nothing followed by a whitespace. */
+
static const char *
parse_suffix (const char **strp, char suffix)
{
const char *newp = *strp;
- if (**strp == ':' && tolower (*(*strp + 1)) == suffix)
+ if (**strp == ':' && TOLOWER (*(*strp + 1)) == suffix)
newp = *strp + 2;
- if (isspace (*newp))
+ if (ISSPACE (*newp))
{
*strp = newp;
return 0;
}
- return "Invalid suffix"; /* anything -- will not be seen */
+ return "Invalid suffix"; /* Anything -- will not be seen. */
}
static const char *
@@ -621,6 +600,7 @@ parse_Z (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
}
/* Parse an empty suffix. Fail if the next char is ':'. */
+
static const char *
parse_X (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
@@ -639,16 +619,16 @@ parse_r0l_r0h (CGEN_CPU_DESC cd, const char **strp,
signed long junk;
const char *newp = *strp;
- /* Parse r0[hl] */
+ /* Parse r0[hl]. */
errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0l_r0h, & value);
if (errmsg)
return errmsg;
if (*newp != ',')
- return "not a valid r0l/r0h pair";
+ return _("not a valid r0l/r0h pair");
++newp;
- /* Parse the second register in the pair */
+ /* Parse the second register in the pair. */
if (value == 0) /* r0l */
errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0h, & junk);
else
@@ -661,7 +641,8 @@ parse_r0l_r0h (CGEN_CPU_DESC cd, const char **strp,
return 0;
}
-/* Accept .b or .w in any case */
+/* Accept .b or .w in any case. */
+
static const char *
parse_size (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
@@ -671,196 +652,14 @@ parse_size (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
|| *(*strp + 1) == 'w' || *(*strp + 1) == 'W'))
{
*strp += 2;
- return 0;
+ return NULL;
}
- return "Invalid size specifier";
+
+ return _("Invalid size specifier");
}
-/* static const char * parse_abs (CGEN_CPU_DESC, const char **, int, */
-/* unsigned long *, unsigned long); */
-/* static const char * parse_abs16 (CGEN_CPU_DESC, const char **, int, */
-/* int ATTRIBUTE_UNUSED, */
-/* enum cgen_parse_operand_result * ATTRIBUTE_UNUSED, */
-/* unsigned long * ); */
-/* static const char * parse_abs24 (CGEN_CPU_DESC, const char **, int, */
-/* int ATTRIBUTE_UNUSED, */
-/* enum cgen_parse_operand_result * ATTRIBUTE_UNUSED, */
-/* unsigned long *); */
-
-/* /\* Parse absolute *\/ */
-
-/* static const char * */
-/* parse_abs16 (CGEN_CPU_DESC cd, const char **strp, int opindex, */
-/* int reloc ATTRIBUTE_UNUSED, */
-/* enum cgen_parse_operand_result *type_addr ATTRIBUTE_UNUSED, */
-/* unsigned long *valuep) */
-/* { */
-/* return parse_abs (cd, strp, opindex, valuep, 16); */
-/* } */
-
-/* static const char * */
-/* parse_abs24 (CGEN_CPU_DESC cd, const char **strp, int opindex, */
-/* int reloc ATTRIBUTE_UNUSED, */
-/* enum cgen_parse_operand_result *type_addr ATTRIBUTE_UNUSED, */
-/* unsigned long *valuep) */
-/* { */
-/* return parse_abs (cd, strp, opindex, valuep, 24); */
-/* } */
-
-/* static const char * */
-/* parse_abs (CGEN_CPU_DESC cd, const char **strp, int opindex, */
-/* unsigned long *valuep, */
-/* unsigned long length) */
-/* { */
-/* const char *errmsg = 0; */
-/* const char *op; */
-/* int has_register = 0; */
-
-/* for (op = *strp; *op != '\0'; op++) */
-/* { */
-/* if (*op == '[') */
-/* { */
-/* has_register = 1; */
-/* break; */
-/* } */
-/* else if (*op == ',') */
-/* break; */
-/* } */
-
-/* if (has_register || m32c_cgen_isa_register (strp)) */
-/* errmsg = _("immediate value cannot be register"); */
-/* else */
-/* { */
-/* enum cgen_parse_operand_result result_type; */
-/* bfd_vma value; */
-/* const char *errmsg; */
-
-/* errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_HI16, */
-/* &result_type, &value); */
-/* *valuep = value; */
-/* } */
-/* return errmsg; */
-/* } */
-/* /\* Handle signed/unsigned literal. *\/ */
-
-/* static const char * */
-/* parse_imm8 (cd, strp, opindex, valuep) */
-/* CGEN_CPU_DESC cd; */
-/* const char **strp; */
-/* int opindex; */
-/* unsigned long *valuep; */
-/* { */
-/* const char *errmsg = 0; */
-/* long value; */
-/* long have_zero = 0; */
-
-/* if (strncmp (*strp, "0x0", 3) == 0 */
-/* || (**strp == '0' && *(*strp + 1) != 'x')) */
-/* have_zero = 1; */
-/* errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); */
-/* *valuep = value; */
-/* /\* If this field may require a relocation then use larger dsp16. *\/ */
-/* if (! have_zero && value == 0) */
-/* errmsg = _("immediate value may not fit in dsp8 field"); */
-
-/* return errmsg; */
-/* } */
-
-/* static const char * */
-/* parse_imm16 (cd, strp, opindex, valuep) */
-/* CGEN_CPU_DESC cd; */
-/* const char **strp; */
-/* int opindex; */
-/* unsigned long *valuep; */
-/* { */
-/* const char *errmsg; */
-/* long value; */
-
-/* errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); */
-/* *valuep = value; */
-/* return errmsg; */
-/* } */
-
-/* static const char * */
-/* parse_imm24 (cd, strp, opindex, valuep) */
-/* CGEN_CPU_DESC cd; */
-/* const char **strp; */
-/* int opindex; */
-/* unsigned long *valuep; */
-/* { */
-/* const char *errmsg; */
-/* long value; */
-
-/* errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); */
-/* *valuep = value; */
-/* return errmsg; */
-/* } */
-
-/* static const char * */
-/* parse_imm32 (cd, strp, opindex, valuep) */
-/* CGEN_CPU_DESC cd; */
-/* const char **strp; */
-/* int opindex; */
-/* unsigned long *valuep; */
-/* { */
-/* const char *errmsg; */
-/* long value; */
-
-/* errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); */
-/* *valuep = value; */
-/* return errmsg; */
-/* } */
-
-/* /\* Handle bitfields. *\/ */
-
-/* static const char * */
-/* parse_boff8 (cd, strp, opindex, valuep) */
-/* CGEN_CPU_DESC cd; */
-/* const char **strp; */
-/* int opindex; */
-/* unsigned long *valuep; */
-/* { */
-/* const char *errmsg; */
-/* long bit_value, value; */
-
-/* errmsg = cgen_parse_signed_integer (cd, strp, opindex, & bit_value); */
-/* if (errmsg == 0) */
-/* { */
-/* *strp = *strp + 1; */
-/* errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); */
-/* } */
-/* value = value * 8 + bit_value; */
-/* *valuep = value; */
-/* if (value > 0x100) */
-/* errmsg = _("Operand out of range. Must be between 0 and 255."); */
-/* return errmsg; */
-/* } */
-
-/* static const char * */
-/* parse_boff16 (cd, strp, opindex, valuep) */
-/* CGEN_CPU_DESC cd; */
-/* const char **strp; */
-/* int opindex; */
-/* unsigned long *valuep; */
-/* { */
-/* const char *errmsg; */
-/* long bit_value, value; */
-
-/* errmsg = cgen_parse_signed_integer (cd, strp, opindex, & bit_value); */
-/* if (errmsg == 0) */
-/* { */
-/* *strp = *strp + 1; */
-/* errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); */
-/* } */
-/* value = value * 8 + bit_value; */
-/* *valuep = value; */
-/* if (value > 0x1000) */
-/* errmsg = _("Operand out of range. Must be between 0 and 65535."); */
-/* return errmsg; */
-/* } */
-
-
-/* Special check to ensure that instruction exists for given machine */
+/* Special check to ensure that instruction exists for given machine. */
+
int
m32c_cgen_insn_supported (CGEN_CPU_DESC cd,
const CGEN_INSN *insn)
@@ -868,7 +667,7 @@ m32c_cgen_insn_supported (CGEN_CPU_DESC cd,
int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH);
int isas = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_ISA);
- /* If attributes are absent, assume no restriction. */
+ /* If attributes are absent, assume no restriction. */
if (machs == 0)
machs = ~0;
@@ -883,8 +682,7 @@ parse_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
const char **strp,
int opindex ATTRIBUTE_UNUSED,
unsigned long *valuep,
- int push
- )
+ int push)
{
const char *errmsg = 0;
int regno = 0;
@@ -940,23 +738,23 @@ parse_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
return errmsg;
}
-#define POP 0
+#define POP 0
#define PUSH 1
static const char *
parse_pop_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
- const char **strp,
- int opindex ATTRIBUTE_UNUSED,
- unsigned long *valuep)
+ const char **strp,
+ int opindex ATTRIBUTE_UNUSED,
+ unsigned long *valuep)
{
return parse_regset (cd, strp, opindex, valuep, POP);
}
static const char *
parse_push_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
- const char **strp,
- int opindex ATTRIBUTE_UNUSED,
- unsigned long *valuep)
+ const char **strp,
+ int opindex ATTRIBUTE_UNUSED,
+ unsigned long *valuep)
{
return parse_regset (cd, strp, opindex, valuep, PUSH);
}
@@ -966,17 +764,19 @@ parse_push_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
#include "elf/m32c.h"
#include "elf-bfd.h"
-/* Always print the short insn format suffix as ':<char>' */
+/* Always print the short insn format suffix as ':<char>'. */
+
static void
-print_suffix (PTR dis_info, char suffix)
+print_suffix (void * dis_info, char suffix)
{
disassemble_info *info = dis_info;
+
(*info->fprintf_func) (info->stream, ":%c", suffix);
}
static void
print_S (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
- PTR dis_info,
+ void * dis_info,
long value ATTRIBUTE_UNUSED,
unsigned int attrs ATTRIBUTE_UNUSED,
bfd_vma pc ATTRIBUTE_UNUSED,
@@ -988,7 +788,7 @@ print_S (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
static void
print_G (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
- PTR dis_info,
+ void * dis_info,
long value ATTRIBUTE_UNUSED,
unsigned int attrs ATTRIBUTE_UNUSED,
bfd_vma pc ATTRIBUTE_UNUSED,
@@ -999,7 +799,7 @@ print_G (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
static void
print_Q (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
- PTR dis_info,
+ void * dis_info,
long value ATTRIBUTE_UNUSED,
unsigned int attrs ATTRIBUTE_UNUSED,
bfd_vma pc ATTRIBUTE_UNUSED,
@@ -1010,7 +810,7 @@ print_Q (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
static void
print_Z (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
- PTR dis_info,
+ void * dis_info,
long value ATTRIBUTE_UNUSED,
unsigned int attrs ATTRIBUTE_UNUSED,
bfd_vma pc ATTRIBUTE_UNUSED,
@@ -1019,10 +819,11 @@ print_Z (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
print_suffix (dis_info, 'z');
}
-/* Print the empty suffix */
+/* Print the empty suffix. */
+
static void
print_X (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
- PTR dis_info ATTRIBUTE_UNUSED,
+ void * dis_info ATTRIBUTE_UNUSED,
long value ATTRIBUTE_UNUSED,
unsigned int attrs ATTRIBUTE_UNUSED,
bfd_vma pc ATTRIBUTE_UNUSED,
@@ -1033,13 +834,14 @@ print_X (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
static void
print_r0l_r0h (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
- PTR dis_info,
+ void * dis_info,
long value,
unsigned int attrs ATTRIBUTE_UNUSED,
bfd_vma pc ATTRIBUTE_UNUSED,
int length ATTRIBUTE_UNUSED)
{
disassemble_info *info = dis_info;
+
if (value == 0)
(*info->fprintf_func) (info->stream, "r0h,r0l");
else
@@ -1048,62 +850,65 @@ print_r0l_r0h (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
static void
print_unsigned_bitbase (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
- PTR dis_info,
+ void * dis_info,
unsigned long value,
unsigned int attrs ATTRIBUTE_UNUSED,
bfd_vma pc ATTRIBUTE_UNUSED,
int length ATTRIBUTE_UNUSED)
{
disassemble_info *info = dis_info;
+
(*info->fprintf_func) (info->stream, "%ld,0x%lx", value & 0x7, value >> 3);
}
static void
print_signed_bitbase (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
- PTR dis_info,
+ void * dis_info,
signed long value,
unsigned int attrs ATTRIBUTE_UNUSED,
bfd_vma pc ATTRIBUTE_UNUSED,
int length ATTRIBUTE_UNUSED)
{
disassemble_info *info = dis_info;
+
(*info->fprintf_func) (info->stream, "%ld,%ld", value & 0x7, value >> 3);
}
static void
print_size (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
- PTR dis_info,
+ void * dis_info,
long value ATTRIBUTE_UNUSED,
unsigned int attrs ATTRIBUTE_UNUSED,
bfd_vma pc ATTRIBUTE_UNUSED,
int length ATTRIBUTE_UNUSED)
{
- /* Always print the size as '.w' */
+ /* Always print the size as '.w'. */
disassemble_info *info = dis_info;
+
(*info->fprintf_func) (info->stream, ".w");
}
-#define POP 0
+#define POP 0
#define PUSH 1
-static void print_pop_regset (CGEN_CPU_DESC, PTR, long, unsigned int, bfd_vma, int);
-static void print_push_regset (CGEN_CPU_DESC, PTR, long, unsigned int, bfd_vma, int);
+static void print_pop_regset (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
+static void print_push_regset (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
/* Print a set of registers, R0,R1,A0,A1,SB,FB. */
static void
print_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
- PTR dis_info,
- long value,
- unsigned int attrs ATTRIBUTE_UNUSED,
- bfd_vma pc ATTRIBUTE_UNUSED,
- int length ATTRIBUTE_UNUSED,
- int push)
+ void * dis_info,
+ long value,
+ unsigned int attrs ATTRIBUTE_UNUSED,
+ bfd_vma pc ATTRIBUTE_UNUSED,
+ int length ATTRIBUTE_UNUSED,
+ int push)
{
static char * m16c_register_names [] =
- {
- "r0", "r1", "r2", "r3", "a0", "a1", "sb", "fb"
- };
+ {
+ "r0", "r1", "r2", "r3", "a0", "a1", "sb", "fb"
+ };
disassemble_info *info = dis_info;
int mask;
int index = 0;
@@ -1138,38 +943,22 @@ print_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
static void
print_pop_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
- PTR dis_info,
- long value,
- unsigned int attrs ATTRIBUTE_UNUSED,
- bfd_vma pc ATTRIBUTE_UNUSED,
- int length ATTRIBUTE_UNUSED)
+ void * dis_info,
+ long value,
+ unsigned int attrs ATTRIBUTE_UNUSED,
+ bfd_vma pc ATTRIBUTE_UNUSED,
+ int length ATTRIBUTE_UNUSED)
{
print_regset (cd, dis_info, value, attrs, pc, length, POP);
}
static void
print_push_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
- PTR dis_info,
- long value,
- unsigned int attrs ATTRIBUTE_UNUSED,
- bfd_vma pc ATTRIBUTE_UNUSED,
- int length ATTRIBUTE_UNUSED)
+ void * dis_info,
+ long value,
+ unsigned int attrs ATTRIBUTE_UNUSED,
+ bfd_vma pc ATTRIBUTE_UNUSED,
+ int length ATTRIBUTE_UNUSED)
{
print_regset (cd, dis_info, value, attrs, pc, length, PUSH);
}
-#if 0 /* not used? */
-static void
-print_boff (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
- PTR dis_info,
- long value,
- unsigned int attrs ATTRIBUTE_UNUSED,
- bfd_vma pc ATTRIBUTE_UNUSED,
- int length ATTRIBUTE_UNUSED)
-{
- disassemble_info *info = dis_info;
- if (value)
- info->fprintf_func (info->stream, "%d,%d", value % 16,
- (value / 16) * 2);
-}
-
-#endif /* not used? */