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authorSterling Augustine <sterling@tensilica.com>2010-11-23 19:19:36 +0000
committerSterling Augustine <sterling@tensilica.com>2010-11-23 19:19:36 +0000
commit053138927fed250eb0eb24b2160f24b962a72ef7 (patch)
treef85d116d01a9f0602be7f323a9ffcbb966baf74c /gas/doc/as.texinfo
parente1cffffd802eb3d50c4f3e0718d1f194c58d8dc0 (diff)
downloadbinutils-redhat-053138927fed250eb0eb24b2160f24b962a72ef7.tar.gz
2010-11-23 Sterling Augustine <sterling@tensilica.com>
* doc/as.texinfo: Refer to and include c-xtensa.texi for Xtensa options. Move Xtensa options to proper alphabetical location. * doc/c-xtensa.texi: Add markup for use in manpage generation.
Diffstat (limited to 'gas/doc/as.texinfo')
-rw-r--r--gas/doc/as.texinfo70
1 files changed, 26 insertions, 44 deletions
diff --git a/gas/doc/as.texinfo b/gas/doc/as.texinfo
index bddd93cfa2..a981814e4b 100644
--- a/gas/doc/as.texinfo
+++ b/gas/doc/as.texinfo
@@ -480,6 +480,15 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}.
[@b{-mpid=no}|@b{-mpid=near}|@b{-mpid=far}] [@b{-mpic}|@b{-mno-pic}]
@end ifset
+@ifset XTENSA
+
+@emph{Target Xtensa options:}
+ [@b{--[no-]text-section-literals}] [@b{--[no-]absolute-literals}]
+ [@b{--[no-]target-align}] [@b{--[no-]longcalls}]
+ [@b{--[no-]transform}]
+ [@b{--rename-section} @var{oldname}=@var{newname}]
+@end ifset
+
@ifset Z80
@emph{Target Z80 options:}
@@ -495,14 +504,7 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}.
@ifset Z8000
@c Z8000 has no machine-dependent assembler options
@end ifset
-@ifset XTENSA
-@emph{Target Xtensa options:}
- [@b{--[no-]text-section-literals}] [@b{--[no-]absolute-literals}]
- [@b{--[no-]target-align}] [@b{--[no-]longcalls}]
- [@b{--[no-]transform}]
- [@b{--rename-section} @var{oldname}=@var{newname}]
-@end ifset
@c man end
@end smallexample
@@ -1324,47 +1326,27 @@ TMS320C6000 processor.
@end ifset
-@c man begin OPTIONS
@ifset XTENSA
-The following options are available when @value{AS} is configured for
-an Xtensa processor.
-@table @gcctabopt
-@item --text-section-literals | --no-text-section-literals
-With @option{--text-@-section-@-literals}, literal pools are interspersed
-in the text section. The default is
-@option{--no-@-text-@-section-@-literals}, which places literals in a
-separate section in the output file. These options only affect literals
-referenced via PC-relative @code{L32R} instructions; literals for
-absolute mode @code{L32R} instructions are handled separately.
-
-@item --absolute-literals | --no-absolute-literals
-Indicate to the assembler whether @code{L32R} instructions use absolute
-or PC-relative addressing. The default is to assume absolute addressing
-if the Xtensa processor includes the absolute @code{L32R} addressing
-option. Otherwise, only the PC-relative @code{L32R} mode can be used.
-
-@item --target-align | --no-target-align
-Enable or disable automatic alignment to reduce branch penalties at the
-expense of some code density. The default is @option{--target-@-align}.
-
-@item --longcalls | --no-longcalls
-Enable or disable transformation of call instructions to allow calls
-across a greater range of addresses. The default is
-@option{--no-@-longcalls}.
-
-@item --transform | --no-transform
-Enable or disable all assembler transformations of Xtensa instructions.
-The default is @option{--transform};
-@option{--no-transform} should be used only in the rare cases when the
-instructions must be exactly as specified in the assembly source.
-
-@item --rename-section @var{oldname}=@var{newname}
-When generating output sections, rename the @var{oldname} section to
-@var{newname}.
-@end table
+@ifclear man
+@xref{Xtensa Options}, for the options available when @value{AS} is configured
+for an Xtensa processor.
+@end ifclear
+
+@ifset man
+@c man begin OPTIONS
+The following options are available when @value{AS} is configured for an
+Xtensa processor.
+@c man end
+@c man begin INCLUDE
+@include c-xtensa.texi
+@c ended inside the included file
@end ifset
+@end ifset
+
+@c man begin OPTIONS
+
@ifset Z80
The following options are available when @value{AS} is configured for
a Z80 family processor.