diff options
author | qneill <qneill> | 2011-01-17 18:40:28 +0000 |
---|---|---|
committer | qneill <qneill> | 2011-01-17 18:40:28 +0000 |
commit | 1568ec31f45e7b2311a57d9fc89a59e928657738 (patch) | |
tree | 9f5b7de2673f79b257d50429330242d2b81be645 /gas/doc/c-i386.texi | |
parent | 48ad14fa35327a794a24fb6e0f6a9bd07eb94e8c (diff) | |
download | binutils-redhat-1568ec31f45e7b2311a57d9fc89a59e928657738.tar.gz |
Add support for TBM instructions.
gas/
2011-01-17 Quentin Neill <quentin.neill@amd.com>
* config/tc-i386.c (cpu_arch): Add CPU_TBM_FLAGS.
* doc/c-i386.texi (i386-TBM): New section.
opcodes/
2011-01-17 Quentin Neill <quentin.neill@amd.com>
* i386-dis.c (REG_XOP_TBM_01): New.
(REG_XOP_TBM_02): New.
(reg_table): Add REG_XOP_TBM_01 and REG_XOP_TBM_02 tables.
(xop_table): Redirect to REG_XOP_TBM_01 and REG_XOP_TBM_02
entries, and add bextr instruction.
* i386-gen.c (cpu_flag_init): Add CPU_TBM_FLAGS, CpuTBM.
(cpu_flags): Add CpuTBM.
* i386-opc.h (CpuTBM) New.
(i386_cpu_flags): Add bit cputbm.
* i386-opc.tbl: Add bextr, blcfill, blci, blcic, blcmsk,
blcs, blsfill, blsic, t1mskc, and tzmsk.
* i386-init.h: Regenerated.
* i386-tbl.h: Regenerated
gas/testsuite
2011-01-17 Quentin Neill <quentin.neill@amd.com>
* gas/i386/tbm.s: New.
* gas/i386/tbm.d: New.
* gas/i386/tbm-intel.d: New.
* gas/i386/x86-64-tbm.s: New.
* gas/i386/x86-64-tbm.d: New.
* gas/i386/x86-64-tbm-intel.d: New.
* gas/i386/arch-10.d: Add tbm flag and TBM instruction pattern.
* gas/i386/arch-10.s: Add a TBM instruction.
* gas/i386/arch-10-1.l: Add TBM instruction pattern.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
Diffstat (limited to 'gas/doc/c-i386.texi')
-rw-r--r-- | gas/doc/c-i386.texi | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi index d330f8604c..be4de8a416 100644 --- a/gas/doc/c-i386.texi +++ b/gas/doc/c-i386.texi @@ -36,6 +36,7 @@ extending the Intel architecture to 64-bits. * i386-SIMD:: Intel's MMX and AMD's 3DNow! SIMD Operations * i386-LWP:: AMD's Lightweight Profiling Instructions * i386-BMI:: Bit Manipulation Instruction +* i386-TBM:: AMD's Trailing Bit Manipulation Instructions * i386-16bit:: Writing 16-bit Code * i386-Arch:: Specifying an x86 CPU architecture * i386-Bugs:: AT&T Syntax bugs @@ -860,6 +861,21 @@ resetting. @c Need to add a specification citation here when available. +@node i386-TBM +@section AMD's Trailing Bit Manipulation Instructions + +@cindex TBM, i386 +@cindex TBM, x86-64 + +@code{@value{AS}} supports AMD's Trailing Bit Manipulation (TBM) +instruction set, available on AMD's BDVER2 processors (Trinity and +Viperfish). + +TBM instructions provide instructions implementing individual bit +manipulation operations such as isolating, masking, setting, resetting, +complementing, and operations on trailing zeros and ones. + +@c Need to add a specification citation here when available. @node i386-16bit @section Writing 16-bit Code |