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authorAlan Modra <amodra@bigpond.net.au>2011-02-10 11:59:11 +0000
committerAlan Modra <amodra@bigpond.net.au>2011-02-10 11:59:11 +0000
commita0e17338976e82e7850171774035b1f9b7895818 (patch)
tree00eaec24e2ed09e4ee63a73ede836c435567cf78 /gas/doc/c-ppc.texi
parenta446ef2f3862fb5f89c669b34a2b6a2ab943ff96 (diff)
downloadbinutils-redhat-a0e17338976e82e7850171774035b1f9b7895818.tar.gz
* config/tc-ppc.c (md_show_usage): Remove -l and -b. Add -K PIC.
* doc/as.texinfo: Refer to and include c-ppc.texi for PowerPC options. (Overview <Target PowerPC options>): Add a number of missing options. * doc/c-ppc.texi: Likewise. Add markup for use in manpage generation.
Diffstat (limited to 'gas/doc/c-ppc.texi')
-rw-r--r--gas/doc/c-ppc.texi38
1 files changed, 31 insertions, 7 deletions
diff --git a/gas/doc/c-ppc.texi b/gas/doc/c-ppc.texi
index f0bcbd5df4..d5572b5396 100644
--- a/gas/doc/c-ppc.texi
+++ b/gas/doc/c-ppc.texi
@@ -2,6 +2,7 @@
@c Free Software Foundation, Inc.
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
+@c man end
@ifset GENERIC
@page
@node PPC-Dependent
@@ -34,7 +35,17 @@ reference manual.
The following table lists all available PowerPC options.
-@table @code
+@c man begin OPTIONS
+@table @gcctabopt
+@item -a32
+Generate ELF32 or XCOFF32.
+
+@item -a64
+Generate ELF64 or XCOFF64.
+
+@item -K PIC
+Set EF_PPC_RELOCATABLE_LIB in ELF flags.
+
@item -mpwrx | -mpwr2
Generate code for POWER/2 (RIOS2).
@@ -53,6 +64,9 @@ Generate code for PowerPC 403/405.
@item -m440
Generate code for PowerPC 440. BookE and some 405 instructions.
+@item -m464
+Generate code for PowerPC 464.
+
@item -m476
Generate code for PowerPC 476.
@@ -68,6 +82,12 @@ Generate code for PowerPC 620/625/630.
@item -me500, -me500x2
Generate code for Motorola e500 core complex.
+@item -me500mc
+Generate code for Freescale e500mc core complex.
+
+@item -me500mc64
+Generate code for Freescale e500mc64 core complex.
+
@item -mspe
Generate code for Motorola SPE instructions.
@@ -92,16 +112,16 @@ Generate code for processors with AltiVec instructions.
@item -mvsx
Generate code for processors with Vector-Scalar (VSX) instructions.
-@item -mpower4
+@item -mpower4, -mpwr4
Generate code for Power4 architecture.
-@item -mpower5
+@item -mpower5, -mpwr5, -mpwr5x
Generate code for Power5 architecture.
-@item -mpower6
+@item -mpower6, -mpwr6
Generate code for Power6 architecture.
-@item -mpower7
+@item -mpower7, -mpwr7
Generate code for Power7 architecture.
@item -mcell
@@ -128,10 +148,10 @@ Support for GCC's -mrelocatable-lib option.
@item -memb
Set PPC_EMB bit in ELF flags.
-@item -mlittle, -mlittle-endian
+@item -mlittle, -mlittle-endian, -le
Generate code for a little endian machine.
-@item -mbig, -mbig-endian
+@item -mbig, -mbig-endian, -be
Generate code for a big endian machine.
@item -msolaris
@@ -139,7 +159,11 @@ Generate code for Solaris.
@item -mno-solaris
Do not generate code for Solaris.
+
+@item -nops=@var{count}
+When aligning, more than @var{count} nops uses a branch.
@end table
+@c man end
@node PowerPC-Pseudo