summaryrefslogtreecommitdiff
path: root/gas/testsuite/gas/s390/zarch-z196.d
diff options
context:
space:
mode:
authorAndreas Krebbel <Andreas.Krebbel@de.ibm.com>2011-05-24 16:13:27 +0000
committerAndreas Krebbel <Andreas.Krebbel@de.ibm.com>2011-05-24 16:13:27 +0000
commit27a1cec71330933a55b3e4c26a2289656c8ad819 (patch)
treecfb30bf4b9ff2cb8e5ef12f05dcbbe23961984dd /gas/testsuite/gas/s390/zarch-z196.d
parent8b4354a89594758a5ed47577f4cab5ccbbcfdeea (diff)
downloadbinutils-redhat-27a1cec71330933a55b3e4c26a2289656c8ad819.tar.gz
2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* config/tc-s390.c (md_gather_operands): Fix check for floating register pair operands. 2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> * opcode/s390.h: Replace S390_OPERAND_REG_EVEN with S390_OPERAND_REG_PAIR. 2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> * s390-opc.c: Replace S390_OPERAND_REG_EVEN with S390_OPERAND_REG_PAIR. Fix INSTR_RRF_0UFEF instruction type. * s390-opc.txt: Fix cxr instruction type. 2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> * gas/s390/esa-g5.d: Fix fp register pair operands. * gas/s390/esa-g5.s: Likewise. * gas/s390/zarch-z196.d: Likewise. * gas/s390/zarch-z196.s: Likewise. * gas/s390/zarch-z9-109.d: Likewise. * gas/s390/zarch-z9-109.s: Likewise. * gas/s390/zarch-z9-ec.d: Likewise. * gas/s390/zarch-z9-ec.s: Likewise.
Diffstat (limited to 'gas/testsuite/gas/s390/zarch-z196.d')
-rw-r--r--gas/testsuite/gas/s390/zarch-z196.d28
1 files changed, 14 insertions, 14 deletions
diff --git a/gas/testsuite/gas/s390/zarch-z196.d b/gas/testsuite/gas/s390/zarch-z196.d
index 0ac7a5fa1f..4e65ad53ca 100644
--- a/gas/testsuite/gas/s390/zarch-z196.d
+++ b/gas/testsuite/gas/s390/zarch-z196.d
@@ -200,16 +200,16 @@ Disassembly of section .text:
.*: b9 ae 00 67 [ ]*rrbm %r6,%r7
.*: b3 94 37 59 [ ]*cefbra %f5,3,%r9,7
.*: b3 95 37 59 [ ]*cdfbra %f5,3,%r9,7
-.*: b3 96 37 69 [ ]*cxfbra %f6,3,%r9,7
+.*: b3 96 37 59 [ ]*cxfbra %f5,3,%r9,7
.*: b3 a4 37 59 [ ]*cegbra %f5,3,%r9,7
.*: b3 a5 37 59 [ ]*cdgbra %f5,3,%r9,7
-.*: b3 a6 37 69 [ ]*cxgbra %f6,3,%r9,7
+.*: b3 a6 37 59 [ ]*cxgbra %f5,3,%r9,7
.*: b3 90 37 59 [ ]*celfbr %f5,3,%r9,7
.*: b3 91 37 59 [ ]*cdlfbr %f5,3,%r9,7
-.*: b3 92 37 69 [ ]*cxlfbr %f6,3,%r9,7
+.*: b3 92 37 59 [ ]*cxlfbr %f5,3,%r9,7
.*: b3 a0 37 59 [ ]*celgbr %f5,3,%r9,7
.*: b3 a1 37 59 [ ]*cdlgbr %f5,3,%r9,7
-.*: b3 a2 37 69 [ ]*cxlgbr %f6,3,%r9,7
+.*: b3 a2 37 59 [ ]*cxlgbr %f5,3,%r9,7
.*: b3 98 37 59 [ ]*cfebra %r5,3,%f9,7
.*: b3 99 37 59 [ ]*cfdbra %r5,3,%f9,7
.*: b3 9a 37 58 [ ]*cfxbra %r5,3,%f8,7
@@ -224,18 +224,18 @@ Disassembly of section .text:
.*: b3 ae 37 58 [ ]*clgxbr %r5,3,%f8,7
.*: b3 57 37 59 [ ]*fiebra %f5,3,%f9,7
.*: b3 5f 37 59 [ ]*fidbra %f5,3,%f9,7
-.*: b3 47 37 68 [ ]*fixbra %f6,3,%f8,7
+.*: b3 47 37 58 [ ]*fixbra %f5,3,%f8,7
.*: b3 44 37 59 [ ]*ledbra %f5,3,%f9,7
-.*: b3 45 37 68 [ ]*ldxbra %f6,3,%f8,7
-.*: b3 46 37 68 [ ]*lexbra %f6,3,%f8,7
+.*: b3 45 37 58 [ ]*ldxbra %f5,3,%f8,7
+.*: b3 46 37 58 [ ]*lexbra %f5,3,%f8,7
.*: b3 d2 97 35 [ ]*adtra %f3,%f5,%f9,7
-.*: b3 da 67 24 [ ]*axtra %f2,%f4,%f6,7
+.*: b3 da 57 14 [ ]*axtra %f1,%f4,%f5,7
.*: b3 f1 37 59 [ ]*cdgtra %f5,3,%r9,7
.*: b9 51 37 59 [ ]*cdftr %f5,3,%r9,7
-.*: b9 59 37 69 [ ]*cxftr %f6,3,%r9,7
-.*: b3 f9 37 69 [ ]*cxgtra %f6,3,%r9,7
+.*: b9 59 37 59 [ ]*cxftr %f5,3,%r9,7
+.*: b3 f9 37 59 [ ]*cxgtra %f5,3,%r9,7
.*: b9 52 37 59 [ ]*cdlgtr %f5,3,%r9,7
-.*: b9 5a 37 69 [ ]*cxlgtr %f6,3,%r9,7
+.*: b9 5a 37 59 [ ]*cxlgtr %f5,3,%r9,7
.*: b9 53 37 59 [ ]*cdlftr %f5,3,%r9,7
.*: b9 5b 37 59 [ ]*cxlftr %f5,3,%r9,7
.*: b3 e1 37 59 [ ]*cgdtra %r5,3,%f9,7
@@ -247,9 +247,9 @@ Disassembly of section .text:
.*: b9 43 37 59 [ ]*clfdtr %r5,3,%f9,7
.*: b9 4b 37 58 [ ]*clfxtr %r5,3,%f8,7
.*: b3 d1 97 35 [ ]*ddtra %f3,%f5,%f9,7
-.*: b3 d9 67 24 [ ]*dxtra %f2,%f4,%f6,7
+.*: b3 d9 57 14 [ ]*dxtra %f1,%f4,%f5,7
.*: b3 d0 97 35 [ ]*mdtra %f3,%f5,%f9,7
-.*: b3 d8 67 24 [ ]*mxtra %f2,%f4,%f6,7
+.*: b3 d8 57 14 [ ]*mxtra %f1,%f4,%f5,7
.*: b3 d3 97 35 [ ]*sdtra %f3,%f5,%f9,7
-.*: b3 db 67 24 [ ]*sxtra %f2,%f4,%f6,7
+.*: b3 db 57 14 [ ]*sxtra %f1,%f4,%f5,7
.*: b2 b8 7f a0 [ ]*srnmb 4000\(%r7\)