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authorH.J. Lu <hjl@lucon.org>2009-12-16 02:10:43 +0000
committerH.J. Lu <hjl@lucon.org>2009-12-16 02:10:43 +0000
commit31ef6c7bc2556b3da454e663779c8eacac28cf4d (patch)
tree5183bb6b1d141dde6bfc5d3aa17250c62a3586b2 /gas
parent9afbabf64f1d22448a10af638b7d94b4d57be7fe (diff)
downloadbinutils-redhat-31ef6c7bc2556b3da454e663779c8eacac28cf4d.tar.gz
Remove VexW0 and VexW1. Add VexW.
gas/ 2009-12-15 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (build_vex_prefix): Replace vexw0/vexw1 with vexw. (build_modrm_byte): Likewise. opcodes/ 2009-12-15 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (opcode_modifiers): Remove VexW0 and VexW1. Add VexW. * i386-opc.h (VexW0): Removed. (VexW1): Likewise. (VEXW0): New. (VEXW1): Likewise. (VexW): Likewise. (i386_opcode_modifier): Remove vexw0 and vexw1. Add vexw. * i386-opc.tbl: Replace VexW0 with VexW=1 and VexW1 with Vex=2. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
Diffstat (limited to 'gas')
-rw-r--r--gas/ChangeLog6
-rw-r--r--gas/config/tc-i386.c10
2 files changed, 11 insertions, 5 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 595cbfb51a..837020ed81 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,11 @@
2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
+ * config/tc-i386.c (build_vex_prefix): Replace vexw0/vexw1
+ with vexw.
+ (build_modrm_byte): Likewise.
+
+2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
+
* as.h (mempcpy): New.
* configure.in: Check if mempcpy is declared.
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 1b96a5ff3b..ac99ffd014 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -2776,12 +2776,12 @@ build_vex_prefix (const insn_template *t)
/* Check the REX.W bit. */
w = (i.rex & REX_W) ? 1 : 0;
- if (i.tm.opcode_modifier.vexw0 || i.tm.opcode_modifier.vexw1)
+ if (i.tm.opcode_modifier.vexw)
{
if (w)
abort ();
- if (i.tm.opcode_modifier.vexw1)
+ if (i.tm.opcode_modifier.vexw == VEXW1)
w = 1;
}
@@ -4961,7 +4961,7 @@ build_modrm_byte (void)
i.operands++;
/* If VexW1 is set, the first operand is the source and
the second operand is encoded in the immediate operand. */
- if (i.tm.opcode_modifier.vexw1)
+ if (i.tm.opcode_modifier.vexw == VEXW1)
{
source = 0;
reg_slot = 1;
@@ -5319,7 +5319,7 @@ build_modrm_byte (void)
{
/* VEX.vvvv encodes one of the sources when the first
operand is not an immediate. */
- if (i.tm.opcode_modifier.vexw0)
+ if (i.tm.opcode_modifier.vexw == VEXW0)
i.vex.register_specifier = i.op[0].regs;
else
i.vex.register_specifier = i.op[1].regs;
@@ -5336,7 +5336,7 @@ build_modrm_byte (void)
{
i.rm.mode = 3;
- if (i.tm.opcode_modifier.vexw0)
+ if (i.tm.opcode_modifier.vexw == VEXW0)
i.rm.regmem = i.op[1].regs->reg_num;
else
i.rm.regmem = i.op[0].regs->reg_num;