diff options
| author | Eric B. Weddington <eric.weddington@atmel.com> | 2011-03-22 18:10:39 +0000 |
|---|---|---|
| committer | Eric B. Weddington <eric.weddington@atmel.com> | 2011-03-22 18:10:39 +0000 |
| commit | e81a5b49b547af521be99e93f8acd941b477deb3 (patch) | |
| tree | e1f5cc242ecf50bd4f6fb6986a694f29ca7920f9 /ld/Makefile.am | |
| parent | f2a20acf115da27668ae9b158c6c3547ca7e5222 (diff) | |
| download | binutils-redhat-e81a5b49b547af521be99e93f8acd941b477deb3.tar.gz | |
/bfd:
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* archures.c: Add AVR XMEGA architecture information.
* cpu-avr.c (arch_info_struct): Likewise.
* elf32-avr.c (bfd_elf_avr_final_write_processing): Likewise.
(elf32_avr_object_p): Likewise.
/gas:
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* config/tc-avr.c (struct avr_opcodes_s): Add opcode field.
(AVR_INSN): Change definition to match.
(avr_opcodes): Likewise, change to match.
(mcu_types): Add XMEGA architecture names and new XMEGA device names.
(md_show_usage): Add XMEGA architecture names.
(avr_operand): Add 'E' constraint for DES instruction of XMEGA devices.
Add support for SPM Z+ instruction.
* doc/c-avr.texi: Add documentation for XMEGA architectures and
devices.
/include/opcode:
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* avr.h (AVR_ISA_SPMX,AVR_ISA_DES,AVR_ISA_M256,AVR_ISA_XMEGA):
New instruction set flags.
(AVR_INSN): Add new instructions for SPM Z+, DES for XMEGA.
/ld:
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* Makefile.am (ALL_EMULATION_SOURCES): Add AVR XMEGA architectures.
(eavrxmega?.c): Likewise.
* configure.tgt (targ_extra_emuls): Likewise.
* emulparams/avrxmega1.sh: New file.
* emulparams/avrxmega2.sh: Likewise.
* emulparams/avrxmega3.sh: Likewise.
* emulparams/avrxmega4.sh: Likewise.
* emulparams/avrxmega5.sh: Likewise.
* emulparams/avrxmega6.sh: Likewise.
* emulparams/avrxmega7.sh: Likewise.
* emultempl/avrelf.em (avr_elf_${EMULATION_NAME}_before_allocation):
Add avrxmega6, avrxmega7 to list of architectures for no stubs.
/opcodes:
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* avr-dis.c (avr_operand): Add opcode_str parameter. Check for
post-increment to support LPM Z+ instruction. Add support for 'E'
constraint for DES instruction.
(print_insn_avr): Adjust calls to avr_operand. Rename variable.
Diffstat (limited to 'ld/Makefile.am')
| -rw-r--r-- | ld/Makefile.am | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/ld/Makefile.am b/ld/Makefile.am index 75f13a447c..a9e76f8345 100644 --- a/ld/Makefile.am +++ b/ld/Makefile.am @@ -163,6 +163,13 @@ ALL_EMULATION_SOURCES = \ eavr5.c \ eavr51.c \ eavr6.c \ + eavrxmega1.o \ + eavrxmega2.o \ + eavrxmega3.o \ + eavrxmega4.o \ + eavrxmega5.o \ + eavrxmega6.o \ + eavrxmega7.o \ ecoff_i860.c \ ecoff_sparc.c \ ecrisaout.c \ @@ -773,6 +780,34 @@ eavr6.c: $(srcdir)/emulparams/avr6.sh $(srcdir)/emultempl/avrelf.em \ $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \ ${GEN_DEPENDS} ${GENSCRIPTS} avr6 "$(tdir_avr2)" +eavrxmega1.c: $(srcdir)/emulparams/avrxmega1.sh \ + $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \ + ${GEN_DEPENDS} + ${GENSCRIPTS} avrxmega1 "$(tdir_avr2)" +eavrxmega2.c: $(srcdir)/emulparams/avrxmega2.sh \ + $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \ + ${GEN_DEPENDS} + ${GENSCRIPTS} avrxmega2 "$(tdir_avr2)" +eavrxmega3.c: $(srcdir)/emulparams/avrxmega3.sh \ + $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \ + ${GEN_DEPENDS} + ${GENSCRIPTS} avrxmega3 "$(tdir_avr2)" +eavrxmega4.c: $(srcdir)/emulparams/avrxmega4.sh \ + $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \ + ${GEN_DEPENDS} + ${GENSCRIPTS} avrxmega4 "$(tdir_avr2)" +eavrxmega5.c: $(srcdir)/emulparams/avrxmega5.sh \ + $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \ + ${GEN_DEPENDS} + ${GENSCRIPTS} avrxmega5 "$(tdir_avr2)" +eavrxmega6.c: $(srcdir)/emulparams/avrxmega6.sh \ + $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \ + ${GEN_DEPENDS} + ${GENSCRIPTS} avrxmega6 "$(tdir_avr2)" +eavrxmega7.c: $(srcdir)/emulparams/avrxmega7.sh \ + $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \ + ${GEN_DEPENDS} + ${GENSCRIPTS} avrxmega7 "$(tdir_avr2)" ecoff_i860.c: $(srcdir)/emulparams/coff_i860.sh \ $(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/i860coff.sc ${GEN_DEPENDS} ${GENSCRIPTS} coff_i860 "$(tdir_coff_i860)" |