diff options
| author | jwlemke <jwlemke> | 2012-05-14 19:45:12 +0000 |
|---|---|---|
| committer | jwlemke <jwlemke> | 2012-05-14 19:45:12 +0000 |
| commit | d360760c1ee65711b8aad5646244cb9d50374a93 (patch) | |
| tree | e71e429c9530547591aea77eb231e8adfd9d5f1f /ld | |
| parent | c3a06b22c1872a58837153715756c2bb6940088d (diff) | |
| download | binutils-redhat-d360760c1ee65711b8aad5646244cb9d50374a93.tar.gz | |
Add support for PowerPC VLE.
2012-05-14 Catherine Moore <clm@codesourcery.com>
* NEWS: Mention PowerPC VLE port.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
bfd/
* bfd.c (bfd_lookup_section_flags): Add section parm.
* ecoff.c (bfd_debug_section): Remove flag_info initializer.
* elf-bfd.h (bfd_elf_section_data): Move in section_flag_info.
(bfd_elf_lookup_section_flags): Add section parm.
* elf32-ppc.c (is_ppc_vle): New function.
(ppc_elf_modify_segment_map): New function.
(elf_backend_modify_segment_map): Define.
(has_vle_insns): New define.
* elf32-ppc.h (ppc_elf_modify_segment_map): Declare.
* elflink.c (bfd_elf_lookup_section_flags): Add return value & parm.
Move in logic to omit / include a section.
* libbfd-in.h (bfd_link_info): Add section parm.
(bfd_generic_lookup_section_flags): Likewise.
* reloc.c (bfd_generic_lookup_section_flags): Likewise.
* section.c (bfd_section): Move out section_flag_info.
(BFD_FAKE_SECTION): Remove flag_info initializer.
* targets.c (_bfd_lookup_section_flags): Add section parm.
2012-05-14 Catherine Moore <clm@codesourcery.com>
bfd/
* archures.c (bfd_mach_ppc_vle): New.
* bfd-in2.h: Regenerated.
* cpu-powerpc.c (bfd_powerpc_archs): New entry for vle.
* elf32-ppc.c (split16_format_type): New enumeration.
(ppc_elf_vle_split16): New function.
(HOWTO): Add entries for R_PPC_VLE relocations.
(ppc_elf_reloc_type_lookup): Handle PPC_VLE relocations.
(ppc_elf_section_flags): New function.
(ppc_elf_lookup_section_flags): New function.
(ppc_elf_section_processing): New function.
(ppc_elf_check_relocs): Handle PPC_VLE relocations.
(ppc_elf_relocation_section): Likewise.
(elf_backend_lookup_section_flags_hook): Define.
(elf_backend_section_flags): Define.
(elf_backend_section_processing): Define.
* elf32-ppc.h (ppc_elf_section_processing): Declare.
* libbfd.h: Regenerated.
* reloc.c (BFD_RELOC_PPC_VLE_REL8, BFD_RELOC_PPC_VLE_REL15,
BFD_RELOC_PPC_VLE_REL24, BFD_RELOC_PPC_VLE_LO16A,
BFD_RELOC_PPC_VLE_LO16D, BFD_RELOC_PPC_VLE_HI16A,
BFD_RELOC_PPC_VLE_HI16D, BFD_RELOC_PPC_VLE_HA16A,
BFD_RELOC_PPC_VLE_HA16D, BFD_RELOC_PPC_VLE_SDA21,
BFD_RELOC_PPC_VLE_SDA21_LO, BFD_RELOC_PPC_VLE_SDAREL_LO16A,
BFD_RELOC_PPC_VLE_SDAREL_LO16D, BFD_RELOC_PPC_VLE_SDAREL_HI16A,
BFD_RELOC_PPC_VLE_SDAREL_HI16D, BFD_RELOC_PPC_VLE_SDAREL_HA16A,
BFD_RELOC_PPC_VLE_SDAREL_HA16D): New bfd relocations.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
gas/
* config/tc-ppc.c (insn_validate): New func of existing code to call..
(ppc_setup_opcodes): ..from 2 places here.
Revise for second (VLE) opcode table.
Add #ifdef'd code to print opcode tables.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
gas/
* config/tc-ppc.c (ppc_setup_opcodes): Allow out-of-order
for the VLE conditional branches.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
gas/
* config/tc-ppc.c (PPC_VLE_SPLIT16A): New macro.
(PPC_VLE_SPLIT16D): New macro.
(PPC_VLE_LO16A): New macro.
(PPC_VLE_LO16D): New macro.
(PPC_VLE_HI16A): New macro.
(PPC_VLE_HI16D): New macro.
(PPC_VLE_HA16A): New macro.
(PPC_VLE_HA16D): New macro.
(PPC_APUINFO_VLE): New definition.
(md_chars_to_number): New function.
(md_parse_option): Check for combinations of little
endian and -mvle.
(md_show_usage): Document -mvle.
(ppc_arch): Recognize VLE.
(ppc_mach): Recognize bfd_mach_ppc_vle.
(ppc_setup_opcodes): Print the opcode table if
* config/tc-ppc.h (ppc_frag_check): Declare.
* doc/c-ppc.texi: Document -mvle.
* NEWS: Mention PowerPC VLE port.
2012-05-14 Catherine Moore <clm@codesourcery.com>
gas/
* config/tc-ppc.h (ppc_dw2_line_min_insn_length): Declare.
(DWARF2_LINE_MIN_INSN_LENGTH): Redefine.
* config/tc-ppc.c (ppc_dw2_line_min_insn_length): New.
* dwarf2dbg.c (scale_addr_delta): Handle values of 1
for DWARF2_LINE_MIN_INSN_LENGTH.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
gas/testsuite/
* gas/ppc/ppc.exp: Run new tests.
* gas/ppc/vle-reloc.d: New test.
* gas/ppc/vle-reloc.s: New test.
* gas/ppc/vle-simple-1.d: New test.
* gas/ppc/vle-simple-1.s: New test.
* gas/ppc/vle-simple-2.d: New test.
* gas/ppc/vle-simple-2.s: New test.
* gas/ppc/vle-simple-3.d: New test.
* gas/ppc/vle-simple-3.s: New test.
* gas/ppc/vle-simple-4.d: New test.
* gas/ppc/vle-simple-4.s: New test.
* gas/ppc/vle-simple-5.d: New test.
* gas/ppc/vle-simple-5.s: New test.
* gas/ppc/vle-simple-6.d: New test.
* gas/ppc/vle-simple-6.s: New test.
* gas/ppc/vle.d: New test.
* gas/ppc/vle.s: New test.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
include/elf/
* ppc.h (SEC_PPC_VLE): Remove.
2012-05-14 Catherine Moore <clm@codesourcery.com>
James Lemke <jwlemke@codesourcery.com>
include/elf/
* ppc.h (R_PPC_VLE_REL8): New reloction.
(R_PPC_VLE_REL15): Likewise.
(R_PPC_VLE_REL24): Likewise.
(R_PPC_VLE_LO16A): Likewise.
(R_PPC_VLE_LO16D): Likewise.
(R_PPC_VLE_HI16A): Likewise.
(R_PPC_VLE_HI16D): Likewise.
(R_PPC_VLE_HA16A): Likewise.
(R_PPC_VLE_HA16D): Likewise.
(R_PPC_VLE_SDA21): Likewise.
(R_PPC_VLE_SDA21_LO): Likewise.
(R_PPC_VLE_SDAREL_LO16A): Likewise.
(R_PPC_VLE_SDAREL_LO16D): Likewise.
(R_PPC_VLE_SDAREL_HI16A): Likewise.
(R_PPC_VLE_SDAREL_HI16D): Likewise.
(R_PPC_VLE_SDAREL_HA16A): Likewise.
(R_PPC_VLE_SDAREL_HA16D): Likewise.
(SEC_PPC_VLE): Remove.
(PF_PPC_VLE): New program header flag.
(SHF_PPC_VLE): New section header flag.
(vle_opcodes, vle_num_opcodes): New.
(VLE_OP): New macro.
(VLE_OP_TO_SEG): New macro.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
include/opcode/
* ppc.h (PPC_OPCODE_VLE): New definition.
(PPC_OP_SA): New macro.
(PPC_OP_SE_VLE): New macro.
(PPC_OP): Use a variable shift amount.
(powerpc_operand): Update comments.
(PPC_OPSHIFT_INV): New macro.
(PPC_OPERAND_CR): Replace with...
(PPC_OPERAND_CR_BIT): ...this and
(PPC_OPERAND_CR_REG): ...this.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
ld/
* ldlang.c (walk_wild_consider_section): Don't copy section_flag_list.
Pass it to callback.
(walk_wild_section_general): Pass section_flag_list to callback.
(lang_add_section): Add sflag_list parm.
Move out logic to keep / omit a section & call bfd_lookup_section_flags.
(output_section_callback_fast): Add sflag_list parm.
Add new parm to lang_add_section calls.
(output_section_callback): Likewise.
(check_section_callback): Add sflag_list parm.
(lang_place_orphans): Add new parm to lang_add_section calls.
(gc_section_callback): Add sflag_list parm.
(find_relro_section_callback): Likewise.
* ldlang.h (callback_t): Add flag_info parm.
(lang_add_section): Add sflag_list parm.
* emultempl/armelf.em (elf32_arm_add_stub_section):
Add lang_add_section parm.
* emultempl/beos.em (gld*_place_orphan): Likewise.
* emultempl/elf32.em (gld*_place_orphan): Likewise.
* emultempl/hppaelf.em (hppaelf_add_stub_section): Likewise.
* emultempl/m68hc1xelf.em (m68hc11elf_add_stub_section): Likewise.
* emultempl/mipself.em (mips_add_stub_section): Likewise.
* emultempl/mmo.em (mmo_place_orphan): Likewise.
* emultempl/pe.em (gld_*_place_orphan): Likewise.
* emultempl/pep.em (gld_*_place_orphan): Likewise.
* emultempl/ppc64elf.em (ppc_add_stub_section): Likewise.
* emultempl/spuelf.em (spu_place_special_section): Likewise.
* emultempl/vms.em (vms_place_orphan): Likewise.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
ld/testsuite/
* ld-powerpc/powerpc.exp: Create ppceabitests.
* ld-powerpc/vle-multiseg.s: New.
* ld-powerpc/vle-multiseg-1.d: New.
* ld-powerpc/vle-multiseg-1.ld: New.
* ld-powerpc/vle-multiseg-2.d: New.
* ld-powerpc/vle-multiseg-2.ld: New.
* ld-powerpc/vle-multiseg-3.d: New.
* ld-powerpc/vle-multiseg-3.ld: New.
* ld-powerpc/vle-multiseg-4.d: New.
* ld-powerpc/vle-multiseg-4.ld: New.
* ld-powerpc/vle-multiseg-5.d: New.
* ld-powerpc/vle-multiseg-5.ld: New.
* ld-powerpc/vle-multiseg-6.d: New.
* ld-powerpc/vle-multiseg-6.ld: New.
* ld-powerpc/vle-multiseg-6a.s: New.
* ld-powerpc/vle-multiseg-6b.s: New.
* ld-powerpc/vle-multiseg-6c.s: New.
* ld-powerpc/vle-multiseg-6d.s: New.
* ld-powerpc/powerpc.exp: Run new tests.
2012-05-14 Catherine Moore <clm@codesourcery.com>
ld/
* NEWS: Mention PowerPC VLE port.
2012-05-14 Catherine Moore <clm@codesourcery.com>
ld/testsuite/
* ld-powerpc/apuinfo.rd: Update for VLE.
* ld-powerpc/vle-reloc-1.d: New.
* ld-powerpc/vle-reloc-1.s: New.
* ld-powerpc/vle-reloc-2.d: New.
* ld-powerpc/vle-reloc-2.s: New.
* ld-powerpc/vle-reloc-3.d: New.
* ld-powerpc/vle-reloc-3.s: New.
* ld-powerpc/vle-reloc-def-1.s: New.
* ld-powerpc/vle-reloc-def-2.s: New.
* ld-powerpc/vle-reloc-def-3.s: New.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
opcodes/
* ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
(PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
(vle_opcd_indices): New array.
(lookup_vle): New function.
(disassemble_init_powerpc): Revise for second (VLE) opcode table.
(print_insn_powerpc): Likewise.
* ppc-opc.c: Likewise.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
Nathan Froyd <froydnj@codesourcery.com>
opcodes/
* ppc-opc.c (insert_arx, extract_arx): New functions.
(insert_ary, extract_ary): New functions.
(insert_li20, extract_li20): New functions.
(insert_rx, extract_rx): New functions.
(insert_ry, extract_ry): New functions.
(insert_sci8, extract_sci8): New functions.
(insert_sci8n, extract_sci8n): New functions.
(insert_sd4h, extract_sd4h): New functions.
(insert_sd4w, extract_sd4w): New functions.
(insert_vlesi, extract_vlesi): New functions.
(insert_vlensi, extract_vlensi): New functions.
(insert_vleui, extract_vleui): New functions.
(insert_vleil, extract_vleil): New functions.
(BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
(BI16, BI32, BO32, B8): New.
(B15, B24, CRD32, CRS): New.
(CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
(DB, IMM20, RD, Rx, ARX, RY, RZ): New.
(ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
(SH6_MASK): Use PPC_OPSHIFT_INV.
(SI8, UI5, OIMM5, UI7, BO16): New.
(VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
(XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
(ALLOW8_SPRG): New.
(insert_sprg, extract_sprg): Check ALLOW8_SPRG.
(OPVUP, OPVUP_MASK OPVUP): New
(BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
(EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
(BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
(BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
(IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
(IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
(SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
(SE_IM5, SE_IM5_MASK): New.
(SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
(EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
(BO32DNZ, BO32DZ): New.
(NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
(PPCVLE): New.
(powerpc_opcodes): Add new VLE instructions. Update existing
instruction to include PPCVLE if supported.
* ppc-dis.c (ppc_opts): Add vle entry.
(get_powerpc_dialect): New function.
(powerpc_init_dialect): VLE support.
(print_insn_big_powerpc): Call get_powerpc_dialect.
(print_insn_little_powerpc): Likewise.
(operand_value_powerpc): Handle negative shift counts.
(print_insn_powerpc): Handle 2-byte instruction lengths.
Diffstat (limited to 'ld')
45 files changed, 841 insertions, 52 deletions
diff --git a/ld/ChangeLog b/ld/ChangeLog index 7c1aef6754..b93216cedb 100644 --- a/ld/ChangeLog +++ b/ld/ChangeLog @@ -1,3 +1,37 @@ +2012-05-14 James Lemke <jwlemke@codesourcery.com> + + * ldlang.c (walk_wild_consider_section): Don't copy section_flag_list. + Pass it to callback. + (walk_wild_section_general): Pass section_flag_list to callback. + (lang_add_section): Add sflag_list parm. + Move out logic to keep / omit a section & call bfd_lookup_section_flags. + (output_section_callback_fast): Add sflag_list parm. + Add new parm to lang_add_section calls. + (output_section_callback): Likewise. + (check_section_callback): Add sflag_list parm. + (lang_place_orphans): Add new parm to lang_add_section calls. + (gc_section_callback): Add sflag_list parm. + (find_relro_section_callback): Likewise. + * ldlang.h (callback_t): Add flag_info parm. + (lang_add_section): Add sflag_list parm. + * emultempl/armelf.em (elf32_arm_add_stub_section): + Add lang_add_section parm. + * emultempl/beos.em (gld*_place_orphan): Likewise. + * emultempl/elf32.em (gld*_place_orphan): Likewise. + * emultempl/hppaelf.em (hppaelf_add_stub_section): Likewise. + * emultempl/m68hc1xelf.em (m68hc11elf_add_stub_section): Likewise. + * emultempl/mipself.em (mips_add_stub_section): Likewise. + * emultempl/mmo.em (mmo_place_orphan): Likewise. + * emultempl/pe.em (gld_*_place_orphan): Likewise. + * emultempl/pep.em (gld_*_place_orphan): Likewise. + * emultempl/ppc64elf.em (ppc_add_stub_section): Likewise. + * emultempl/spuelf.em (spu_place_special_section): Likewise. + * emultempl/vms.em (vms_place_orphan): Likewise. + +2012-05-14 Catherine Moore <clm@codesourcery.com> + + * NEWS: Mention PowerPC VLE port. + 2012-05-11 Daniel Richard G. <skunk@iskunk.org> PR binutils/14028 @@ -1,5 +1,7 @@ -*- text -*- +* Add support for the VLE extension to the PowerPC architecture. + * Add support for the Freescale XGATE architecture. * Add option -f FILE on AIX (for response file). diff --git a/ld/emultempl/armelf.em b/ld/emultempl/armelf.em index 78224f4389..3b881dd24d 100644 --- a/ld/emultempl/armelf.em +++ b/ld/emultempl/armelf.em @@ -208,7 +208,7 @@ elf32_arm_add_stub_section (const char *stub_sec_name, info.input_section = input_section; lang_list_init (&info.add); - lang_add_section (&info.add, stub_sec, os); + lang_add_section (&info.add, stub_sec, NULL, os); if (info.add.head == NULL) goto err_ret; diff --git a/ld/emultempl/beos.em b/ld/emultempl/beos.em index cd96729f08..2071d8ef99 100644 --- a/ld/emultempl/beos.em +++ b/ld/emultempl/beos.em @@ -718,7 +718,7 @@ gld${EMULATION_NAME}_place_orphan (asection *s, The sections still have to be sorted, but that has to wait until all such sections have been processed by us. The sorting is done by sort_sections. */ - lang_add_section (&l->wild_statement.children, s, os); + lang_add_section (&l->wild_statement.children, s, NULL, os); return os; } diff --git a/ld/emultempl/elf32.em b/ld/emultempl/elf32.em index 7d318646eb..880f054ff9 100644 --- a/ld/emultempl/elf32.em +++ b/ld/emultempl/elf32.em @@ -1861,7 +1861,7 @@ gld${EMULATION_NAME}_place_orphan (asection *s, If the section already exists but does not have any flags set, then it has been created by the linker, probably as a result of a --section-start command line switch. */ - lang_add_section (&os->children, s, os); + lang_add_section (&os->children, s, NULL, os); return os; } @@ -1875,7 +1875,7 @@ gld${EMULATION_NAME}_place_orphan (asection *s, unused one and use that. */ if (match_by_name) { - lang_add_section (&match_by_name->children, s, match_by_name); + lang_add_section (&match_by_name->children, s, NULL, match_by_name); return match_by_name; } @@ -1901,7 +1901,7 @@ gld${EMULATION_NAME}_place_orphan (asection *s, && hold[orphan_text].os != NULL) { os = hold[orphan_text].os; - lang_add_section (&os->children, s, os); + lang_add_section (&os->children, s, NULL, os); return os; } diff --git a/ld/emultempl/hppaelf.em b/ld/emultempl/hppaelf.em index 41df8a2bd1..65c1ea5e87 100644 --- a/ld/emultempl/hppaelf.em +++ b/ld/emultempl/hppaelf.em @@ -195,7 +195,7 @@ hppaelf_add_stub_section (const char *stub_sec_name, asection *input_section) info.input_section = input_section; lang_list_init (&info.add); - lang_add_section (&info.add, stub_sec, os); + lang_add_section (&info.add, stub_sec, NULL, os); if (info.add.head == NULL) goto err_ret; diff --git a/ld/emultempl/m68hc1xelf.em b/ld/emultempl/m68hc1xelf.em index 4751346bce..deeefcef30 100644 --- a/ld/emultempl/m68hc1xelf.em +++ b/ld/emultempl/m68hc1xelf.em @@ -271,7 +271,7 @@ m68hc11elf_add_stub_section (const char *stub_sec_name, at the correct place. */ info.input_section = tramp_section; lang_list_init (&info.add); - lang_add_section (&info.add, stub_sec, os); + lang_add_section (&info.add, stub_sec, NULL, os); if (info.add.head == NULL) goto err_ret; diff --git a/ld/emultempl/mipself.em b/ld/emultempl/mipself.em index ada0786321..9ac61a2a47 100644 --- a/ld/emultempl/mipself.em +++ b/ld/emultempl/mipself.em @@ -180,7 +180,7 @@ mips_add_stub_section (const char *stub_sec_name, asection *input_section, /* Initialize a statement list that contains only the new statement. */ lang_list_init (&info.add); - lang_add_section (&info.add, stub_sec, os); + lang_add_section (&info.add, stub_sec, NULL, os); if (info.add.head == NULL) goto err_ret; diff --git a/ld/emultempl/mmo.em b/ld/emultempl/mmo.em index 9b18186aa7..a1d5472f27 100644 --- a/ld/emultempl/mmo.em +++ b/ld/emultempl/mmo.em @@ -75,7 +75,7 @@ mmo_place_orphan (asection *s, (regardless of whether the linker script lists it as input). */ if (os != NULL) { - lang_add_section (&os->children, s, os); + lang_add_section (&os->children, s, NULL, os); return os; } diff --git a/ld/emultempl/pe.em b/ld/emultempl/pe.em index fe188f7de6..947f6ad71f 100644 --- a/ld/emultempl/pe.em +++ b/ld/emultempl/pe.em @@ -1915,7 +1915,7 @@ gld_${EMULATION_NAME}_place_orphan (asection *s, If the section already exists but does not have any flags set, then it has been created by the linker, probably as a result of a --section-start command line switch. */ - lang_add_section (&add_child, s, os); + lang_add_section (&add_child, s, NULL, os); break; } @@ -1929,7 +1929,7 @@ gld_${EMULATION_NAME}_place_orphan (asection *s, unused one and use that. */ if (os == NULL && match_by_name) { - lang_add_section (&match_by_name->children, s, match_by_name); + lang_add_section (&match_by_name->children, s, NULL, match_by_name); return match_by_name; } diff --git a/ld/emultempl/pep.em b/ld/emultempl/pep.em index a24c30a909..d3f5c83b9c 100644 --- a/ld/emultempl/pep.em +++ b/ld/emultempl/pep.em @@ -1651,7 +1651,7 @@ gld_${EMULATION_NAME}_place_orphan (asection *s, If the section already exists but does not have any flags set, then it has been created by the linker, probably as a result of a --section-start command line switch. */ - lang_add_section (&add_child, s, os); + lang_add_section (&add_child, s, NULL, os); break; } @@ -1665,7 +1665,7 @@ gld_${EMULATION_NAME}_place_orphan (asection *s, unused one and use that. */ if (os == NULL && match_by_name) { - lang_add_section (&match_by_name->children, s, match_by_name); + lang_add_section (&match_by_name->children, s, NULL, match_by_name); return match_by_name; } diff --git a/ld/emultempl/ppc64elf.em b/ld/emultempl/ppc64elf.em index 0923d21a6d..40882ab7bf 100644 --- a/ld/emultempl/ppc64elf.em +++ b/ld/emultempl/ppc64elf.em @@ -395,7 +395,7 @@ ppc_add_stub_section (const char *stub_sec_name, asection *input_section) info.input_section = input_section; lang_list_init (&info.add); - lang_add_section (&info.add, stub_sec, os); + lang_add_section (&info.add, stub_sec, NULL, os); if (info.add.head == NULL) goto err_ret; diff --git a/ld/emultempl/spuelf.em b/ld/emultempl/spuelf.em index d3e3c70476..2bcfcc2736 100644 --- a/ld/emultempl/spuelf.em +++ b/ld/emultempl/spuelf.em @@ -151,7 +151,7 @@ spu_place_special_section (asection *s, asection *o, const char *output_name) lang_statement_list_type add; lang_list_init (&add); - lang_add_section (&add, s, os); + lang_add_section (&add, s, NULL, os); *add.tail = os->children.head; os->children.head = add.head; } @@ -168,7 +168,7 @@ spu_place_special_section (asection *s, asection *o, const char *output_name) lang_add_assignment (exp_assign (".", e_size)); pop_stat_ptr (); } - lang_add_section (&os->children, s, os); + lang_add_section (&os->children, s, NULL, os); } s->output_section->size += s->size; diff --git a/ld/emultempl/vms.em b/ld/emultempl/vms.em index 98837e34a6..30c1a1602c 100644 --- a/ld/emultempl/vms.em +++ b/ld/emultempl/vms.em @@ -117,7 +117,7 @@ vms_place_orphan (asection *s, if (hold_data.os != NULL) { - lang_add_section (&hold_data.os->children, s, hold_data.os); + lang_add_section (&hold_data.os->children, s, NULL, hold_data.os); return hold_data.os; } else diff --git a/ld/ldlang.c b/ld/ldlang.c index beb84d3b87..f4eb703b71 100644 --- a/ld/ldlang.c +++ b/ld/ldlang.c @@ -236,9 +236,6 @@ walk_wild_consider_section (lang_wild_statement_type *ptr, { struct name_list *list_tmp; - /* Propagate the section_flag_info from the wild statement to the section. */ - s->section_flag_info = ptr->section_flag_list; - /* Don't process sections from files which were excluded. */ for (list_tmp = sec->spec.exclude_name_list; list_tmp; @@ -265,7 +262,7 @@ walk_wild_consider_section (lang_wild_statement_type *ptr, return; } - (*callback) (ptr, sec, s, file, data); + (*callback) (ptr, sec, s, ptr->section_flag_list, file, data); } /* Lowest common denominator routine that can handle everything correctly, @@ -284,7 +281,7 @@ walk_wild_section_general (lang_wild_statement_type *ptr, { sec = ptr->section_list; if (sec == NULL) - (*callback) (ptr, sec, s, file, data); + (*callback) (ptr, sec, s, ptr->section_flag_list, file, data); while (sec != NULL) { @@ -506,6 +503,7 @@ static void output_section_callback_fast (lang_wild_statement_type *ptr, struct wildcard_list *sec, asection *section, + struct flag_info *sflag_list ATTRIBUTE_UNUSED, lang_input_statement_type *file, void *output) { @@ -538,7 +536,7 @@ output_section_callback_tree_to_list (lang_wild_statement_type *ptr, if (tree->left) output_section_callback_tree_to_list (ptr, tree->left, output); - lang_add_section (&ptr->children, tree->section, + lang_add_section (&ptr->children, tree->section, NULL, (lang_output_section_statement_type *) output); if (tree->right) @@ -1809,7 +1807,7 @@ lang_insert_orphan (asection *s, if (add_child == NULL) add_child = &os->children; - lang_add_section (add_child, s, os); + lang_add_section (add_child, s, NULL, os); if (after && (s->flags & (SEC_LOAD | SEC_ALLOC)) != 0) { @@ -2227,16 +2225,15 @@ section_already_linked (bfd *abfd, asection *sec, void *data) foo.o(.text, .data). */ /* Add SECTION to the output section OUTPUT. Do this by creating a - lang_input_section statement which is placed at PTR. FILE is the - input file which holds SECTION. */ + lang_input_section statement which is placed at PTR. */ void lang_add_section (lang_statement_list_type *ptr, asection *section, + struct flag_info *sflag_info, lang_output_section_statement_type *output) { flagword flags = section->flags; - struct flag_info *sflag_info = section->section_flag_info; bfd_boolean discard; lang_input_section_type *new_section; @@ -2268,24 +2265,11 @@ lang_add_section (lang_statement_list_type *ptr, if (sflag_info) { - if (sflag_info->flags_initialized == FALSE) - bfd_lookup_section_flags (&link_info, sflag_info); - - if (sflag_info->only_with_flags != 0 - && sflag_info->not_with_flags != 0 - && ((sflag_info->not_with_flags & flags) != 0 - || (sflag_info->only_with_flags & flags) - != sflag_info->only_with_flags)) - return; + bfd_boolean keep; - if (sflag_info->only_with_flags != 0 - && (sflag_info->only_with_flags & flags) - != sflag_info->only_with_flags) - return; - - if (sflag_info->not_with_flags != 0 - && (sflag_info->not_with_flags & flags) != 0) - return; + keep = bfd_lookup_section_flags (&link_info, sflag_info, section); + if (!keep) + return; } if (section->output_section != NULL) @@ -2498,6 +2482,7 @@ static void output_section_callback (lang_wild_statement_type *ptr, struct wildcard_list *sec, asection *section, + struct flag_info *sflag_info, lang_input_statement_type *file, void *output) { @@ -2518,14 +2503,14 @@ output_section_callback (lang_wild_statement_type *ptr, of the current list. */ if (before == NULL) - lang_add_section (&ptr->children, section, os); + lang_add_section (&ptr->children, section, sflag_info, os); else { lang_statement_list_type list; lang_statement_union_type **pp; lang_list_init (&list); - lang_add_section (&list, section, os); + lang_add_section (&list, section, sflag_info, os); /* If we are discarding the section, LIST.HEAD will be NULL. */ @@ -2551,6 +2536,7 @@ static void check_section_callback (lang_wild_statement_type *ptr ATTRIBUTE_UNUSED, struct wildcard_list *sec ATTRIBUTE_UNUSED, asection *section, + struct flag_info *sflag_info ATTRIBUTE_UNUSED, lang_input_statement_type *file ATTRIBUTE_UNUSED, void *output) { @@ -6010,7 +5996,7 @@ lang_place_orphans (void) = lang_output_section_statement_lookup (".bss", 0, TRUE); lang_add_section (&default_common_section->children, s, - default_common_section); + NULL, default_common_section); } } else @@ -6032,7 +6018,7 @@ lang_place_orphans (void) && (link_info.relocatable || (s->flags & (SEC_LOAD | SEC_ALLOC)) == 0)) os->addr_tree = exp_intop (0); - lang_add_section (&os->children, s, os); + lang_add_section (&os->children, s, NULL, os); } } } @@ -6253,6 +6239,7 @@ static void gc_section_callback (lang_wild_statement_type *ptr, struct wildcard_list *sec ATTRIBUTE_UNUSED, asection *section, + struct flag_info *sflag_info ATTRIBUTE_UNUSED, lang_input_statement_type *file ATTRIBUTE_UNUSED, void *data ATTRIBUTE_UNUSED) { @@ -6324,6 +6311,7 @@ static void find_relro_section_callback (lang_wild_statement_type *ptr ATTRIBUTE_UNUSED, struct wildcard_list *sec ATTRIBUTE_UNUSED, asection *section, + struct flag_info *sflag_info ATTRIBUTE_UNUSED, lang_input_statement_type *file ATTRIBUTE_UNUSED, void *data) { diff --git a/ld/ldlang.h b/ld/ldlang.h index e36a0664c2..b5d50c5a35 100644 --- a/ld/ldlang.h +++ b/ld/ldlang.h @@ -314,7 +314,8 @@ typedef struct typedef struct lang_wild_statement_struct lang_wild_statement_type; typedef void (*callback_t) (lang_wild_statement_type *, struct wildcard_list *, - asection *, lang_input_statement_type *, void *); + asection *, struct flag_info *, + lang_input_statement_type *, void *); typedef void (*walk_wild_section_handler_t) (lang_wild_statement_type *, lang_input_statement_type *, @@ -616,7 +617,7 @@ extern void lang_leave_group (void); extern void lang_add_section (lang_statement_list_type *, asection *, - lang_output_section_statement_type *); + struct flag_info *, lang_output_section_statement_type *); extern void lang_new_phdr (const char *, etree_type *, bfd_boolean, bfd_boolean, etree_type *, etree_type *); diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog index c90a26e1bd..56002b8fa5 100644 --- a/ld/testsuite/ChangeLog +++ b/ld/testsuite/ChangeLog @@ -1,3 +1,38 @@ +2012-05-14 James Lemke <jwlemke@codesourcery.com> + + * ld-powerpc/powerpc.exp: Create ppceabitests. + * ld-powerpc/vle-multiseg.s: New. + * ld-powerpc/vle-multiseg-1.d: New. + * ld-powerpc/vle-multiseg-1.ld: New. + * ld-powerpc/vle-multiseg-2.d: New. + * ld-powerpc/vle-multiseg-2.ld: New. + * ld-powerpc/vle-multiseg-3.d: New. + * ld-powerpc/vle-multiseg-3.ld: New. + * ld-powerpc/vle-multiseg-4.d: New. + * ld-powerpc/vle-multiseg-4.ld: New. + * ld-powerpc/vle-multiseg-5.d: New. + * ld-powerpc/vle-multiseg-5.ld: New. + * ld-powerpc/vle-multiseg-6.d: New. + * ld-powerpc/vle-multiseg-6.ld: New. + * ld-powerpc/vle-multiseg-6a.s: New. + * ld-powerpc/vle-multiseg-6b.s: New. + * ld-powerpc/vle-multiseg-6c.s: New. + * ld-powerpc/vle-multiseg-6d.s: New. + * ld-powerpc/powerpc.exp: Run new tests. + +2012-05-14 Catherine Moore <clm@codesourcery.com> + + * ld-powerpc/apuinfo.rd: Update for VLE. + * ld-powerpc/vle-reloc-1.d: New. + * ld-powerpc/vle-reloc-1.s: New. + * ld-powerpc/vle-reloc-2.d: New. + * ld-powerpc/vle-reloc-2.s: New. + * ld-powerpc/vle-reloc-3.d: New. + * ld-powerpc/vle-reloc-3.s: New. + * ld-powerpc/vle-reloc-def-1.s: New. + * ld-powerpc/vle-reloc-def-2.s: New. + * ld-powerpc/vle-reloc-def-3.s: New. + 2012-05-13 Richard Sandiford <rdsandiford@googlemail.com> * ld-mips-elf/mips-elf.exp (mips16_call_global_test): Use the diff --git a/ld/testsuite/ld-powerpc/apuinfo.rd b/ld/testsuite/ld-powerpc/apuinfo.rd index 7a27bc0117..7a09d2f3c9 100644 --- a/ld/testsuite/ld-powerpc/apuinfo.rd +++ b/ld/testsuite/ld-powerpc/apuinfo.rd @@ -6,6 +6,7 @@ #target: powerpc-eabi* Hex dump of section '.PPC.EMB.apuinfo': - 0x00000000 00000008 0000001c 00000002 41505569 ............APUi + 0x00000000 00000008 00000020 00000002 41505569 ....... ....APUi 0x00000010 6e666f00 00420001 00430001 00410001 nfo..B...C...A.. - 0x00000020 01020001 01010001 00400001 01000001 .........@...... + 0x00000020 01020001 01010001 00400001 01040001 .........@...... + 0x00000030 01000001 ....$ diff --git a/ld/testsuite/ld-powerpc/powerpc.exp b/ld/testsuite/ld-powerpc/powerpc.exp index 566272d6ee..8b7e7fd0a1 100644 --- a/ld/testsuite/ld-powerpc/powerpc.exp +++ b/ld/testsuite/ld-powerpc/powerpc.exp @@ -215,6 +215,33 @@ set ppc64elftests { {{objdump -s tocopt5.d}} "tocopt5"} } +set ppceabitests { + {"VLE multiple segments 1" "-T vle-multiseg-1.ld" + "-mregnames -mvle" {vle-multiseg.s} + {{readelf "-l" vle-multiseg-1.d}} "vle-multiseg-1"} + {"VLE multiple segments 2" "-T vle-multiseg-2.ld" + "-mregnames -mvle" {vle-multiseg.s} + {{readelf "-l" vle-multiseg-2.d}} "vle-multiseg-2"} + {"VLE multiple segments 3" "-T vle-multiseg-3.ld" + "-mregnames -mvle" {vle-multiseg.s} + {{readelf "-l" vle-multiseg-3.d}} "vle-multiseg-3"} + {"VLE multiple segments 4" "-T vle-multiseg-4.ld" + "-mregnames -mvle" {vle-multiseg.s} + {{readelf "-l" vle-multiseg-4.d}} "vle-multiseg-4"} + {"VLE multiple segments 5" "-T vle-multiseg-5.ld" + "-mregnames -mvle" {vle-multiseg.s} + {{readelf "-l" vle-multiseg-5.d}} "vle-multiseg-5"} + {"VLE relocations 1" "" + "-mvle" {vle-reloc-1.s vle-reloc-def-1.s} + {{objdump "-Mvle -d" vle-reloc-1.d}} "vle-reloc-1"} + {"VLE relocations 2" "" + "-mvle" {vle-reloc-2.s vle-reloc-def-2.s} + {{objdump "-Mvle -d" vle-reloc-2.d}} "vle-reloc-2"} + {"VLE relocations 3" "" + "-mvle" {vle-reloc-3.s vle-reloc-def-3.s} + {{objdump "-Mvle -d" vle-reloc-3.d}} "vle-reloc-3"} +} + run_ld_link_tests $ppcelftests @@ -223,6 +250,10 @@ if [ supports_ppc64 ] then { run_dump_test "relbrlt" } +if { [istarget "powerpc*-eabi*"] } { + run_ld_link_tests $ppceabitests +} + run_dump_test "plt1" run_dump_test "attr-gnu-4-00" @@ -251,3 +282,5 @@ run_dump_test "attr-gnu-8-31" run_dump_test "attr-gnu-12-11" run_dump_test "attr-gnu-12-21" + +run_dump_test "vle-multiseg-6" diff --git a/ld/testsuite/ld-powerpc/vle-multiseg-1.d b/ld/testsuite/ld-powerpc/vle-multiseg-1.d new file mode 100644 index 0000000000..d9554a11b2 --- /dev/null +++ b/ld/testsuite/ld-powerpc/vle-multiseg-1.d @@ -0,0 +1,14 @@ + +Elf file type is EXEC.* +Entry point 0x0 +There are 2 program headers, starting at offset [0-9]+ + +Program Headers: + Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align + LOAD ( +0x[0-9a-f]+){5} ([RWE ]+){3} 0x[0-f]+ + LOAD ( +0x[0-9a-f]+){5} R E 0x[0-9a-f]+ + + Section to Segment mapping: + Segment Sections... + 00 .data + 01 .text_vle .text_iv .iv_handlers diff --git a/ld/testsuite/ld-powerpc/vle-multiseg-1.ld b/ld/testsuite/ld-powerpc/vle-multiseg-1.ld new file mode 100644 index 0000000000..f2ff319fda --- /dev/null +++ b/ld/testsuite/ld-powerpc/vle-multiseg-1.ld @@ -0,0 +1,17 @@ +SECTIONS +{ + .data 0x00000400 : + { *(.data) *(.ctors) *(.dtors) *(.eh_frame) *(.jcr) } + .text_vle 0x00001000 : + { + . = ALIGN(16); + INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.text_vle) + INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.text) + INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.init) + INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.init_vle) + INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.fini) + INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.fini_vle) + } + .text_iv . : { . = ALIGN(16); *(.text_iv) } + .iv_handlers 0x0001F000 : { *(.iv_handlers) } +} diff --git a/ld/testsuite/ld-powerpc/vle-multiseg-2.d b/ld/testsuite/ld-powerpc/vle-multiseg-2.d new file mode 100644 index 0000000000..9d83bb50fa --- /dev/null +++ b/ld/testsuite/ld-powerpc/vle-multiseg-2.d @@ -0,0 +1,16 @@ + +Elf file type is EXEC.* +Entry point 0x0 +There are 3 program headers, starting at offset [0-9]+ + +Program Headers: + Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align + LOAD ( +0x[0-9a-f]+){5} R E 0x[0-9a-f]+ + LOAD ( +0x[0-9a-f]+){5} ([RWE ]+){3} 0x[0-f]+ + LOAD ( +0x[0-9a-f]+){5} R E 0x[0-9a-f]+ + + Section to Segment mapping: + Segment Sections... + 00 .text_vle + 01 .data + 02 .text_iv .iv_handlers diff --git a/ld/testsuite/ld-powerpc/vle-multiseg-2.ld b/ld/testsuite/ld-powerpc/vle-multiseg-2.ld new file mode 100644 index 0000000000..2320b61c2a --- /dev/null +++ b/ld/testsuite/ld-powerpc/vle-multiseg-2.ld @@ -0,0 +1,17 @@ +SECTIONS +{ + .text_vle 0x00001000 : + { + . = ALIGN(16); + INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.text_vle) + INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.text) + INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.init) + INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.init_vle) + INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.fini) + INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.fini_vle) + } + .data 0x00001400 : + { *(.data) *(.ctors) *(.dtors) *(.eh_frame) *(.jcr) } + .text_iv . : { . = ALIGN(16); *(.text_iv) } + .iv_handlers 0x0001F000 : { *(.iv_handlers) } +} diff --git a/ld/testsuite/ld-powerpc/vle-multiseg-3.d b/ld/testsuite/ld-powerpc/vle-multiseg-3.d new file mode 100644 index 0000000000..957b990dee --- /dev/null +++ b/ld/testsuite/ld-powerpc/vle-multiseg-3.d @@ -0,0 +1,16 @@ + +Elf file type is EXEC.* +Entry point 0x0 +There are 3 program headers, starting at offset [0-9]+ + +Program Headers: + Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align + LOAD ( +0x[0-9a-f]+){5} R E 0x[0-9a-f]+ + LOAD ( +0x[0-9a-f]+){5} ([RWE ]+){3} 0x[0-f]+ + LOAD ( +0x[0-9a-f]+){5} R E 0x[0-9a-f]+ + + Section to Segment mapping: + Segment Sections... + 00 .text_vle .text_iv + 01 .data + 02 .iv_handlers diff --git a/ld/testsuite/ld-powerpc/vle-multiseg-3.ld b/ld/testsuite/ld-powerpc/vle-multiseg-3.ld new file mode 100644 index 0000000000..0ed2f44c54 --- /dev/null +++ b/ld/testsuite/ld-powerpc/vle-multiseg-3.ld @@ -0,0 +1,17 @@ +SECTIONS +{ + .text_vle 0x00001000 : + { + . = ALIGN(16); + INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.text_vle) + INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.text) + INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.init) + INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.init_vle) + INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.fini) + INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.fini_vle) + } + .text_iv . : { . = ALIGN(16); *(.text_iv) } + .data 0x00001400 : + { *(.data) *(.ctors) *(.dtors) *(.eh_frame) *(.jcr) } + .iv_handlers 0x0001F000 : { *(.iv_handlers) } +} diff --git a/ld/testsuite/ld-powerpc/vle-multiseg-4.d b/ld/testsuite/ld-powerpc/vle-multiseg-4.d new file mode 100644 index 0000000000..9edbe06575 --- /dev/null +++ b/ld/testsuite/ld-powerpc/vle-multiseg-4.d @@ -0,0 +1,14 @@ + +Elf file type is EXEC.* +Entry point 0x0 +There are 2 program headers, starting at offset [0-9]+ + +Program Headers: + Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align + LOAD ( +0x[0-9a-f]+){5} R E 0x[0-9a-f]+ + LOAD ( +0x[0-9a-f]+){5} ([RWE ]+){3} 0x[0-f]+ + + Section to Segment mapping: + Segment Sections... + 00 .text_vle .text_iv .iv_handlers + 01 .data diff --git a/ld/testsuite/ld-powerpc/vle-multiseg-4.ld b/ld/testsuite/ld-powerpc/vle-multiseg-4.ld new file mode 100644 index 0000000000..503fe06eaf --- /dev/null +++ b/ld/testsuite/ld-powerpc/vle-multiseg-4.ld @@ -0,0 +1,17 @@ +SECTIONS +{ + .text_vle 0x00001000 : + { + . = ALIGN(16); + INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.text_vle) + INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.text) + INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.init) + INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.init_vle) + INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.fini) + INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.fini_vle) + } + .text_iv . : { . = ALIGN(16); *(.text_iv) } + .iv_handlers 0x0001F000 : { *(.iv_handlers) } + .data 0x00020400 : + { *(.data) *(.ctors) *(.dtors) *(.eh_frame) *(.jcr) } +} diff --git a/ld/testsuite/ld-powerpc/vle-multiseg-5.d b/ld/testsuite/ld-powerpc/vle-multiseg-5.d new file mode 100644 index 0000000000..957b990dee --- /dev/null +++ b/ld/testsuite/ld-powerpc/vle-multiseg-5.d @@ -0,0 +1,16 @@ + +Elf file type is EXEC.* +Entry point 0x0 +There are 3 program headers, starting at offset [0-9]+ + +Program Headers: + Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align + LOAD ( +0x[0-9a-f]+){5} R E 0x[0-9a-f]+ + LOAD ( +0x[0-9a-f]+){5} ([RWE ]+){3} 0x[0-f]+ + LOAD ( +0x[0-9a-f]+){5} R E 0x[0-9a-f]+ + + Section to Segment mapping: + Segment Sections... + 00 .text_vle .text_iv + 01 .data + 02 .iv_handlers diff --git a/ld/testsuite/ld-powerpc/vle-multiseg-5.ld b/ld/testsuite/ld-powerpc/vle-multiseg-5.ld new file mode 100644 index 0000000000..4000021748 --- /dev/null +++ b/ld/testsuite/ld-powerpc/vle-multiseg-5.ld @@ -0,0 +1,44 @@ + +MEMORY +{ + code_rom (rxw) : org = 0x00001000, len = 0x1EF000 + irpt_rom (rx) : org = 0x001F0000, len = 0x2000 + int__ram (rxw) : org = 0x40000000, len = 256K +} + +REGION_ALIAS("INTR", irpt_rom) +REGION_ALIAS("CODE", code_rom) +REGION_ALIAS("RODATA", code_rom) +REGION_ALIAS("RAM", int__ram) + +SECTIONS +{ + .iv_handlers : + { + INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.iv_handlers) + } > INTR + + .text_vle : + { + INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.text_vle) + INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.text) + INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.init) + INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.init_vle) + INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.fini) + INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.fini_vle) + } > CODE + + .rodata : + { + *(.rodata) + } > RODATA + + .data : + { + *(.data) + *(.data.*) + *(.ctors) + *(.dtors) + } > RAM AT>RODATA + +} diff --git a/ld/testsuite/ld-powerpc/vle-multiseg-6.d b/ld/testsuite/ld-powerpc/vle-multiseg-6.d new file mode 100644 index 0000000000..5c3c21040a --- /dev/null +++ b/ld/testsuite/ld-powerpc/vle-multiseg-6.d @@ -0,0 +1,25 @@ +#source: vle-multiseg-6a.s -mregnames -mvle +#source: vle-multiseg-6b.s +#source: vle-multiseg-6c.s +#source: vle-multiseg-6d.s -mregnames -mvle +#ld: -T vle-multiseg-6.ld +#target: powerpc-*-* +#readelf: -l + +Elf file type is EXEC.* +Entry point 0x[0-9a-f]+ +There are 4 program headers, starting at offset [0-9]+ + +Program Headers: + Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align + LOAD ( +0x[0-9a-f]+){5} ([RWE ]+){3} 0x[0-f]+ + LOAD ( +0x[0-9a-f]+){5} R E 0x[0-9a-f]+ + LOAD ( +0x[0-9a-f]+){5} R E 0x[0-9a-f]+ + LOAD ( +0x[0-9a-f]+){5} R E 0x[0-9a-f]+ + + Section to Segment mapping: + Segment Sections... + 00 .data + 01 .text_vle + 02 .text_iv + 03 .text diff --git a/ld/testsuite/ld-powerpc/vle-multiseg-6.ld b/ld/testsuite/ld-powerpc/vle-multiseg-6.ld new file mode 100644 index 0000000000..c8d88dd831 --- /dev/null +++ b/ld/testsuite/ld-powerpc/vle-multiseg-6.ld @@ -0,0 +1,37 @@ +MEMORY +{ + vle_seg1 (rxw): org = 0x00000000, len = 0x10000 + vle_seg2 (rxw): org = 0x00100000, len = 0x10000 + nonvle_seg (rxw): org = 0x001F0000, len = 0x20000 +} +SECTIONS +{ + .data 0x00000100 : + { + *(.data) + *(.ctors) + *(.dtors) + *(.eh_frame) + *(.jcr) + } + .text_vle 0x00001000 : + { + . = ALIGN(16); + INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.text*) + INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.init*) + INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.fini*) + } > vle_seg1 + + .text_iv 0x100000 : + { + . = ALIGN(16); + INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.text_iv) + INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.iv_handlers) + } >vle_seg2 + + .text 0x101000 : + { + . = ALIGN(16); + INPUT_SECTION_FLAGS (!SHF_PPC_VLE) *(.text*) + } +} diff --git a/ld/testsuite/ld-powerpc/vle-multiseg-6a.s b/ld/testsuite/ld-powerpc/vle-multiseg-6a.s new file mode 100644 index 0000000000..a50afae569 --- /dev/null +++ b/ld/testsuite/ld-powerpc/vle-multiseg-6a.s @@ -0,0 +1,47 @@ + .text + + e_stw r12, 0x4C(r1) + e_stw r11, 0x48(r1) + e_stw r10, 0x44(r1) + e_stw r9, 0x40(r1) + e_stw r8, 0x3C(r1) + e_stw r7, 0x38(r1) + e_stw r6, 0x34(r1) + e_stw r5, 0x30(r1) + e_stw r4, 0x2c(r1) + + .globl IV_table + .section ".iv_handlers", "ax" +IV_table: + e_b dummy + .align 4 + e_b dummy + .align 4 + e_b dummy + .align 4 + e_b dummy + .align 4 + e_b dummy + .align 4 + e_b dummy + .align 4 + e_b dummy + .align 4 + e_b dummy + .align 4 +dummy: + se_nop + e_b dummy + + .section ".text_iv", "ax" + e_lis r3, IV_table@h + mtivpr r3 + e_li r3, IV_table@l+0x00 + mtivor0 r3 + e_li r3, IV_table@l+0x10 + mtivor1 r3 + e_li r3, IV_table@l+0x20 + mtivor2 r3 + + .data + .long 0xdeadbeef diff --git a/ld/testsuite/ld-powerpc/vle-multiseg-6b.s b/ld/testsuite/ld-powerpc/vle-multiseg-6b.s new file mode 100644 index 0000000000..10fcf20cbf --- /dev/null +++ b/ld/testsuite/ld-powerpc/vle-multiseg-6b.s @@ -0,0 +1,6 @@ + .text + + and. 3,4,5 + and 3,4,5 + andc 13,14,15 + andc. 16,17,18 diff --git a/ld/testsuite/ld-powerpc/vle-multiseg-6c.s b/ld/testsuite/ld-powerpc/vle-multiseg-6c.s new file mode 100644 index 0000000000..10fcf20cbf --- /dev/null +++ b/ld/testsuite/ld-powerpc/vle-multiseg-6c.s @@ -0,0 +1,6 @@ + .text + + and. 3,4,5 + and 3,4,5 + andc 13,14,15 + andc. 16,17,18 diff --git a/ld/testsuite/ld-powerpc/vle-multiseg-6d.s b/ld/testsuite/ld-powerpc/vle-multiseg-6d.s new file mode 100644 index 0000000000..a8c6fcc883 --- /dev/null +++ b/ld/testsuite/ld-powerpc/vle-multiseg-6d.s @@ -0,0 +1,9 @@ + .section ".text_iv", "ax" + e_lis r3, IV_table@h + mtivpr r3 + e_li r3, IV_table@l+0x00 + mtivor0 r3 + e_li r3, IV_table@l+0x10 + mtivor1 r3 + e_li r3, IV_table@l+0x20 + mtivor2 r3 diff --git a/ld/testsuite/ld-powerpc/vle-multiseg.s b/ld/testsuite/ld-powerpc/vle-multiseg.s new file mode 100644 index 0000000000..b0c08862a5 --- /dev/null +++ b/ld/testsuite/ld-powerpc/vle-multiseg.s @@ -0,0 +1,50 @@ +# Make up several VLE text sections which the linker script will put into +# separate output sections. We will then check for separate load segments. +# .include "mpc5500_usrdefs.inc" +# .section ".text_vle" + + e_stw r12, 0x4C(r1) + e_stw r11, 0x48(r1) + e_stw r10, 0x44(r1) + e_stw r9, 0x40(r1) + e_stw r8, 0x3C(r1) + e_stw r7, 0x38(r1) + e_stw r6, 0x34(r1) + e_stw r5, 0x30(r1) + e_stw r4, 0x2c(r1) + + .globl IV_table + .section ".iv_handlers", "ax" +IV_table: + e_b dummy + .align 4 + e_b dummy + .align 4 + e_b dummy + .align 4 + e_b dummy + .align 4 + e_b dummy + .align 4 + e_b dummy + .align 4 + e_b dummy + .align 4 + e_b dummy + .align 4 +dummy: + se_nop + e_b dummy + + .section ".text_iv", "ax" + e_lis r3, IV_table@h + mtivpr r3 + e_li r3, IV_table@l+0x00 + mtivor0 r3 + e_li r3, IV_table@l+0x10 + mtivor1 r3 + e_li r3, IV_table@l+0x20 + mtivor2 r3 + + .data + .long 0xdeadbeef diff --git a/ld/testsuite/ld-powerpc/vle-reloc-1.d b/ld/testsuite/ld-powerpc/vle-reloc-1.d new file mode 100644 index 0000000000..0f5927164a --- /dev/null +++ b/ld/testsuite/ld-powerpc/vle-reloc-1.d @@ -0,0 +1,29 @@ +.*: file format .* + + +Disassembly of section .text: + +01800054 <sub1>: + 1800054: 00 04 se_blr + +01800056 <sub2>: + 1800056: 00 04 se_blr + +01800058 <vle_reloc>: + 1800058: e8 fe se_b 1800054 <sub1> + 180005a: e9 fd se_bl 1800054 <sub1> + 180005c: e1 fd se_ble 1800056 <sub2> + 180005e: e6 fc se_beq 1800056 <sub2> + 1800060: 78 00 00 10 e_b 1800070 <sub3> + 1800064: 78 00 00 0f e_bl 1800072 <sub4> + 1800068: 7a 05 00 0c e_ble cr1,1800074 <sub5> + 180006c: 7a 1a 00 09 e_beql cr2,1800074 <sub5> + +01800070 <sub3>: + 1800070: 00 04 se_blr + +01800072 <sub4>: + 1800072: 00 04 se_blr + +01800074 <sub5>: + 1800074: 00 04 se_blr diff --git a/ld/testsuite/ld-powerpc/vle-reloc-1.s b/ld/testsuite/ld-powerpc/vle-reloc-1.s new file mode 100644 index 0000000000..e56a22ba64 --- /dev/null +++ b/ld/testsuite/ld-powerpc/vle-reloc-1.s @@ -0,0 +1,18 @@ + .section .text +sub1: + se_blr + +sub2: + se_blr + + .section .text +vle_reloc: + se_b sub1 + se_bl sub1 + se_bc 0,1,sub2 + se_bc 1,2,sub2 + + e_b sub3 + e_bl sub4 + e_bc 0,5,sub5 + e_bcl 1,10,sub5 diff --git a/ld/testsuite/ld-powerpc/vle-reloc-2.d b/ld/testsuite/ld-powerpc/vle-reloc-2.d new file mode 100644 index 0000000000..1e1c9d489c --- /dev/null +++ b/ld/testsuite/ld-powerpc/vle-reloc-2.d @@ -0,0 +1,87 @@ +.*: file format .* + +Disassembly of section .text: + +01800094 <sub1>: + 1800094: 00 04 se_blr +01800096 <sub2>: + 1800096: 00 04 se_blr +01800098 <vle_reloc_2>: + 1800098: 70 20 c1 c2 e_or2i r1,450 + 180009c: 70 40 c1 81 e_or2i r2,385 + 18000a0: 70 60 c1 81 e_or2i r3,385 + 18000a4: 70 80 c1 ce e_or2i r4,462 + 18000a8: 70 a0 c1 80 e_or2i r5,384 + 18000ac: 70 40 c1 81 e_or2i r2,385 + 18000b0: 70 20 c9 c2 e_and2i. r1,450 + 18000b4: 70 40 c9 81 e_and2i. r2,385 + 18000b8: 70 60 c9 81 e_and2i. r3,385 + 18000bc: 70 80 c9 ce e_and2i. r4,462 + 18000c0: 70 a0 c9 80 e_and2i. r5,384 + 18000c4: 70 40 c9 81 e_and2i. r2,385 + 18000c8: 70 20 d1 c2 e_or2is r1,450 + 18000cc: 70 40 d1 81 e_or2is r2,385 + 18000d0: 70 60 d1 81 e_or2is r3,385 + 18000d4: 70 80 d1 ce e_or2is r4,462 + 18000d8: 70 a0 d1 80 e_or2is r5,384 + 18000dc: 70 40 d1 81 e_or2is r2,385 + 18000e0: 70 20 e1 c2 e_lis r1,450 + 18000e4: 70 40 e1 81 e_lis r2,385 + 18000e8: 70 60 e1 81 e_lis r3,385 + 18000ec: 70 80 e1 ce e_lis r4,462 + 18000f0: 70 a0 e1 80 e_lis r5,384 + 18000f4: 70 40 e1 81 e_lis r2,385 + 18000f8: 70 20 e9 c2 e_and2is. r1,450 + 18000fc: 70 40 e9 81 e_and2is. r2,385 + 1800100: 70 60 e9 81 e_and2is. r3,385 + 1800104: 70 80 e9 ce e_and2is. r4,462 + 1800108: 70 a0 e9 80 e_and2is. r5,384 + 180010c: 70 40 e9 81 e_and2is. r2,385 + 1800110: 70 01 99 c2 e_cmp16i r1,450 + 1800114: 70 02 99 81 e_cmp16i r2,385 + 1800118: 70 03 99 81 e_cmp16i r3,385 + 180011c: 70 04 99 ce e_cmp16i r4,462 + 1800120: 70 05 99 80 e_cmp16i r5,384 + 1800124: 70 02 99 81 e_cmp16i r2,385 + 1800128: 70 01 a9 c2 e_cmpl16i r1,450 + 180012c: 70 02 a9 81 e_cmpl16i r2,385 + 1800130: 70 03 a9 81 e_cmpl16i r3,385 + 1800134: 70 04 a9 ce e_cmpl16i r4,462 + 1800138: 70 05 a9 80 e_cmpl16i r5,384 + 180013c: 70 02 a9 81 e_cmpl16i r2,385 + 1800140: 70 01 b1 c2 e_cmph16i r1,450 + 1800144: 70 02 b1 81 e_cmph16i r2,385 + 1800148: 70 03 b1 81 e_cmph16i r3,385 + 180014c: 70 04 b1 ce e_cmph16i r4,462 + 1800150: 70 05 b1 80 e_cmph16i r5,384 + 1800154: 70 02 b1 81 e_cmph16i r2,385 + 1800158: 70 01 b9 c2 e_cmphl16i r1,450 + 180015c: 70 02 b9 81 e_cmphl16i r2,385 + 1800160: 70 03 b9 81 e_cmphl16i r3,385 + 1800164: 70 04 b9 ce e_cmphl16i r4,462 + 1800168: 70 05 b9 80 e_cmphl16i r5,384 + 180016c: 70 02 b9 81 e_cmphl16i r2,385 + 1800170: 70 01 89 c2 e_add2i. r1,450 + 1800174: 70 02 89 81 e_add2i. r2,385 + 1800178: 70 03 89 81 e_add2i. r3,385 + 180017c: 70 04 89 ce e_add2i. r4,462 + 1800180: 70 05 89 80 e_add2i. r5,384 + 1800184: 70 02 89 81 e_add2i. r2,385 + 1800188: 70 01 91 c2 e_add2is r1,450 + 180018c: 70 02 91 81 e_add2is r2,385 + 1800190: 70 03 91 81 e_add2is r3,385 + 1800194: 70 04 91 ce e_add2is r4,462 + 1800198: 70 05 91 80 e_add2is r5,384 + 180019c: 70 02 91 81 e_add2is r2,385 + 18001a0: 70 01 a1 c2 e_mull2i r1,450 + 18001a4: 70 02 a1 81 e_mull2i r2,385 + 18001a8: 70 03 a1 81 e_mull2i r3,385 + 18001ac: 70 04 a1 ce e_mull2i r4,462 + 18001b0: 70 05 a1 80 e_mull2i r5,384 + 18001b4: 70 02 a1 81 e_mull2i r2,385 +018001b8 <sub3>: + 18001b8: 00 04 se_blr +018001ba <sub4>: + 18001ba: 00 04 se_blr +018001bc <sub5>: + 18001bc: 00 04 se_blr diff --git a/ld/testsuite/ld-powerpc/vle-reloc-2.s b/ld/testsuite/ld-powerpc/vle-reloc-2.s new file mode 100644 index 0000000000..34cc32d7e8 --- /dev/null +++ b/ld/testsuite/ld-powerpc/vle-reloc-2.s @@ -0,0 +1,92 @@ + .section .text +sub1: + se_blr + +sub2: + se_blr + + .section .text +vle_reloc_2: + e_or2i 1, low@l + e_or2i 2, high@h + e_or2i 3, high_adjust@ha + e_or2i 4, low_sdarel@sdarel@l + e_or2i 5, high_sdarel@sdarel@h + e_or2i 2, high_adjust_sdarel@sdarel@ha + + e_and2i. 1, low@l + e_and2i. 2, high@h + e_and2i. 3, high_adjust@ha + e_and2i. 4, low_sdarel@sdarel@l + e_and2i. 5, high_sdarel@sdarel@h + e_and2i. 2, high_adjust_sdarel@sdarel@ha + + e_or2is 1, low@l + e_or2is 2, high@h + e_or2is 3, high_adjust@ha + e_or2is 4, low_sdarel@sdarel@l + e_or2is 5, high_sdarel@sdarel@h + e_or2is 2, high_adjust_sdarel@sdarel@ha + + e_lis 1, low@l + e_lis 2, high@h + e_lis 3, high_adjust@ha + e_lis 4, low_sdarel@sdarel@l + e_lis 5, high_sdarel@sdarel@h + e_lis 2, high_adjust_sdarel@sdarel@ha + + e_and2is. 1, low@l + e_and2is. 2, high@h + e_and2is. 3, high_adjust@ha + e_and2is. 4, low_sdarel@sdarel@l + e_and2is. 5, high_sdarel@sdarel@h + e_and2is. 2, high_adjust_sdarel@sdarel@ha + + e_cmp16i 1, low@l + e_cmp16i 2, high@h + e_cmp16i 3, high_adjust@ha + e_cmp16i 4, low_sdarel@sdarel@l + e_cmp16i 5, high_sdarel@sdarel@h + e_cmp16i 2, high_adjust_sdarel@sdarel@ha + + e_cmpl16i 1, low@l + e_cmpl16i 2, high@h + e_cmpl16i 3, high_adjust@ha + e_cmpl16i 4, low_sdarel@sdarel@l + e_cmpl16i 5, high_sdarel@sdarel@h + e_cmpl16i 2, high_adjust_sdarel@sdarel@ha + + e_cmph16i 1, low@l + e_cmph16i 2, high@h + e_cmph16i 3, high_adjust@ha + e_cmph16i 4, low_sdarel@sdarel@l + e_cmph16i 5, high_sdarel@sdarel@h + e_cmph16i 2, high_adjust_sdarel@sdarel@ha + + e_cmphl16i 1, low@l + e_cmphl16i 2, high@h + e_cmphl16i 3, high_adjust@ha + e_cmphl16i 4, low_sdarel@sdarel@l + e_cmphl16i 5, high_sdarel@sdarel@h + e_cmphl16i 2, high_adjust_sdarel@sdarel@ha + + e_add2i. 1, low@l + e_add2i. 2, high@h + e_add2i. 3, high_adjust@ha + e_add2i. 4, low_sdarel@sdarel@l + e_add2i. 5, high_sdarel@sdarel@h + e_add2i. 2, high_adjust_sdarel@sdarel@ha + + e_add2is 1, low@l + e_add2is 2, high@h + e_add2is 3, high_adjust@ha + e_add2is 4, low_sdarel@sdarel@l + e_add2is 5, high_sdarel@sdarel@h + e_add2is 2, high_adjust_sdarel@sdarel@ha + + e_mull2i 1, low@l + e_mull2i 2, high@h + e_mull2i 3, high_adjust@ha + e_mull2i 4, low_sdarel@sdarel@l + e_mull2i 5, high_sdarel@sdarel@h + e_mull2i 2, high_adjust_sdarel@sdarel@ha diff --git a/ld/testsuite/ld-powerpc/vle-reloc-3.d b/ld/testsuite/ld-powerpc/vle-reloc-3.d new file mode 100644 index 0000000000..e29f4f0786 --- /dev/null +++ b/ld/testsuite/ld-powerpc/vle-reloc-3.d @@ -0,0 +1,8 @@ +.*: file format .* + +Disassembly of section .text: + +01800094 <sda21_test>: + 1800094: 1c ad 80 08 e_add16i r5,r13,-32760 + 1800098: 1c a2 80 04 e_add16i r5,r2,-32764 + 180009c: 70 00 00 ac e_li r0,172 diff --git a/ld/testsuite/ld-powerpc/vle-reloc-3.s b/ld/testsuite/ld-powerpc/vle-reloc-3.s new file mode 100644 index 0000000000..3c7dfae737 --- /dev/null +++ b/ld/testsuite/ld-powerpc/vle-reloc-3.s @@ -0,0 +1,10 @@ + .section .text + .extern exdat1c + .extern exdat2b + .extern exdat1a + .globl sda21_test + +sda21_test: + e_add16i 5, 4, exdat1c@sda21 + e_add16i 5, 4, exdat2b@sda21 + e_add16i 5, 4, exdat0b@sda21 diff --git a/ld/testsuite/ld-powerpc/vle-reloc-def-1.s b/ld/testsuite/ld-powerpc/vle-reloc-def-1.s new file mode 100644 index 0000000000..a879221901 --- /dev/null +++ b/ld/testsuite/ld-powerpc/vle-reloc-def-1.s @@ -0,0 +1,13 @@ + .section .text + .globl sub3 +sub3: + se_blr + + .globl sub4 +sub4: + se_blr + + .globl sub5 +sub5: + se_blr + diff --git a/ld/testsuite/ld-powerpc/vle-reloc-def-2.s b/ld/testsuite/ld-powerpc/vle-reloc-def-2.s new file mode 100644 index 0000000000..363a39fbf6 --- /dev/null +++ b/ld/testsuite/ld-powerpc/vle-reloc-def-2.s @@ -0,0 +1,41 @@ + .section .text + + .globl sub3 +sub3: + se_blr + + .globl sub4 +sub4: + se_blr + + .globl sub5 +sub5: + se_blr + + .section .sdata + .globl low_sdarel +low_sdarel: + .long 2 + + .globl high_adjust_sdarel +high_adjust_sdarel: + .long 0xff + + .section .sdata2 + .globl high_sdarel +high_sdarel: + .long 0xf + + + .data + .globl low +low: + .long 5 + + .globl high +high: + .long 0x10 + + .globl high_adjust +high_adjust: + .long 0xffff diff --git a/ld/testsuite/ld-powerpc/vle-reloc-def-3.s b/ld/testsuite/ld-powerpc/vle-reloc-def-3.s new file mode 100644 index 0000000000..e3b843be08 --- /dev/null +++ b/ld/testsuite/ld-powerpc/vle-reloc-def-3.s @@ -0,0 +1,29 @@ + .section .sdata + .globl exdat1a + .globl exdat1b + .globl exdat1c +exdat1a: .long 6 +exdat1b: .long 7 +exdat1c: .long 8 + + .section .sdata2 + .globl exdat2a + .globl exdat2b + .globl exdat2c +exdat2a: .long 5 +exdat2b: .long 4 +exdat2c: .long 3 + + .section .PPC.EMB.sdata0 + .globl exdat0a + .globl exdat0b + .globl exdat0c +exdat0a: .long 1 +exdat0b: .long 2 +exdat0c: .long 3 + + .section .sbss + .globl exbss1a + .globl exbss1b +exbss1a: .int +exbss1b: .int |