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| author | Jim Wilson <wilson@tuliptree.org> | 2000-08-16 23:20:15 +0000 |
|---|---|---|
| committer | Jim Wilson <wilson@tuliptree.org> | 2000-08-16 23:20:15 +0000 |
| commit | 9a8e50ae5b10f56c9525268b44f72b4802f79af0 (patch) | |
| tree | a8db2ed36739bc17bbbaac4068c85196aff493b9 /opcodes/ia64-opc-f.c | |
| parent | d5902f09c5c7e0bc43cbfb23b7d9ca1303e923e8 (diff) | |
| download | binutils-redhat-9a8e50ae5b10f56c9525268b44f72b4802f79af0.tar.gz | |
Fix 3 DV bugs, and a few minor cleanups.
gas/
* config/tc-ia64.c (specify_resource, case IA64_RS_GR): Handle
postincrement modified registers. Handle IA64_OPND_R3_2 addl
source registers.
(note_register_values): Handle IA64_OPND_R3_2 operands.
gas/testsuite/
* gas/ia64/dv-raw-err.s: Add new tests for addl and postinc.
* gas/ia64/dv-raw-err.l: Likewise.
* gas/ia64/dv-waw-err.l: Update sed pattern.
* gas/ia64/opc-f.pl: Delete fpsub, and fpadd comment.
* gas/ia64/opc-f.s, gas/ia64/opc-f.d: Regenerate.
include/opcode/
* ia64.h (IA64_OPCODE_POSTINC): New.
opcodes/
* ia64-ic.tbl (pr-readers-nobr-nomovpr): Add addl, adds. Delete
break, mov-immediate, nop.
* ia64-opc-f.c: Delete fpsub instructions.
* ia64-opc-m.c: Add POSTINC to all instructions with postincrement
address operand. Rewrite using macros to avoid long lines.
* ia64-opc.h (POSTINC): Define.
* ia64-asmtab.c: Regenerate.
Diffstat (limited to 'opcodes/ia64-opc-f.c')
| -rw-r--r-- | opcodes/ia64-opc-f.c | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/opcodes/ia64-opc-f.c b/opcodes/ia64-opc-f.c index 9b5bc6a0cc..e292dc8e3a 100644 --- a/opcodes/ia64-opc-f.c +++ b/opcodes/ia64-opc-f.c @@ -530,12 +530,6 @@ struct ia64_opcode ia64_opcodes_f[] = {"fpms.s2", f, OpXaSf (0xb, 1, 2), {F1, F3, F4, F2}}, {"fpms.s3", f, OpXaSf (0xb, 1, 3), {F1, F3, F4, F2}}, - {"fpsub.s0", f, OpXaSfF4 (0xb, 1, 0, 1), {F1, F3, F2}, PSEUDO}, - {"fpsub", f, OpXaSfF4 (0xb, 1, 0, 1), {F1, F3, F2}, PSEUDO}, - {"fpsub.s1", f, OpXaSfF4 (0xb, 1, 1, 1), {F1, F3, F2}, PSEUDO}, - {"fpsub.s2", f, OpXaSfF4 (0xb, 1, 2, 1), {F1, F3, F2}, PSEUDO}, - {"fpsub.s3", f, OpXaSfF4 (0xb, 1, 3, 1), {F1, F3, F2}, PSEUDO}, - {"fnmpy.s0", f, OpXaSfF2 (0xc, 0, 0, 0), {F1, F3, F4}, PSEUDO}, {"fnmpy", f, OpXaSfF2 (0xc, 0, 0, 0), {F1, F3, F4}, PSEUDO}, {"fnmpy.s1", f, OpXaSfF2 (0xc, 0, 1, 0), {F1, F3, F4}, PSEUDO}, |