i* m32c-desc.c: Regenerate.

* m32c-opc.c: Likewise.
* m32c-opc.h: Likewise.

1 files changed, 71 insertions, 51 deletions

diff --git a/opcodes/m32c-desc.c b/opcodes/m32c-desc.c
index 5f19ec467c..929a1cad15 100644
--- a/opcodes/m32c-desc.c
+++ b/opcodes/m32c-desc.c
@@ -16658,96 +16658,116 @@ static const CGEN_IBASE m32c_cgen_insn_table[MAX_INSNS] =
     M32C_INSN_POP32_B_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_QI, "pop32.b-16-Unprefixed-dst32-16-24-absolute-Unprefixed-QI", "pop.b", 40,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_1ADDR, 0 } } } }
   },
-/* pop.w $Dst16RnHI */
+/* pop.w${G} $Dst16RnHI */
   {
     M32C_INSN_POP16_W_16_DST16_RN_DIRECT_HI, "pop16.w-16-dst16-Rn-direct-HI", "pop.w", 16,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
   },
-/* pop.w $Dst16AnHI */
+/* pop.w${G} $Dst16AnHI */
   {
     M32C_INSN_POP16_W_16_DST16_AN_DIRECT_HI, "pop16.w-16-dst16-An-direct-HI", "pop.w", 16,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
   },
-/* pop.w [$Dst16An] */
+/* pop.w${G} [$Dst16An] */
   {
     M32C_INSN_POP16_W_16_DST16_AN_INDIRECT_HI, "pop16.w-16-dst16-An-indirect-HI", "pop.w", 16,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
   },
-/* pop.w ${Dsp-16-u8}[$Dst16An] */
+/* pop.w${G} ${Dsp-16-u8}[$Dst16An] */
   {
     M32C_INSN_POP16_W_16_DST16_16_8_AN_RELATIVE_HI, "pop16.w-16-dst16-16-8-An-relative-HI", "pop.w", 24,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
   },
-/* pop.w ${Dsp-16-u16}[$Dst16An] */
+/* pop.w${G} ${Dsp-16-u16}[$Dst16An] */
   {
     M32C_INSN_POP16_W_16_DST16_16_16_AN_RELATIVE_HI, "pop16.w-16-dst16-16-16-An-relative-HI", "pop.w", 32,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
   },
-/* pop.w ${Dsp-16-u8}[sb] */
+/* pop.w${G} ${Dsp-16-u8}[sb] */
   {
     M32C_INSN_POP16_W_16_DST16_16_8_SB_RELATIVE_HI, "pop16.w-16-dst16-16-8-SB-relative-HI", "pop.w", 24,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
   },
-/* pop.w ${Dsp-16-u16}[sb] */
+/* pop.w${G} ${Dsp-16-u16}[sb] */
   {
     M32C_INSN_POP16_W_16_DST16_16_16_SB_RELATIVE_HI, "pop16.w-16-dst16-16-16-SB-relative-HI", "pop.w", 32,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
   },
-/* pop.w ${Dsp-16-s8}[fb] */
+/* pop.w${G} ${Dsp-16-s8}[fb] */
   {
     M32C_INSN_POP16_W_16_DST16_16_8_FB_RELATIVE_HI, "pop16.w-16-dst16-16-8-FB-relative-HI", "pop.w", 24,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
   },
-/* pop.w ${Dsp-16-u16} */
+/* pop.w${G} ${Dsp-16-u16} */
   {
     M32C_INSN_POP16_W_16_DST16_16_16_ABSOLUTE_HI, "pop16.w-16-dst16-16-16-absolute-HI", "pop.w", 32,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
   },
-/* pop.b $Dst16RnQI */
+/* pop.b${G} $Dst16RnQI */
   {
     M32C_INSN_POP16_B_16_DST16_RN_DIRECT_QI, "pop16.b-16-dst16-Rn-direct-QI", "pop.b", 16,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
   },
-/* pop.b $Dst16AnQI */
+/* pop.b${G} $Dst16AnQI */
   {
     M32C_INSN_POP16_B_16_DST16_AN_DIRECT_QI, "pop16.b-16-dst16-An-direct-QI", "pop.b", 16,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
   },
-/* pop.b [$Dst16An] */
+/* pop.b${G} [$Dst16An] */
   {
     M32C_INSN_POP16_B_16_DST16_AN_INDIRECT_QI, "pop16.b-16-dst16-An-indirect-QI", "pop.b", 16,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
   },
-/* pop.b ${Dsp-16-u8}[$Dst16An] */
+/* pop.b${G} ${Dsp-16-u8}[$Dst16An] */
   {
     M32C_INSN_POP16_B_16_DST16_16_8_AN_RELATIVE_QI, "pop16.b-16-dst16-16-8-An-relative-QI", "pop.b", 24,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
   },
-/* pop.b ${Dsp-16-u16}[$Dst16An] */
+/* pop.b${G} ${Dsp-16-u16}[$Dst16An] */
   {
     M32C_INSN_POP16_B_16_DST16_16_16_AN_RELATIVE_QI, "pop16.b-16-dst16-16-16-An-relative-QI", "pop.b", 32,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
   },
-/* pop.b ${Dsp-16-u8}[sb] */
+/* pop.b${G} ${Dsp-16-u8}[sb] */
   {
     M32C_INSN_POP16_B_16_DST16_16_8_SB_RELATIVE_QI, "pop16.b-16-dst16-16-8-SB-relative-QI", "pop.b", 24,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
   },
-/* pop.b ${Dsp-16-u16}[sb] */
+/* pop.b${G} ${Dsp-16-u16}[sb] */
   {
     M32C_INSN_POP16_B_16_DST16_16_16_SB_RELATIVE_QI, "pop16.b-16-dst16-16-16-SB-relative-QI", "pop.b", 32,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
   },
-/* pop.b ${Dsp-16-s8}[fb] */
+/* pop.b${G} ${Dsp-16-s8}[fb] */
   {
     M32C_INSN_POP16_B_16_DST16_16_8_FB_RELATIVE_QI, "pop16.b-16-dst16-16-8-FB-relative-QI", "pop.b", 24,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
   },
-/* pop.b ${Dsp-16-u16} */
+/* pop.b${G} ${Dsp-16-u16} */
   {
     M32C_INSN_POP16_B_16_DST16_16_16_ABSOLUTE_QI, "pop16.b-16-dst16-16-16-absolute-QI", "pop.b", 32,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_1ADDR, 0 } } } }
   },
+/* or.b${S} ${SrcDst16-r0l-r0h-S-normal} */
+  {
+    M32C_INSN_OR16_B_S_R0L_R0H_SRCDST16_R0L_R0H_S_DERIVED, "or16.b.S-r0l-r0h-srcdst16-r0l-r0h-S-derived", "or.b", 8,
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
+  },
+/* or.b${S} ${Dsp-8-u8}[sb],${Dst16RnQI-S} */
+  {
+    M32C_INSN_OR16_B_S_SRC2_SRC16_2_S_8_SB_RELATIVE_QI, "or16.b.S-src2-src16-2-S-8-SB-relative-QI", "or.b", 16,
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
+  },
+/* or.b${S} ${Dsp-8-s8}[fb],${Dst16RnQI-S} */
+  {
+    M32C_INSN_OR16_B_S_SRC2_SRC16_2_S_8_FB_RELATIVE_QI, "or16.b.S-src2-src16-2-S-8-FB-relative-QI", "or.b", 16,
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
+  },
+/* or.b${S} ${Dsp-8-u16},${Dst16RnQI-S} */
+  {
+    M32C_INSN_OR16_B_S_SRC2_SRC16_2_S_16_ABSOLUTE_QI, "or16.b.S-src2-src16-2-S-16-absolute-QI", "or.b", 24,
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
+  },
 /* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
   {
     M32C_INSN_OR32_W_16_8_UNPREFIXED_24_UNPREFIXED_SRC32_16_8_AN_RELATIVE_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, "or32.w-16-8-Unprefixed-24-Unprefixed-src32-16-8-An-relative-Unprefixed-HI-dst32-Rn-direct-Unprefixed-HI", "or.w", 24,
@@ -47568,64 +47588,64 @@ static const CGEN_IBASE m32c_cgen_insn_table[MAX_INSNS] =
     M32C_INSN_BTSTC16_X_BIT16_16_BIT16_16_16_ABSOLUTE, "btstc16-X-bit16-16-bit16-16-16-absolute", "btstc", 32,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
   },
-/* btst${X} $Bitno32Unprefixed,$Bit32RnUnprefixed */
+/* btst${G} $Bitno32Unprefixed,$Bit32RnUnprefixed */
   {
-    M32C_INSN_BTST32_X_BIT32_16_UNPREFIXED_BIT32_RN_DIRECT_UNPREFIXED, "btst32-X-bit32-16-Unprefixed-bit32-Rn-direct-Unprefixed", "btst", 16,
+    M32C_INSN_BTST32_G_BIT32_16_UNPREFIXED_BIT32_RN_DIRECT_UNPREFIXED, "btst32-G-bit32-16-Unprefixed-bit32-Rn-direct-Unprefixed", "btst", 16,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
   },
-/* btst${X} $Bitno32Unprefixed,$Bit32AnUnprefixed */
+/* btst${G} $Bitno32Unprefixed,$Bit32AnUnprefixed */
   {
-    M32C_INSN_BTST32_X_BIT32_16_UNPREFIXED_BIT32_AN_DIRECT_UNPREFIXED, "btst32-X-bit32-16-Unprefixed-bit32-An-direct-Unprefixed", "btst", 16,
+    M32C_INSN_BTST32_G_BIT32_16_UNPREFIXED_BIT32_AN_DIRECT_UNPREFIXED, "btst32-G-bit32-16-Unprefixed-bit32-An-direct-Unprefixed", "btst", 16,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
   },
-/* btst${X} $Bitno32Unprefixed,[$Bit32AnUnprefixed] */
+/* btst${G} $Bitno32Unprefixed,[$Bit32AnUnprefixed] */
   {
-    M32C_INSN_BTST32_X_BIT32_16_UNPREFIXED_BIT32_AN_INDIRECT_UNPREFIXED, "btst32-X-bit32-16-Unprefixed-bit32-An-indirect-Unprefixed", "btst", 16,
+    M32C_INSN_BTST32_G_BIT32_16_UNPREFIXED_BIT32_AN_INDIRECT_UNPREFIXED, "btst32-G-bit32-16-Unprefixed-bit32-An-indirect-Unprefixed", "btst", 16,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
   },
-/* btst${X} ${BitBase32-16-u11-Unprefixed}[$Bit32AnUnprefixed] */
+/* btst${G} ${BitBase32-16-u11-Unprefixed}[$Bit32AnUnprefixed] */
   {
-    M32C_INSN_BTST32_X_BIT32_16_UNPREFIXED_BIT32_16_11_AN_RELATIVE_UNPREFIXED, "btst32-X-bit32-16-Unprefixed-bit32-16-11-An-relative-Unprefixed", "btst", 24,
+    M32C_INSN_BTST32_G_BIT32_16_UNPREFIXED_BIT32_16_11_AN_RELATIVE_UNPREFIXED, "btst32-G-bit32-16-Unprefixed-bit32-16-11-An-relative-Unprefixed", "btst", 24,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
   },
-/* btst${X} ${BitBase32-16-u19-Unprefixed}[$Bit32AnUnprefixed] */
+/* btst${G} ${BitBase32-16-u19-Unprefixed}[$Bit32AnUnprefixed] */
   {
-    M32C_INSN_BTST32_X_BIT32_16_UNPREFIXED_BIT32_16_19_AN_RELATIVE_UNPREFIXED, "btst32-X-bit32-16-Unprefixed-bit32-16-19-An-relative-Unprefixed", "btst", 32,
+    M32C_INSN_BTST32_G_BIT32_16_UNPREFIXED_BIT32_16_19_AN_RELATIVE_UNPREFIXED, "btst32-G-bit32-16-Unprefixed-bit32-16-19-An-relative-Unprefixed", "btst", 32,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
   },
-/* btst${X} ${BitBase32-16-u27-Unprefixed}[$Bit32AnUnprefixed] */
+/* btst${G} ${BitBase32-16-u27-Unprefixed}[$Bit32AnUnprefixed] */
   {
-    M32C_INSN_BTST32_X_BIT32_16_UNPREFIXED_BIT32_16_27_AN_RELATIVE_UNPREFIXED, "btst32-X-bit32-16-Unprefixed-bit32-16-27-An-relative-Unprefixed", "btst", 40,
+    M32C_INSN_BTST32_G_BIT32_16_UNPREFIXED_BIT32_16_27_AN_RELATIVE_UNPREFIXED, "btst32-G-bit32-16-Unprefixed-bit32-16-27-An-relative-Unprefixed", "btst", 40,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
   },
-/* btst${X} ${BitBase32-16-u11-Unprefixed}[sb] */
+/* btst${G} ${BitBase32-16-u11-Unprefixed}[sb] */
   {
-    M32C_INSN_BTST32_X_BIT32_16_UNPREFIXED_BIT32_16_11_SB_RELATIVE_UNPREFIXED, "btst32-X-bit32-16-Unprefixed-bit32-16-11-SB-relative-Unprefixed", "btst", 24,
+    M32C_INSN_BTST32_G_BIT32_16_UNPREFIXED_BIT32_16_11_SB_RELATIVE_UNPREFIXED, "btst32-G-bit32-16-Unprefixed-bit32-16-11-SB-relative-Unprefixed", "btst", 24,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
   },
-/* btst${X} ${BitBase32-16-u19-Unprefixed}[sb] */
+/* btst${G} ${BitBase32-16-u19-Unprefixed}[sb] */
   {
-    M32C_INSN_BTST32_X_BIT32_16_UNPREFIXED_BIT32_16_19_SB_RELATIVE_UNPREFIXED, "btst32-X-bit32-16-Unprefixed-bit32-16-19-SB-relative-Unprefixed", "btst", 32,
+    M32C_INSN_BTST32_G_BIT32_16_UNPREFIXED_BIT32_16_19_SB_RELATIVE_UNPREFIXED, "btst32-G-bit32-16-Unprefixed-bit32-16-19-SB-relative-Unprefixed", "btst", 32,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
   },
-/* btst${X} ${BitBase32-16-s11-Unprefixed}[fb] */
+/* btst${G} ${BitBase32-16-s11-Unprefixed}[fb] */
   {
-    M32C_INSN_BTST32_X_BIT32_16_UNPREFIXED_BIT32_16_11_FB_RELATIVE_UNPREFIXED, "btst32-X-bit32-16-Unprefixed-bit32-16-11-FB-relative-Unprefixed", "btst", 24,
+    M32C_INSN_BTST32_G_BIT32_16_UNPREFIXED_BIT32_16_11_FB_RELATIVE_UNPREFIXED, "btst32-G-bit32-16-Unprefixed-bit32-16-11-FB-relative-Unprefixed", "btst", 24,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
   },
-/* btst${X} ${BitBase32-16-s19-Unprefixed}[fb] */
+/* btst${G} ${BitBase32-16-s19-Unprefixed}[fb] */
   {
-    M32C_INSN_BTST32_X_BIT32_16_UNPREFIXED_BIT32_16_19_FB_RELATIVE_UNPREFIXED, "btst32-X-bit32-16-Unprefixed-bit32-16-19-FB-relative-Unprefixed", "btst", 32,
+    M32C_INSN_BTST32_G_BIT32_16_UNPREFIXED_BIT32_16_19_FB_RELATIVE_UNPREFIXED, "btst32-G-bit32-16-Unprefixed-bit32-16-19-FB-relative-Unprefixed", "btst", 32,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
   },
-/* btst${X} ${BitBase32-16-u19-Unprefixed} */
+/* btst${G} ${BitBase32-16-u19-Unprefixed} */
   {
-    M32C_INSN_BTST32_X_BIT32_16_UNPREFIXED_BIT32_16_19_ABSOLUTE_UNPREFIXED, "btst32-X-bit32-16-Unprefixed-bit32-16-19-absolute-Unprefixed", "btst", 32,
+    M32C_INSN_BTST32_G_BIT32_16_UNPREFIXED_BIT32_16_19_ABSOLUTE_UNPREFIXED, "btst32-G-bit32-16-Unprefixed-bit32-16-19-absolute-Unprefixed", "btst", 32,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
   },
-/* btst${X} ${BitBase32-16-u27-Unprefixed} */
+/* btst${G} ${BitBase32-16-u27-Unprefixed} */
   {
-    M32C_INSN_BTST32_X_BIT32_16_UNPREFIXED_BIT32_16_27_ABSOLUTE_UNPREFIXED, "btst32-X-bit32-16-Unprefixed-bit32-16-27-absolute-Unprefixed", "btst", 40,
+    M32C_INSN_BTST32_G_BIT32_16_UNPREFIXED_BIT32_16_27_ABSOLUTE_UNPREFIXED, "btst32-G-bit32-16-Unprefixed-bit32-16-27-absolute-Unprefixed", "btst", 40,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
   },
 /* btst${G} $Bitno16R,$Bit16Rn */
@@ -62033,12 +62053,12 @@ static const CGEN_IBASE m32c_cgen_insn_table[MAX_INSNS] =
     M32C_INSN_ADD32_L_IMM16_G, "add32.l-imm16-G", "add.l", 32,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
   },
-/* dadc.b #${Imm-16-QI} */
+/* dadc.b #${Imm-16-QI},r0l */
   {
     M32C_INSN_DADC16_B_IMM8, "dadc16.b-imm8", "dadc.b", 24,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
   },
-/* dadc.w #${Imm-16-HI} */
+/* dadc.w #${Imm-16-HI},r0 */
   {
     M32C_INSN_DADC16_W_IMM16, "dadc16.w-imm16", "dadc.w", 32,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
@@ -62053,12 +62073,12 @@ static const CGEN_IBASE m32c_cgen_insn_table[MAX_INSNS] =
     M32C_INSN_DADC16_W_R1_R0, "dadc16.w-r1-r0", "dadc.w", 16,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
   },
-/* dadd.b #${Imm-16-QI} */
+/* dadd.b #${Imm-16-QI},r0l */
   {
     M32C_INSN_DADD16_B_IMM8, "dadd16.b-imm8", "dadd.b", 24,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
   },
-/* dadd.w #${Imm-16-HI} */
+/* dadd.w #${Imm-16-HI},r0 */
   {
     M32C_INSN_DADD16_W_IMM16, "dadd16.w-imm16", "dadd.w", 32,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
@@ -62163,12 +62183,12 @@ static const CGEN_IBASE m32c_cgen_insn_table[MAX_INSNS] =
     M32C_INSN_DIVX32_W_IMM_16_HI, "divx32.w-Imm-16-HI", "divx.w", 32,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }
   },
-/* dsbb.b #${Imm-16-QI} */
+/* dsbb.b #${Imm-16-QI},r0l */
   {
     M32C_INSN_DSBB16_B_IMM8, "dsbb16.b-imm8", "dsbb.b", 24,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
   },
-/* dsbb.w #${Imm-16-HI} */
+/* dsbb.w #${Imm-16-HI},r0 */
   {
     M32C_INSN_DSBB16_W_IMM16, "dsbb16.w-imm16", "dsbb.w", 32,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
@@ -62183,12 +62203,12 @@ static const CGEN_IBASE m32c_cgen_insn_table[MAX_INSNS] =
     M32C_INSN_DSBB16_W_R1_R0, "dsbb16.w-r1-r0", "dsbb.w", 16,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
   },
-/* dsub.b #${Imm-16-QI} */
+/* dsub.b #${Imm-16-QI},r0l */
   {
     M32C_INSN_DSUB16_B_IMM8, "dsub16.b-imm8", "dsub.b", 24,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
   },
-/* dsub.w #${Imm-16-HI} */
+/* dsub.w #${Imm-16-HI},r0 */
   {
     M32C_INSN_DSUB16_W_IMM16, "dsub16.w-imm16", "dsub.w", 32,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
@@ -62538,7 +62558,7 @@ static const CGEN_IBASE m32c_cgen_insn_table[MAX_INSNS] =
     M32C_INSN_PUSH16_W_G_IMM, "push16.w.G-imm", "push.w", 32,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE, 0 } } } }
   },
-/* push.b #Imm-8-QI */
+/* push.b #${Imm-8-QI} */
   {
     M32C_INSN_PUSH32_B_IMM, "push32.b.imm", "push.b", 16,
     { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } }