diff options
| author | Maciej W. Rozycki <macro@linux-mips.org> | 2011-08-09 15:20:01 +0000 |
|---|---|---|
| committer | Maciej W. Rozycki <macro@linux-mips.org> | 2011-08-09 15:20:01 +0000 |
| commit | c292063a79b9d4a77ce4161d91ee993f6982add0 (patch) | |
| tree | 66633cbcbc0adc90b6dd98e1adce42c57ac9e766 /opcodes/mips-dis.c | |
| parent | 0636d1bed85937169fe3195eb0f550a113e91dff (diff) | |
| download | binutils-redhat-c292063a79b9d4a77ce4161d91ee993f6982add0.tar.gz | |
gas/
* config/tc-mips.c (mips_set_options): Add ase_mcu.
(mips_opts): Initialise ase_mcu to -1.
(ISA_SUPPORTS_MCU_ASE): New macro.
(MIPS_CPU_ASE_MCU): Likewise.
(is_opcode_valid): Handle MCU.
(macro_build, macro): Likewise.
(validate_mips_insn, validate_micromips_insn): Likewise.
(mips_ip): Likewise.
(options): Add OPTION_MCU and OPTION_NO_MCU.
(md_longopts): Add mmcu and mno-mcu.
(md_parse_option): Handle OPTION_MCU and OPTION_NO_MCU.
(mips_after_parse_args): Handle MCU.
(s_mipsset): Likewise.
(md_show_usage): Handle MCU options.
* doc/as.texinfo: Document -mmcu and -mno-mcu options.
* doc/c-mips.texi: Likewise, and document ".set mcu" and
".set nomcu" directives.
gas/testsuite/
* gas/mips/micromips@mcu.d: New test.
* gas/mips/mcu.d: Likewise.
* gas/mips/mcu.s: New test source.
* gas/mips/mips.exp: Run the new tests.
include/opcode/
* mips.h (OP_MASK_3BITPOS, OP_SH_3BITPOS): New macros.
(OP_MASK_OFFSET12, OP_SH_OFFSET12): Redefine.
(INSN_ASE_MASK): Add the MCU bit.
(INSN_MCU): New macro.
(M_ACLR_AB, M_ACLR_OB, M_ASET_AB, M_ASET_OB): New enum values.
(MICROMIPSOP_MASK_3BITPOS, MICROMIPSOP_SH_3BITPOS): New macros.
opcodes/
* mips-dis.c (mips_arch_choices): Enable MCU for "mips32r2"
and "mips64r2".
(print_insn_args, print_insn_micromips): Handle MCU.
* micromips-opc.c (MC): New macro.
(micromips_opcodes): Add "aclr", "aset" and "iret".
* mips-opc.c (MC): New macro.
(mips_builtin_opcodes): Add "aclr", "aset" and "iret".
Diffstat (limited to 'opcodes/mips-dis.c')
| -rw-r--r-- | opcodes/mips-dis.c | 20 |
1 files changed, 18 insertions, 2 deletions
diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c index 75f9bb788e..4e18d8ab22 100644 --- a/opcodes/mips-dis.c +++ b/opcodes/mips-dis.c @@ -564,7 +564,7 @@ const struct mips_arch_choice mips_arch_choices[] = { "mips32r2", 1, bfd_mach_mipsisa32r2, CPU_MIPS32R2, (ISA_MIPS32R2 | INSN_SMARTMIPS | INSN_DSP | INSN_DSPR2 - | INSN_MIPS3D | INSN_MT), + | INSN_MIPS3D | INSN_MT | INSN_MCU), mips_cp0_names_mips3264r2, mips_cp0sel_names_mips3264r2, ARRAY_SIZE (mips_cp0sel_names_mips3264r2), mips_hwr_names_mips3264r2 }, @@ -578,7 +578,7 @@ const struct mips_arch_choice mips_arch_choices[] = { "mips64r2", 1, bfd_mach_mipsisa64r2, CPU_MIPS64R2, (ISA_MIPS64R2 | INSN_MIPS3D | INSN_DSP | INSN_DSPR2 - | INSN_DSP64 | INSN_MT | INSN_MDMX), + | INSN_DSP64 | INSN_MT | INSN_MDMX | INSN_MCU), mips_cp0_names_mips3264r2, mips_cp0sel_names_mips3264r2, ARRAY_SIZE (mips_cp0sel_names_mips3264r2), mips_hwr_names_mips3264r2 }, @@ -1170,6 +1170,18 @@ print_insn_args (const char *d, (*info->fprintf_func) (info->stream, "%d", delta); break; + case '~': + delta = (l >> OP_SH_OFFSET12) & OP_MASK_OFFSET12; + if (delta & 0x800) + delta |= ~0x7ff; + (*info->fprintf_func) (info->stream, "%d", delta); + break; + + case '\\': + (*info->fprintf_func) (info->stream, "0x%lx", + (l >> OP_SH_3BITPOS) & OP_MASK_3BITPOS); + break; + case '\'': (*info->fprintf_func) (info->stream, "0x%lx", (l >> OP_SH_RDDSP) & OP_MASK_RDDSP); @@ -2388,6 +2400,10 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info) iprintf (is, "0x%lx", GET_OP (insn, SHAMT)); break; + case '\\': + iprintf (is, "0x%lx", GET_OP (insn, 3BITPOS)); + break; + case '|': iprintf (is, "0x%lx", GET_OP (insn, TRAP)); break; |