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authorMike Frysinger <vapier@gentoo.org>2010-09-22 20:37:23 +0000
committerMike Frysinger <vapier@gentoo.org>2010-09-22 20:37:23 +0000
commite28af083763890368802e90322e6e3040fdc97ae (patch)
treea9f892bd0d3abe593f910216dac263c2463071ee /opcodes
parentca961694cffb9e8ffd7fe56c804937f745832433 (diff)
downloadbinutils-redhat-e28af083763890368802e90322e6e3040fdc97ae.tar.gz
opcodes: blackfin: fix decoding of LSHIFT insns
The Blackfin ISA does not have a "SHIFT" insn, it has either LSHIFT, ASHIFT, or BXORSHIFT. So be specific when disassembling. As fall out of this change, we need to update some assembler tests. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/ChangeLog5
-rw-r--r--opcodes/bfin-dis.c4
2 files changed, 7 insertions, 2 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 47e711fd6c..98bc7960c7 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2010-09-22 Robin Getz <robin.getz@analog.com>
+
+ * bfin-dis.c (decode_dsp32shift_0): Decode sub opcodes 2/2 as
+ LSHIFT instead of SHIFT.
+
2010-09-22 Mike Frysinger <vapier@gentoo.org>
* bfin-dis.c (constant_formats): Constify the whole structure.
diff --git a/opcodes/bfin-dis.c b/opcodes/bfin-dis.c
index 2f77c61890..00799d254c 100644
--- a/opcodes/bfin-dis.c
+++ b/opcodes/bfin-dis.c
@@ -4054,7 +4054,7 @@ decode_dsp32shift_0 (TIword iw0, TIword iw1, disassemble_info *outf)
else if (sop == 2 && sopcde == 2)
{
OUTS (outf, dregs (dst0));
- OUTS (outf, " = SHIFT ");
+ OUTS (outf, " = LSHIFT ");
OUTS (outf, dregs (src1));
OUTS (outf, " BY ");
OUTS (outf, dregs_lo (src0));
@@ -4070,7 +4070,7 @@ decode_dsp32shift_0 (TIword iw0, TIword iw1, disassemble_info *outf)
else if (sop == 2 && sopcde == 1)
{
OUTS (outf, dregs (dst0));
- OUTS (outf, " = SHIFT ");
+ OUTS (outf, " = LSHIFT ");
OUTS (outf, dregs (src1));
OUTS (outf, " BY ");
OUTS (outf, dregs_lo (src0));