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-rw-r--r--gas/testsuite/ChangeLog5
-rw-r--r--gas/testsuite/gas/bfin/vector2.d3
-rwxr-xr-xgas/testsuite/gas/bfin/vector2.s5
3 files changed, 13 insertions, 0 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index d858213cbf..d5ea5282a4 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2006-05-25 Jie Zhang <jie.zhang@analog.com>
+
+ * gas/bfin/vector2.s, gas/bfin/vector2.d: Test to ensure (m) is not
+ thrown away.
+
2006-05-23 Thiemo Seufer <ths@mips.com>
* gas/mips/mips-gp32-fp64-pic.d, mips/mips-gp32-fp64.d,
diff --git a/gas/testsuite/gas/bfin/vector2.d b/gas/testsuite/gas/bfin/vector2.d
index 57f3a91e2f..1a6b88492e 100644
--- a/gas/testsuite/gas/bfin/vector2.d
+++ b/gas/testsuite/gas/bfin/vector2.d
@@ -469,3 +469,6 @@ Disassembly of section .text:
734: 00 9e 32 9c
738: 8b c8 9a 2f R6 = \(a0 \+= R3.H \* R2.H\) \(FU\) \|\| I2-=M0 \|\| NOP;
73c: 72 9e 00 00
+ 740: 14 c2 1a a0 R0.H = R3.H \* R2.L \(M\), R0 = R3.L \* R2.L;
+ 744: 1c c2 b8 60 R3 = R7.L \* R0.H \(M\), R2 = R7.L \* R0.L;
+ 748: 1c c0 b8 60 R3 = \(a1 = R7.L \* R0.H\) \(M\), R2 = \(a0 = R7.L \* R0.L\); \ No newline at end of file
diff --git a/gas/testsuite/gas/bfin/vector2.s b/gas/testsuite/gas/bfin/vector2.s
index 30cca43c1e..d9ea20131e 100755
--- a/gas/testsuite/gas/bfin/vector2.s
+++ b/gas/testsuite/gas/bfin/vector2.s
@@ -666,3 +666,8 @@ Ireg. */
r6=(a0+=r3.h*r2.h)(fu) || i2-=m0 ;
/* which the assembler expands into:
r6=(a0+=r3.h*r2.h)(fu) || i2-=m0 || nop ; */
+
+/* Test for ensure (m) is not thown away. */
+r0.l=r3.l*r2.l, r0.h=r3.h*r2.l (m) ;
+R2 = R7.L * R0.L, R3 = R7.L * R0.H (m);
+R2 = (A0 = R7.L * R0.L), R3 = ( A1 = R7.L * R0.H) (m);