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-rw-r--r--bfd/reloc.c359
1 files changed, 223 insertions, 136 deletions
diff --git a/bfd/reloc.c b/bfd/reloc.c
index 4d57e23abc..f880fd7969 100644
--- a/bfd/reloc.c
+++ b/bfd/reloc.c
@@ -6113,62 +6113,88 @@ ENUMDOC
to two words (uses imm instruction).
ENUM
- BFD_RELOC_AARCH64_ADD_LO12
+ BFD_RELOC_AARCH64_RELOC_START
ENUMDOC
- AArch64 ADD immediate instruction, holding bits 0 to 11 of the address.
- Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
+ AArch64 pseudo relocation code to mark the start of the AArch64
+ relocation enumerators. N.B. the order of the enumerators is
+ important as several tables in the AArch64 bfd backend are indexed
+ by these enumerators; make sure they are all synced.
ENUM
- BFD_RELOC_AARCH64_GOT_LD_PREL19
+ BFD_RELOC_AARCH64_NONE
ENUMDOC
- AArch64 Load Literal instruction, holding a 19 bit PC relative word
- offset of the global offset table entry for a symbol. The lowest two
- bits must be zero and are not stored in the instruction, giving a 21
- bit signed byte offset. This relocation type requires signed overflow
- checking.
+ AArch64 null relocation code.
ENUM
- BFD_RELOC_AARCH64_ADR_GOT_PAGE
+ BFD_RELOC_AARCH64_64
+ENUMX
+ BFD_RELOC_AARCH64_32
+ENUMX
+ BFD_RELOC_AARCH64_16
ENUMDOC
- Get to the page base of the global offset table entry for a symbol as
- part of an ADRP instruction using a 21 bit PC relative value.Used in
- conjunction with BFD_RELOC_AARCH64_LD64_GOT_LO12_NC.
+ Basic absolute relocations of N bits. These are equivalent to
+BFD_RELOC_N and they were added to assist the indexing of the howto
+table.
ENUM
- BFD_RELOC_AARCH64_ADR_HI21_PCREL
+ BFD_RELOC_AARCH64_64_PCREL
+ENUMX
+ BFD_RELOC_AARCH64_32_PCREL
+ENUMX
+ BFD_RELOC_AARCH64_16_PCREL
ENUMDOC
- AArch64 ADRP instruction, with bits 12 to 32 of a pc-relative page
- offset, giving a 4KB aligned page base address.
+ PC-relative relocations. These are equivalent to BFD_RELOC_N_PCREL
+and they were added to assist the indexing of the howto table.
ENUM
- BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL
+ BFD_RELOC_AARCH64_MOVW_G0
ENUMDOC
- AArch64 ADRP instruction, with bits 12 to 32 of a pc-relative page
- offset, giving a 4KB aligned page base address, but with no overflow
- checking.
+ AArch64 MOV[NZK] instruction with most significant bits 0 to 15
+ of an unsigned address/value.
ENUM
- BFD_RELOC_AARCH64_ADR_LO21_PCREL
+ BFD_RELOC_AARCH64_MOVW_G0_NC
ENUMDOC
- AArch64 ADR instruction, holding a simple 21 bit pc-relative byte offset.
+ AArch64 MOV[NZK] instruction with less significant bits 0 to 15 of
+ an address/value. No overflow checking.
ENUM
- BFD_RELOC_AARCH64_BRANCH19
+ BFD_RELOC_AARCH64_MOVW_G1
ENUMDOC
- AArch64 19 bit pc-relative conditional branch and compare & branch.
- The lowest two bits must be zero and are not stored in the instruction,
- giving a 21 bit signed byte offset.
+ AArch64 MOV[NZK] instruction with most significant bits 16 to 31
+ of an unsigned address/value.
ENUM
- BFD_RELOC_AARCH64_CALL26
+ BFD_RELOC_AARCH64_MOVW_G1_NC
ENUMDOC
- AArch64 26 bit pc-relative unconditional branch and link.
- The lowest two bits must be zero and are not stored in the instruction,
- giving a 28 bit signed byte offset.
+ AArch64 MOV[NZK] instruction with less significant bits 16 to 31
+ of an address/value. No overflow checking.
ENUM
- BFD_RELOC_AARCH64_GAS_INTERNAL_FIXUP
+ BFD_RELOC_AARCH64_MOVW_G2
ENUMDOC
- AArch64 pseudo relocation code to be used internally by the AArch64
- assembler and not (currently) written to any object files.
+ AArch64 MOV[NZK] instruction with most significant bits 32 to 47
+ of an unsigned address/value.
ENUM
- BFD_RELOC_AARCH64_JUMP26
+ BFD_RELOC_AARCH64_MOVW_G2_NC
ENUMDOC
- AArch64 26 bit pc-relative unconditional branch.
- The lowest two bits must be zero and are not stored in the instruction,
- giving a 28 bit signed byte offset.
+ AArch64 MOV[NZK] instruction with less significant bits 32 to 47
+ of an address/value. No overflow checking.
+ENUM
+ BFD_RELOC_AARCH64_MOVW_G3
+ENUMDOC
+ AArch64 MOV[NZK] instruction with most signficant bits 48 to 64
+ of a signed or unsigned address/value.
+ENUM
+ BFD_RELOC_AARCH64_MOVW_G0_S
+ENUMDOC
+ AArch64 MOV[NZ] instruction with most significant bits 0 to 15
+ of a signed value. Changes instruction to MOVZ or MOVN depending on the
+ value's sign.
+ENUM
+ BFD_RELOC_AARCH64_MOVW_G1_S
+ENUMDOC
+ AArch64 MOV[NZ] instruction with most significant bits 16 to 31
+ of a signed value. Changes instruction to MOVZ or MOVN depending on the
+ value's sign.
+ENUM
+ BFD_RELOC_AARCH64_MOVW_G2_S
+ENUMDOC
+ AArch64 MOV[NZ] instruction with most significant bits 32 to 47
+ of a signed value. Changes instruction to MOVZ or MOVN depending on the
+ value's sign.
ENUM
BFD_RELOC_AARCH64_LD_LO19_PCREL
ENUMDOC
@@ -6176,22 +6202,55 @@ ENUMDOC
offset. The lowest two bits must be zero and are not stored in the
instruction, giving a 21 bit signed byte offset.
ENUM
- BFD_RELOC_AARCH64_LD64_GOT_LO12_NC
+ BFD_RELOC_AARCH64_ADR_LO21_PCREL
ENUMDOC
- Unsigned 12 bit byte offset for 64 bit load/store from the page of
- the GOT entry for this symbol. Used in conjunction with
- BFD_RELOC_AARCH64_ADR_GOTPAGE.
+ AArch64 ADR instruction, holding a simple 21 bit pc-relative byte offset.
ENUM
- BFD_RELOC_AARCH64_LDST_LO12
+ BFD_RELOC_AARCH64_ADR_HI21_PCREL
ENUMDOC
- AArch64 unspecified load/store instruction, holding bits 0 to 11 of the
- address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
+ AArch64 ADRP instruction, with bits 12 to 32 of a pc-relative page
+ offset, giving a 4KB aligned page base address.
+ENUM
+ BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL
+ENUMDOC
+ AArch64 ADRP instruction, with bits 12 to 32 of a pc-relative page
+ offset, giving a 4KB aligned page base address, but with no overflow
+ checking.
+ENUM
+ BFD_RELOC_AARCH64_ADD_LO12
+ENUMDOC
+ AArch64 ADD immediate instruction, holding bits 0 to 11 of the address.
+ Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
ENUM
BFD_RELOC_AARCH64_LDST8_LO12
ENUMDOC
AArch64 8-bit load/store instruction, holding bits 0 to 11 of the
address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
ENUM
+ BFD_RELOC_AARCH64_TSTBR14
+ENUMDOC
+ AArch64 14 bit pc-relative test bit and branch.
+ The lowest two bits must be zero and are not stored in the instruction,
+ giving a 16 bit signed byte offset.
+ENUM
+ BFD_RELOC_AARCH64_BRANCH19
+ENUMDOC
+ AArch64 19 bit pc-relative conditional branch and compare & branch.
+ The lowest two bits must be zero and are not stored in the instruction,
+ giving a 21 bit signed byte offset.
+ENUM
+ BFD_RELOC_AARCH64_JUMP26
+ENUMDOC
+ AArch64 26 bit pc-relative unconditional branch.
+ The lowest two bits must be zero and are not stored in the instruction,
+ giving a 28 bit signed byte offset.
+ENUM
+ BFD_RELOC_AARCH64_CALL26
+ENUMDOC
+ AArch64 26 bit pc-relative unconditional branch and link.
+ The lowest two bits must be zero and are not stored in the instruction,
+ giving a 28 bit signed byte offset.
+ENUM
BFD_RELOC_AARCH64_LDST16_LO12
ENUMDOC
AArch64 16-bit load/store instruction, holding bits 0 to 11 of the
@@ -6212,96 +6271,122 @@ ENUMDOC
AArch64 128-bit load/store instruction, holding bits 0 to 11 of the
address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
ENUM
- BFD_RELOC_AARCH64_MOVW_G0
+ BFD_RELOC_AARCH64_GOT_LD_PREL19
ENUMDOC
- AArch64 MOV[NZK] instruction with most significant bits 0 to 15
- of an unsigned address/value.
+ AArch64 Load Literal instruction, holding a 19 bit PC relative word
+ offset of the global offset table entry for a symbol. The lowest two
+ bits must be zero and are not stored in the instruction, giving a 21
+ bit signed byte offset. This relocation type requires signed overflow
+ checking.
ENUM
- BFD_RELOC_AARCH64_MOVW_G0_S
+ BFD_RELOC_AARCH64_ADR_GOT_PAGE
ENUMDOC
- AArch64 MOV[NZ] instruction with most significant bits 0 to 15
- of a signed value. Changes instruction to MOVZ or MOVN depending on the
- value's sign.
+ Get to the page base of the global offset table entry for a symbol as
+ part of an ADRP instruction using a 21 bit PC relative value.Used in
+ conjunction with BFD_RELOC_AARCH64_LD64_GOT_LO12_NC.
ENUM
- BFD_RELOC_AARCH64_MOVW_G0_NC
+ BFD_RELOC_AARCH64_LD64_GOT_LO12_NC
ENUMDOC
- AArch64 MOV[NZK] instruction with less significant bits 0 to 15 of
- an address/value. No overflow checking.
+ Unsigned 12 bit byte offset for 64 bit load/store from the page of
+ the GOT entry for this symbol. Used in conjunction with
+ BFD_RELOC_AARCH64_ADR_GOTPAGE. Valid in LP64 ABI only.
ENUM
- BFD_RELOC_AARCH64_MOVW_G1
+ BFD_RELOC_AARCH64_LD32_GOT_LO12_NC
ENUMDOC
- AArch64 MOV[NZK] instruction with most significant bits 16 to 31
- of an unsigned address/value.
+ Unsigned 12 bit byte offset for 32 bit load/store from the page of
+ the GOT entry for this symbol. Used in conjunction with
+ BFD_RELOC_AARCH64_ADR_GOTPAGE. Valid in ILP32 ABI only.
ENUM
- BFD_RELOC_AARCH64_MOVW_G1_NC
+ BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21
ENUMDOC
- AArch64 MOV[NZK] instruction with less significant bits 16 to 31
- of an address/value. No overflow checking.
+ Get to the page base of the global offset table entry for a symbols
+ tls_index structure as part of an adrp instruction using a 21 bit PC
+ relative value. Used in conjunction with
+ BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC.
ENUM
- BFD_RELOC_AARCH64_MOVW_G1_S
+ BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC
ENUMDOC
- AArch64 MOV[NZ] instruction with most significant bits 16 to 31
- of a signed value. Changes instruction to MOVZ or MOVN depending on the
- value's sign.
+ Unsigned 12 bit byte offset to global offset table entry for a symbols
+ tls_index structure. Used in conjunction with
+ BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21.
ENUM
- BFD_RELOC_AARCH64_MOVW_G2
+ BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1
ENUMDOC
- AArch64 MOV[NZK] instruction with most significant bits 32 to 47
- of an unsigned address/value.
+ AArch64 TLS INITIAL EXEC relocation.
ENUM
- BFD_RELOC_AARCH64_MOVW_G2_NC
+ BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC
ENUMDOC
- AArch64 MOV[NZK] instruction with less significant bits 32 to 47
- of an address/value. No overflow checking.
+ AArch64 TLS INITIAL EXEC relocation.
ENUM
- BFD_RELOC_AARCH64_MOVW_G2_S
+ BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21
ENUMDOC
- AArch64 MOV[NZ] instruction with most significant bits 32 to 47
- of a signed value. Changes instruction to MOVZ or MOVN depending on the
- value's sign.
+ AArch64 TLS INITIAL EXEC relocation.
ENUM
- BFD_RELOC_AARCH64_MOVW_G3
+ BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC
ENUMDOC
- AArch64 MOV[NZK] instruction with most signficant bits 48 to 64
- of a signed or unsigned address/value.
+ AArch64 TLS INITIAL EXEC relocation.
ENUM
- BFD_RELOC_AARCH64_TLSDESC
+ BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC
ENUMDOC
- AArch64 TLS relocation.
+ AArch64 TLS INITIAL EXEC relocation.
ENUM
- BFD_RELOC_AARCH64_TLSDESC_ADD
+ BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19
ENUMDOC
- AArch64 TLS DESC relocation.
+ AArch64 TLS INITIAL EXEC relocation.
ENUM
- BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC
+ BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2
ENUMDOC
- AArch64 TLS DESC relocation.
+ AArch64 TLS LOCAL EXEC relocation.
ENUM
- BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21
+ BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1
ENUMDOC
- AArch64 TLS DESC relocation.
+ AArch64 TLS LOCAL EXEC relocation.
ENUM
- BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21
+ BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC
+ENUMDOC
+ AArch64 TLS LOCAL EXEC relocation.
+ENUM
+ BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0
+ENUMDOC
+ AArch64 TLS LOCAL EXEC relocation.
+ENUM
+ BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC
+ENUMDOC
+ AArch64 TLS LOCAL EXEC relocation.
+ENUM
+ BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12
+ENUMDOC
+ AArch64 TLS LOCAL EXEC relocation.
+ENUM
+ BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12
+ENUMDOC
+ AArch64 TLS LOCAL EXEC relocation.
+ENUM
+ BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC
+ENUMDOC
+ AArch64 TLS LOCAL EXEC relocation.
+ENUM
+ BFD_RELOC_AARCH64_TLSDESC_LD_PREL19
ENUMDOC
AArch64 TLS DESC relocation.
ENUM
- BFD_RELOC_AARCH64_TLSDESC_CALL
+ BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21
ENUMDOC
AArch64 TLS DESC relocation.
ENUM
- BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC
+ BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21
ENUMDOC
AArch64 TLS DESC relocation.
ENUM
- BFD_RELOC_AARCH64_TLSDESC_LD_PREL19
+ BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC
ENUMDOC
AArch64 TLS DESC relocation.
ENUM
- BFD_RELOC_AARCH64_TLSDESC_LDR
+ BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC
ENUMDOC
AArch64 TLS DESC relocation.
ENUM
- BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC
+ BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC
ENUMDOC
AArch64 TLS DESC relocation.
ENUM
@@ -6309,88 +6394,90 @@ ENUM
ENUMDOC
AArch64 TLS DESC relocation.
ENUM
- BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC
+ BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC
ENUMDOC
- Unsigned 12 bit byte offset to global offset table entry for a symbols
- tls_index structure. Used in conjunction with
- BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21.
+ AArch64 TLS DESC relocation.
ENUM
- BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21
+ BFD_RELOC_AARCH64_TLSDESC_LDR
ENUMDOC
- Get to the page base of the global offset table entry for a symbols
- tls_index structure as part of an adrp instruction using a 21 bit PC
- relative value. Used in conjunction with
- BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC.
+ AArch64 TLS DESC relocation.
ENUM
- BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21
+ BFD_RELOC_AARCH64_TLSDESC_ADD
ENUMDOC
- AArch64 TLS INITIAL EXEC relocation.
+ AArch64 TLS DESC relocation.
ENUM
- BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19
+ BFD_RELOC_AARCH64_TLSDESC_CALL
ENUMDOC
- AArch64 TLS INITIAL EXEC relocation.
+ AArch64 TLS DESC relocation.
ENUM
- BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC
+ BFD_RELOC_AARCH64_COPY
ENUMDOC
- AArch64 TLS INITIAL EXEC relocation.
+ AArch64 TLS relocation.
ENUM
- BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC
+ BFD_RELOC_AARCH64_GLOB_DAT
ENUMDOC
- AArch64 TLS INITIAL EXEC relocation.
+ AArch64 TLS relocation.
ENUM
- BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1
+ BFD_RELOC_AARCH64_JUMP_SLOT
ENUMDOC
- AArch64 TLS INITIAL EXEC relocation.
+ AArch64 TLS relocation.
ENUM
- BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12
+ BFD_RELOC_AARCH64_RELATIVE
ENUMDOC
- AArch64 TLS LOCAL EXEC relocation.
+ AArch64 TLS relocation.
ENUM
- BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12
+ BFD_RELOC_AARCH64_TLS_DTPMOD
ENUMDOC
- AArch64 TLS LOCAL EXEC relocation.
+ AArch64 TLS relocation.
ENUM
- BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC
+ BFD_RELOC_AARCH64_TLS_DTPREL
ENUMDOC
- AArch64 TLS LOCAL EXEC relocation.
+ AArch64 TLS relocation.
ENUM
- BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0
+ BFD_RELOC_AARCH64_TLS_TPREL
ENUMDOC
- AArch64 TLS LOCAL EXEC relocation.
+ AArch64 TLS relocation.
ENUM
- BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC
+ BFD_RELOC_AARCH64_TLSDESC
ENUMDOC
- AArch64 TLS LOCAL EXEC relocation.
+ AArch64 TLS relocation.
ENUM
- BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1
+ BFD_RELOC_AARCH64_IRELATIVE
ENUMDOC
- AArch64 TLS LOCAL EXEC relocation.
+ AArch64 support for STT_GNU_IFUNC.
ENUM
- BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC
+ BFD_RELOC_AARCH64_RELOC_END
ENUMDOC
- AArch64 TLS LOCAL EXEC relocation.
+ AArch64 pseudo relocation code to mark the end of the AArch64
+ relocation enumerators that have direct mapping to ELF reloc codes.
+ There are a few more enumerators after this one; those are mainly
+ used by the AArch64 assembler for the internal fixup or to select
+ one of the above enumerators.
ENUM
- BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2
+ BFD_RELOC_AARCH64_GAS_INTERNAL_FIXUP
ENUMDOC
- AArch64 TLS LOCAL EXEC relocation.
+ AArch64 pseudo relocation code to be used internally by the AArch64
+ assembler and not (currently) written to any object files.
ENUM
- BFD_RELOC_AARCH64_TLS_DTPMOD64
+ BFD_RELOC_AARCH64_LDST_LO12
ENUMDOC
- AArch64 TLS relocation.
+ AArch64 unspecified load/store instruction, holding bits 0 to 11 of the
+ address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
ENUM
- BFD_RELOC_AARCH64_TLS_DTPREL64
+ BFD_RELOC_AARCH64_LD_GOT_LO12_NC
ENUMDOC
- AArch64 TLS relocation.
+ AArch64 pseudo relocation code to be used internally by the AArch64
+ assembler and not (currently) written to any object files.
ENUM
- BFD_RELOC_AARCH64_TLS_TPREL64
+ BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC
ENUMDOC
- AArch64 TLS relocation.
+ AArch64 pseudo relocation code to be used internally by the AArch64
+ assembler and not (currently) written to any object files.
ENUM
- BFD_RELOC_AARCH64_TSTBR14
+ BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC
ENUMDOC
- AArch64 14 bit pc-relative test bit and branch.
- The lowest two bits must be zero and are not stored in the instruction,
- giving a 16 bit signed byte offset.
+ AArch64 pseudo relocation code to be used internally by the AArch64
+ assembler and not (currently) written to any object files.
ENUM
BFD_RELOC_TILEPRO_COPY