diff options
Diffstat (limited to 'gas/config')
44 files changed, 822 insertions, 736 deletions
diff --git a/gas/config/obj-aout.c b/gas/config/obj-aout.c index d903715709..c89d3acd4f 100644 --- a/gas/config/obj-aout.c +++ b/gas/config/obj-aout.c @@ -206,7 +206,7 @@ obj_aout_frob_file_before_fix () Since writing to a section will cause the BFD back end to compute the VMAs, fake it out here.... */ bfd_byte b = 0; - boolean x = true; + bfd_boolean x = TRUE; if (bfd_section_size (stdoutput, text_section) != 0) { x = bfd_set_section_contents (stdoutput, text_section, &b, (file_ptr) 0, @@ -217,7 +217,7 @@ obj_aout_frob_file_before_fix () x = bfd_set_section_contents (stdoutput, data_section, &b, (file_ptr) 0, (bfd_size_type) 1); } - assert (x == true); + assert (x); } #else /* ! BFD_ASSEMBLER */ diff --git a/gas/config/obj-coff.c b/gas/config/obj-coff.c index 32fcd0396b..a1432652d0 100644 --- a/gas/config/obj-coff.c +++ b/gas/config/obj-coff.c @@ -3629,7 +3629,7 @@ write_object_file () #if 0 /* Recent changes to write need this, but where it should go is up to Ken.. */ - if (bfd_close_all_done (abfd) == false) + if (!bfd_close_all_done (abfd)) as_fatal (_("Can't close %s: %s"), out_file_name, bfd_errmsg (bfd_get_error ())); #else diff --git a/gas/config/obj-ecoff.c b/gas/config/obj-ecoff.c index 32e051844c..32d4425d46 100644 --- a/gas/config/obj-ecoff.c +++ b/gas/config/obj-ecoff.c @@ -258,7 +258,7 @@ obj_ecoff_set_ext (sym, ext) know (bfd_asymbol_flavour (symbol_get_bfdsym (sym)) == bfd_target_ecoff_flavour); esym = ecoffsymbol (symbol_get_bfdsym (sym)); - esym->local = false; + esym->local = FALSE; esym->native = xmalloc (debug_swap->external_ext_size); (*debug_swap->swap_ext_out) (stdoutput, ext, esym->native); } diff --git a/gas/config/obj-elf.c b/gas/config/obj-elf.c index 221ed057ae..6046a294be 100644 --- a/gas/config/obj-elf.c +++ b/gas/config/obj-elf.c @@ -65,7 +65,7 @@ static void elf_init_stab_section PARAMS ((segT)); static symbolS *elf_common PARAMS ((int)); #ifdef NEED_ECOFF_DEBUG -static boolean elf_get_extr PARAMS ((asymbol *, EXTR *)); +static bfd_boolean elf_get_extr PARAMS ((asymbol *, EXTR *)); static void elf_set_index PARAMS ((asymbol *, bfd_size_type)); #endif @@ -1761,15 +1761,15 @@ elf_ecoff_set_ext (sym, ext) supposed to *EXT to the external symbol information, and return whether the symbol should be used at all. */ -static boolean +static bfd_boolean elf_get_extr (sym, ext) asymbol *sym; EXTR *ext; { if (sym->udata.p == NULL) - return false; + return FALSE; *ext = *(EXTR *) sym->udata.p; - return true; + return TRUE; } /* This function is called by bfd_ecoff_debug_externals. It has @@ -1849,7 +1849,7 @@ elf_frob_symbol (symp, puntp) { as_bad (_("invalid attempt to declare external version name as default in symbol `%s'"), sy_obj->versioned_name); - *puntp = true; + *puntp = TRUE; } S_SET_NAME (symp, sy_obj->versioned_name); } @@ -2155,7 +2155,7 @@ elf_frob_file_after_relocs () /* Set up the external symbols. */ debug.ssext = debug.ssext_end = NULL; debug.external_ext = debug.external_ext_end = NULL; - if (! bfd_ecoff_debug_externals (stdoutput, &debug, debug_swap, true, + if (! bfd_ecoff_debug_externals (stdoutput, &debug, debug_swap, TRUE, elf_get_extr, elf_set_index)) as_fatal (_("failed to set up debugging information: %s"), bfd_errmsg (bfd_get_error ())); @@ -2163,7 +2163,7 @@ elf_frob_file_after_relocs () sec = bfd_get_section_by_name (stdoutput, ".mdebug"); assert (sec != NULL); - know (stdoutput->output_has_begun == false); + know (!stdoutput->output_has_begun); /* We set the size of the section, call bfd_set_section_contents to force the ELF backend to allocate a file position, and then @@ -2180,7 +2180,7 @@ elf_frob_file_after_relocs () as_fatal (_("can't start writing .mdebug section: %s"), bfd_errmsg (bfd_get_error ())); - know (stdoutput->output_has_begun == true); + know (stdoutput->output_has_begun); know (sec->filepos != 0); if (! bfd_ecoff_write_debug (stdoutput, &debug, debug_swap, diff --git a/gas/config/obj-som.c b/gas/config/obj-som.c index b7e3f0fc1f..6ae7f628ac 100644 --- a/gas/config/obj-som.c +++ b/gas/config/obj-som.c @@ -1,5 +1,5 @@ /* SOM object file format. - Copyright 1993, 1994, 1998, 2000 Free Software Foundation, Inc. + Copyright 1993, 1994, 1998, 2000, 2002 Free Software Foundation, Inc. This file is part of GAS, the GNU Assembler. @@ -158,7 +158,7 @@ obj_som_version (unused) } version_seen = 1; - if (bfd_som_attach_aux_hdr (stdoutput, VERSION_AUX_ID, version) == false) + if (!bfd_som_attach_aux_hdr (stdoutput, VERSION_AUX_ID, version)) { bfd_perror (stdoutput->filename); as_perror (_("FATAL: Attaching version header %s"), @@ -204,7 +204,7 @@ obj_som_copyright (unused) } copyright_seen = 1; - if (bfd_som_attach_aux_hdr (stdoutput, COPYRIGHT_AUX_ID, copyright) == false) + if (!bfd_som_attach_aux_hdr (stdoutput, COPYRIGHT_AUX_ID, copyright)) { bfd_perror (stdoutput->filename); as_perror (_("FATAL: Attaching copyright header %s"), diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c index 690fbaf64e..c5f776a658 100644 --- a/gas/config/tc-arm.c +++ b/gas/config/tc-arm.c @@ -144,11 +144,11 @@ static unsigned long cpu_variant; static int target_oabi = 0; /* Flags stored in private area of BFD structure. */ -static int uses_apcs_26 = false; -static int atpcs = false; -static int support_interwork = false; -static int uses_apcs_float = false; -static int pic_code = false; +static int uses_apcs_26 = FALSE; +static int atpcs = FALSE; +static int support_interwork = FALSE; +static int uses_apcs_float = FALSE; +static int pic_code = FALSE; /* Variables that we set while parsing command-line options. Once all options have been read we re-process these values to set the real @@ -342,8 +342,8 @@ static const struct asm_cond conds[] = struct asm_psr { - const char * template; - boolean cpsr; + const char *template; + bfd_boolean cpsr; unsigned long field; }; @@ -360,143 +360,143 @@ struct asm_psr static const struct asm_psr psrs[] = { - {"CPSR", true, PSR_c | PSR_f}, - {"CPSR_all", true, PSR_c | PSR_f}, - {"SPSR", false, PSR_c | PSR_f}, - {"SPSR_all", false, PSR_c | PSR_f}, - {"CPSR_flg", true, PSR_f}, - {"CPSR_f", true, PSR_f}, - {"SPSR_flg", false, PSR_f}, - {"SPSR_f", false, PSR_f}, - {"CPSR_c", true, PSR_c}, - {"CPSR_ctl", true, PSR_c}, - {"SPSR_c", false, PSR_c}, - {"SPSR_ctl", false, PSR_c}, - {"CPSR_x", true, PSR_x}, - {"CPSR_s", true, PSR_s}, - {"SPSR_x", false, PSR_x}, - {"SPSR_s", false, PSR_s}, + {"CPSR", TRUE, PSR_c | PSR_f}, + {"CPSR_all", TRUE, PSR_c | PSR_f}, + {"SPSR", FALSE, PSR_c | PSR_f}, + {"SPSR_all", FALSE, PSR_c | PSR_f}, + {"CPSR_flg", TRUE, PSR_f}, + {"CPSR_f", TRUE, PSR_f}, + {"SPSR_flg", FALSE, PSR_f}, + {"SPSR_f", FALSE, PSR_f}, + {"CPSR_c", TRUE, PSR_c}, + {"CPSR_ctl", TRUE, PSR_c}, + {"SPSR_c", FALSE, PSR_c}, + {"SPSR_ctl", FALSE, PSR_c}, + {"CPSR_x", TRUE, PSR_x}, + {"CPSR_s", TRUE, PSR_s}, + {"SPSR_x", FALSE, PSR_x}, + {"SPSR_s", FALSE, PSR_s}, /* Combinations of flags. */ - {"CPSR_fs", true, PSR_f | PSR_s}, - {"CPSR_fx", true, PSR_f | PSR_x}, - {"CPSR_fc", true, PSR_f | PSR_c}, - {"CPSR_sf", true, PSR_s | PSR_f}, - {"CPSR_sx", true, PSR_s | PSR_x}, - {"CPSR_sc", true, PSR_s | PSR_c}, - {"CPSR_xf", true, PSR_x | PSR_f}, - {"CPSR_xs", true, PSR_x | PSR_s}, - {"CPSR_xc", true, PSR_x | PSR_c}, - {"CPSR_cf", true, PSR_c | PSR_f}, - {"CPSR_cs", true, PSR_c | PSR_s}, - {"CPSR_cx", true, PSR_c | PSR_x}, - {"CPSR_fsx", true, PSR_f | PSR_s | PSR_x}, - {"CPSR_fsc", true, PSR_f | PSR_s | PSR_c}, - {"CPSR_fxs", true, PSR_f | PSR_x | PSR_s}, - {"CPSR_fxc", true, PSR_f | PSR_x | PSR_c}, - {"CPSR_fcs", true, PSR_f | PSR_c | PSR_s}, - {"CPSR_fcx", true, PSR_f | PSR_c | PSR_x}, - {"CPSR_sfx", true, PSR_s | PSR_f | PSR_x}, - {"CPSR_sfc", true, PSR_s | PSR_f | PSR_c}, - {"CPSR_sxf", true, PSR_s | PSR_x | PSR_f}, - {"CPSR_sxc", true, PSR_s | PSR_x | PSR_c}, - {"CPSR_scf", true, PSR_s | PSR_c | PSR_f}, - {"CPSR_scx", true, PSR_s | PSR_c | PSR_x}, - {"CPSR_xfs", true, PSR_x | PSR_f | PSR_s}, - {"CPSR_xfc", true, PSR_x | PSR_f | PSR_c}, - {"CPSR_xsf", true, PSR_x | PSR_s | PSR_f}, - {"CPSR_xsc", true, PSR_x | PSR_s | PSR_c}, - {"CPSR_xcf", true, PSR_x | PSR_c | PSR_f}, - {"CPSR_xcs", true, PSR_x | PSR_c | PSR_s}, - {"CPSR_cfs", true, PSR_c | PSR_f | PSR_s}, - {"CPSR_cfx", true, PSR_c | PSR_f | PSR_x}, - {"CPSR_csf", true, PSR_c | PSR_s | PSR_f}, - {"CPSR_csx", true, PSR_c | PSR_s | PSR_x}, - {"CPSR_cxf", true, PSR_c | PSR_x | PSR_f}, - {"CPSR_cxs", true, PSR_c | PSR_x | PSR_s}, - {"CPSR_fsxc", true, PSR_f | PSR_s | PSR_x | PSR_c}, - {"CPSR_fscx", true, PSR_f | PSR_s | PSR_c | PSR_x}, - {"CPSR_fxsc", true, PSR_f | PSR_x | PSR_s | PSR_c}, - {"CPSR_fxcs", true, PSR_f | PSR_x | PSR_c | PSR_s}, - {"CPSR_fcsx", true, PSR_f | PSR_c | PSR_s | PSR_x}, - {"CPSR_fcxs", true, PSR_f | PSR_c | PSR_x | PSR_s}, - {"CPSR_sfxc", true, PSR_s | PSR_f | PSR_x | PSR_c}, - {"CPSR_sfcx", true, PSR_s | PSR_f | PSR_c | PSR_x}, - {"CPSR_sxfc", true, PSR_s | PSR_x | PSR_f | PSR_c}, - {"CPSR_sxcf", true, PSR_s | PSR_x | PSR_c | PSR_f}, - {"CPSR_scfx", true, PSR_s | PSR_c | PSR_f | PSR_x}, - {"CPSR_scxf", true, PSR_s | PSR_c | PSR_x | PSR_f}, - {"CPSR_xfsc", true, PSR_x | PSR_f | PSR_s | PSR_c}, - {"CPSR_xfcs", true, PSR_x | PSR_f | PSR_c | PSR_s}, - {"CPSR_xsfc", true, PSR_x | PSR_s | PSR_f | PSR_c}, - {"CPSR_xscf", true, PSR_x | PSR_s | PSR_c | PSR_f}, - {"CPSR_xcfs", true, PSR_x | PSR_c | PSR_f | PSR_s}, - {"CPSR_xcsf", true, PSR_x | PSR_c | PSR_s | PSR_f}, - {"CPSR_cfsx", true, PSR_c | PSR_f | PSR_s | PSR_x}, - {"CPSR_cfxs", true, PSR_c | PSR_f | PSR_x | PSR_s}, - {"CPSR_csfx", true, PSR_c | PSR_s | PSR_f | PSR_x}, - {"CPSR_csxf", true, PSR_c | PSR_s | PSR_x | PSR_f}, - {"CPSR_cxfs", true, PSR_c | PSR_x | PSR_f | PSR_s}, - {"CPSR_cxsf", true, PSR_c | PSR_x | PSR_s | PSR_f}, - {"SPSR_fs", false, PSR_f | PSR_s}, - {"SPSR_fx", false, PSR_f | PSR_x}, - {"SPSR_fc", false, PSR_f | PSR_c}, - {"SPSR_sf", false, PSR_s | PSR_f}, - {"SPSR_sx", false, PSR_s | PSR_x}, - {"SPSR_sc", false, PSR_s | PSR_c}, - {"SPSR_xf", false, PSR_x | PSR_f}, - {"SPSR_xs", false, PSR_x | PSR_s}, - {"SPSR_xc", false, PSR_x | PSR_c}, - {"SPSR_cf", false, PSR_c | PSR_f}, - {"SPSR_cs", false, PSR_c | PSR_s}, - {"SPSR_cx", false, PSR_c | PSR_x}, - {"SPSR_fsx", false, PSR_f | PSR_s | PSR_x}, - {"SPSR_fsc", false, PSR_f | PSR_s | PSR_c}, - {"SPSR_fxs", false, PSR_f | PSR_x | PSR_s}, - {"SPSR_fxc", false, PSR_f | PSR_x | PSR_c}, - {"SPSR_fcs", false, PSR_f | PSR_c | PSR_s}, - {"SPSR_fcx", false, PSR_f | PSR_c | PSR_x}, - {"SPSR_sfx", false, PSR_s | PSR_f | PSR_x}, - {"SPSR_sfc", false, PSR_s | PSR_f | PSR_c}, - {"SPSR_sxf", false, PSR_s | PSR_x | PSR_f}, - {"SPSR_sxc", false, PSR_s | PSR_x | PSR_c}, - {"SPSR_scf", false, PSR_s | PSR_c | PSR_f}, - {"SPSR_scx", false, PSR_s | PSR_c | PSR_x}, - {"SPSR_xfs", false, PSR_x | PSR_f | PSR_s}, - {"SPSR_xfc", false, PSR_x | PSR_f | PSR_c}, - {"SPSR_xsf", false, PSR_x | PSR_s | PSR_f}, - {"SPSR_xsc", false, PSR_x | PSR_s | PSR_c}, - {"SPSR_xcf", false, PSR_x | PSR_c | PSR_f}, - {"SPSR_xcs", false, PSR_x | PSR_c | PSR_s}, - {"SPSR_cfs", false, PSR_c | PSR_f | PSR_s}, - {"SPSR_cfx", false, PSR_c | PSR_f | PSR_x}, - {"SPSR_csf", false, PSR_c | PSR_s | PSR_f}, - {"SPSR_csx", false, PSR_c | PSR_s | PSR_x}, - {"SPSR_cxf", false, PSR_c | PSR_x | PSR_f}, - {"SPSR_cxs", false, PSR_c | PSR_x | PSR_s}, - {"SPSR_fsxc", false, PSR_f | PSR_s | PSR_x | PSR_c}, - {"SPSR_fscx", false, PSR_f | PSR_s | PSR_c | PSR_x}, - {"SPSR_fxsc", false, PSR_f | PSR_x | PSR_s | PSR_c}, - {"SPSR_fxcs", false, PSR_f | PSR_x | PSR_c | PSR_s}, - {"SPSR_fcsx", false, PSR_f | PSR_c | PSR_s | PSR_x}, - {"SPSR_fcxs", false, PSR_f | PSR_c | PSR_x | PSR_s}, - {"SPSR_sfxc", false, PSR_s | PSR_f | PSR_x | PSR_c}, - {"SPSR_sfcx", false, PSR_s | PSR_f | PSR_c | PSR_x}, - {"SPSR_sxfc", false, PSR_s | PSR_x | PSR_f | PSR_c}, - {"SPSR_sxcf", false, PSR_s | PSR_x | PSR_c | PSR_f}, - {"SPSR_scfx", false, PSR_s | PSR_c | PSR_f | PSR_x}, - {"SPSR_scxf", false, PSR_s | PSR_c | PSR_x | PSR_f}, - {"SPSR_xfsc", false, PSR_x | PSR_f | PSR_s | PSR_c}, - {"SPSR_xfcs", false, PSR_x | PSR_f | PSR_c | PSR_s}, - {"SPSR_xsfc", false, PSR_x | PSR_s | PSR_f | PSR_c}, - {"SPSR_xscf", false, PSR_x | PSR_s | PSR_c | PSR_f}, - {"SPSR_xcfs", false, PSR_x | PSR_c | PSR_f | PSR_s}, - {"SPSR_xcsf", false, PSR_x | PSR_c | PSR_s | PSR_f}, - {"SPSR_cfsx", false, PSR_c | PSR_f | PSR_s | PSR_x}, - {"SPSR_cfxs", false, PSR_c | PSR_f | PSR_x | PSR_s}, - {"SPSR_csfx", false, PSR_c | PSR_s | PSR_f | PSR_x}, - {"SPSR_csxf", false, PSR_c | PSR_s | PSR_x | PSR_f}, - {"SPSR_cxfs", false, PSR_c | PSR_x | PSR_f | PSR_s}, - {"SPSR_cxsf", false, PSR_c | PSR_x | PSR_s | PSR_f}, + {"CPSR_fs", TRUE, PSR_f | PSR_s}, + {"CPSR_fx", TRUE, PSR_f | PSR_x}, + {"CPSR_fc", TRUE, PSR_f | PSR_c}, + {"CPSR_sf", TRUE, PSR_s | PSR_f}, + {"CPSR_sx", TRUE, PSR_s | PSR_x}, + {"CPSR_sc", TRUE, PSR_s | PSR_c}, + {"CPSR_xf", TRUE, PSR_x | PSR_f}, + {"CPSR_xs", TRUE, PSR_x | PSR_s}, + {"CPSR_xc", TRUE, PSR_x | PSR_c}, + {"CPSR_cf", TRUE, PSR_c | PSR_f}, + {"CPSR_cs", TRUE, PSR_c | PSR_s}, + {"CPSR_cx", TRUE, PSR_c | PSR_x}, + {"CPSR_fsx", TRUE, PSR_f | PSR_s | PSR_x}, + {"CPSR_fsc", TRUE, PSR_f | PSR_s | PSR_c}, + {"CPSR_fxs", TRUE, PSR_f | PSR_x | PSR_s}, + {"CPSR_fxc", TRUE, PSR_f | PSR_x | PSR_c}, + {"CPSR_fcs", TRUE, PSR_f | PSR_c | PSR_s}, + {"CPSR_fcx", TRUE, PSR_f | PSR_c | PSR_x}, + {"CPSR_sfx", TRUE, PSR_s | PSR_f | PSR_x}, + {"CPSR_sfc", TRUE, PSR_s | PSR_f | PSR_c}, + {"CPSR_sxf", TRUE, PSR_s | PSR_x | PSR_f}, + {"CPSR_sxc", TRUE, PSR_s | PSR_x | PSR_c}, + {"CPSR_scf", TRUE, PSR_s | PSR_c | PSR_f}, + {"CPSR_scx", TRUE, PSR_s | PSR_c | PSR_x}, + {"CPSR_xfs", TRUE, PSR_x | PSR_f | PSR_s}, + {"CPSR_xfc", TRUE, PSR_x | PSR_f | PSR_c}, + {"CPSR_xsf", TRUE, PSR_x | PSR_s | PSR_f}, + {"CPSR_xsc", TRUE, PSR_x | PSR_s | PSR_c}, + {"CPSR_xcf", TRUE, PSR_x | PSR_c | PSR_f}, + {"CPSR_xcs", TRUE, PSR_x | PSR_c | PSR_s}, + {"CPSR_cfs", TRUE, PSR_c | PSR_f | PSR_s}, + {"CPSR_cfx", TRUE, PSR_c | PSR_f | PSR_x}, + {"CPSR_csf", TRUE, PSR_c | PSR_s | PSR_f}, + {"CPSR_csx", TRUE, PSR_c | PSR_s | PSR_x}, + {"CPSR_cxf", TRUE, PSR_c | PSR_x | PSR_f}, + {"CPSR_cxs", TRUE, PSR_c | PSR_x | PSR_s}, + {"CPSR_fsxc", TRUE, PSR_f | PSR_s | PSR_x | PSR_c}, + {"CPSR_fscx", TRUE, PSR_f | PSR_s | PSR_c | PSR_x}, + {"CPSR_fxsc", TRUE, PSR_f | PSR_x | PSR_s | PSR_c}, + {"CPSR_fxcs", TRUE, PSR_f | PSR_x | PSR_c | PSR_s}, + {"CPSR_fcsx", TRUE, PSR_f | PSR_c | PSR_s | PSR_x}, + {"CPSR_fcxs", TRUE, PSR_f | PSR_c | PSR_x | PSR_s}, + {"CPSR_sfxc", TRUE, PSR_s | PSR_f | PSR_x | PSR_c}, + {"CPSR_sfcx", TRUE, PSR_s | PSR_f | PSR_c | PSR_x}, + {"CPSR_sxfc", TRUE, PSR_s | PSR_x | PSR_f | PSR_c}, + {"CPSR_sxcf", TRUE, PSR_s | PSR_x | PSR_c | PSR_f}, + {"CPSR_scfx", TRUE, PSR_s | PSR_c | PSR_f | PSR_x}, + {"CPSR_scxf", TRUE, PSR_s | PSR_c | PSR_x | PSR_f}, + {"CPSR_xfsc", TRUE, PSR_x | PSR_f | PSR_s | PSR_c}, + {"CPSR_xfcs", TRUE, PSR_x | PSR_f | PSR_c | PSR_s}, + {"CPSR_xsfc", TRUE, PSR_x | PSR_s | PSR_f | PSR_c}, + {"CPSR_xscf", TRUE, PSR_x | PSR_s | PSR_c | PSR_f}, + {"CPSR_xcfs", TRUE, PSR_x | PSR_c | PSR_f | PSR_s}, + {"CPSR_xcsf", TRUE, PSR_x | PSR_c | PSR_s | PSR_f}, + {"CPSR_cfsx", TRUE, PSR_c | PSR_f | PSR_s | PSR_x}, + {"CPSR_cfxs", TRUE, PSR_c | PSR_f | PSR_x | PSR_s}, + {"CPSR_csfx", TRUE, PSR_c | PSR_s | PSR_f | PSR_x}, + {"CPSR_csxf", TRUE, PSR_c | PSR_s | PSR_x | PSR_f}, + {"CPSR_cxfs", TRUE, PSR_c | PSR_x | PSR_f | PSR_s}, + {"CPSR_cxsf", TRUE, PSR_c | PSR_x | PSR_s | PSR_f}, + {"SPSR_fs", FALSE, PSR_f | PSR_s}, + {"SPSR_fx", FALSE, PSR_f | PSR_x}, + {"SPSR_fc", FALSE, PSR_f | PSR_c}, + {"SPSR_sf", FALSE, PSR_s | PSR_f}, + {"SPSR_sx", FALSE, PSR_s | PSR_x}, + {"SPSR_sc", FALSE, PSR_s | PSR_c}, + {"SPSR_xf", FALSE, PSR_x | PSR_f}, + {"SPSR_xs", FALSE, PSR_x | PSR_s}, + {"SPSR_xc", FALSE, PSR_x | PSR_c}, + {"SPSR_cf", FALSE, PSR_c | PSR_f}, + {"SPSR_cs", FALSE, PSR_c | PSR_s}, + {"SPSR_cx", FALSE, PSR_c | PSR_x}, + {"SPSR_fsx", FALSE, PSR_f | PSR_s | PSR_x}, + {"SPSR_fsc", FALSE, PSR_f | PSR_s | PSR_c}, + {"SPSR_fxs", FALSE, PSR_f | PSR_x | PSR_s}, + {"SPSR_fxc", FALSE, PSR_f | PSR_x | PSR_c}, + {"SPSR_fcs", FALSE, PSR_f | PSR_c | PSR_s}, + {"SPSR_fcx", FALSE, PSR_f | PSR_c | PSR_x}, + {"SPSR_sfx", FALSE, PSR_s | PSR_f | PSR_x}, + {"SPSR_sfc", FALSE, PSR_s | PSR_f | PSR_c}, + {"SPSR_sxf", FALSE, PSR_s | PSR_x | PSR_f}, + {"SPSR_sxc", FALSE, PSR_s | PSR_x | PSR_c}, + {"SPSR_scf", FALSE, PSR_s | PSR_c | PSR_f}, + {"SPSR_scx", FALSE, PSR_s | PSR_c | PSR_x}, + {"SPSR_xfs", FALSE, PSR_x | PSR_f | PSR_s}, + {"SPSR_xfc", FALSE, PSR_x | PSR_f | PSR_c}, + {"SPSR_xsf", FALSE, PSR_x | PSR_s | PSR_f}, + {"SPSR_xsc", FALSE, PSR_x | PSR_s | PSR_c}, + {"SPSR_xcf", FALSE, PSR_x | PSR_c | PSR_f}, + {"SPSR_xcs", FALSE, PSR_x | PSR_c | PSR_s}, + {"SPSR_cfs", FALSE, PSR_c | PSR_f | PSR_s}, + {"SPSR_cfx", FALSE, PSR_c | PSR_f | PSR_x}, + {"SPSR_csf", FALSE, PSR_c | PSR_s | PSR_f}, + {"SPSR_csx", FALSE, PSR_c | PSR_s | PSR_x}, + {"SPSR_cxf", FALSE, PSR_c | PSR_x | PSR_f}, + {"SPSR_cxs", FALSE, PSR_c | PSR_x | PSR_s}, + {"SPSR_fsxc", FALSE, PSR_f | PSR_s | PSR_x | PSR_c}, + {"SPSR_fscx", FALSE, PSR_f | PSR_s | PSR_c | PSR_x}, + {"SPSR_fxsc", FALSE, PSR_f | PSR_x | PSR_s | PSR_c}, + {"SPSR_fxcs", FALSE, PSR_f | PSR_x | PSR_c | PSR_s}, + {"SPSR_fcsx", FALSE, PSR_f | PSR_c | PSR_s | PSR_x}, + {"SPSR_fcxs", FALSE, PSR_f | PSR_c | PSR_x | PSR_s}, + {"SPSR_sfxc", FALSE, PSR_s | PSR_f | PSR_x | PSR_c}, + {"SPSR_sfcx", FALSE, PSR_s | PSR_f | PSR_c | PSR_x}, + {"SPSR_sxfc", FALSE, PSR_s | PSR_x | PSR_f | PSR_c}, + {"SPSR_sxcf", FALSE, PSR_s | PSR_x | PSR_c | PSR_f}, + {"SPSR_scfx", FALSE, PSR_s | PSR_c | PSR_f | PSR_x}, + {"SPSR_scxf", FALSE, PSR_s | PSR_c | PSR_x | PSR_f}, + {"SPSR_xfsc", FALSE, PSR_x | PSR_f | PSR_s | PSR_c}, + {"SPSR_xfcs", FALSE, PSR_x | PSR_f | PSR_c | PSR_s}, + {"SPSR_xsfc", FALSE, PSR_x | PSR_s | PSR_f | PSR_c}, + {"SPSR_xscf", FALSE, PSR_x | PSR_s | PSR_c | PSR_f}, + {"SPSR_xcfs", FALSE, PSR_x | PSR_c | PSR_f | PSR_s}, + {"SPSR_xcsf", FALSE, PSR_x | PSR_c | PSR_s | PSR_f}, + {"SPSR_cfsx", FALSE, PSR_c | PSR_f | PSR_s | PSR_x}, + {"SPSR_cfxs", FALSE, PSR_c | PSR_f | PSR_x | PSR_s}, + {"SPSR_csfx", FALSE, PSR_c | PSR_s | PSR_f | PSR_x}, + {"SPSR_csxf", FALSE, PSR_c | PSR_s | PSR_x | PSR_f}, + {"SPSR_cxfs", FALSE, PSR_c | PSR_x | PSR_f | PSR_s}, + {"SPSR_cxsf", FALSE, PSR_c | PSR_x | PSR_s | PSR_f}, }; enum vfp_dp_reg_pos @@ -2113,7 +2113,7 @@ static int arm_parse_fpu PARAMS ((char *)); */ symbolS * last_label_seen; -static int label_is_thumb_function_name = false; +static int label_is_thumb_function_name = FALSE; /* Literal Pool stuff. */ @@ -2504,7 +2504,7 @@ s_thumb_func (ignore) /* The following label is the name/address of the start of a Thumb function. We need to know this for the interworking support. */ - label_is_thumb_function_name = true; + label_is_thumb_function_name = TRUE; demand_empty_rest_of_line (); } @@ -4449,7 +4449,7 @@ my_get_float_expression (str) return -1; } -/* Return true if anything in the expression is a bignum. */ +/* Return TRUE if anything in the expression is a bignum. */ static int walk_no_bignums (sp) @@ -11311,7 +11311,7 @@ arm_frob_label (sym) THUMB_SET_FUNC (sym, 1); - label_is_thumb_function_name = false; + label_is_thumb_function_name = FALSE; } } @@ -11439,7 +11439,7 @@ arm_validate_fix (fixP) be resolved before the binbary is emitted, so it is safe to say that it is adjustable. */ -boolean +bfd_boolean arm_fix_adjustable (fixP) fixS * fixP; { @@ -11462,7 +11462,7 @@ arm_fix_adjustable (fixP) addresses also ought to have their bottom bit set (assuming that they reside in Thumb code), but at the moment they will not. */ -boolean +bfd_boolean arm_fix_adjustable (fixP) fixS * fixP; { diff --git a/gas/config/tc-arm.h b/gas/config/tc-arm.h index e01594539d..441c16f30c 100644 --- a/gas/config/tc-arm.h +++ b/gas/config/tc-arm.h @@ -122,7 +122,7 @@ struct fix; #define EXTERN_FORCE_RELOC 1 #define tc_fix_adjustable(FIX) arm_fix_adjustable (FIX) -boolean arm_fix_adjustable PARAMS ((struct fix *)); +bfd_boolean arm_fix_adjustable PARAMS ((struct fix *)); /* Values passed to md_apply_fix3 don't include the symbol value. */ #define MD_APPLY_SYM_VALUE(FIX) 0 diff --git a/gas/config/tc-avr.c b/gas/config/tc-avr.c index c951646d99..43b4b7167a 100644 --- a/gas/config/tc-avr.c +++ b/gas/config/tc-avr.c @@ -694,25 +694,25 @@ avr_operand (opcode, where, op, line) case 'h': str = parse_exp (str, &op_expr); fix_new_exp (frag_now, where, opcode->insn_size * 2, - &op_expr, false, BFD_RELOC_AVR_CALL); + &op_expr, FALSE, BFD_RELOC_AVR_CALL); break; case 'L': str = parse_exp (str, &op_expr); fix_new_exp (frag_now, where, opcode->insn_size * 2, - &op_expr, true, BFD_RELOC_AVR_13_PCREL); + &op_expr, TRUE, BFD_RELOC_AVR_13_PCREL); break; case 'l': str = parse_exp (str, &op_expr); fix_new_exp (frag_now, where, opcode->insn_size * 2, - &op_expr, true, BFD_RELOC_AVR_7_PCREL); + &op_expr, TRUE, BFD_RELOC_AVR_7_PCREL); break; case 'i': str = parse_exp (str, &op_expr); fix_new_exp (frag_now, where + 2, opcode->insn_size * 2, - &op_expr, false, BFD_RELOC_16); + &op_expr, FALSE, BFD_RELOC_16); break; case 'M': @@ -723,7 +723,7 @@ avr_operand (opcode, where, op, line) r_type = avr_ldi_expression (&op_expr); str = input_line_pointer; fix_new_exp (frag_now, where, 3, - &op_expr, false, r_type); + &op_expr, FALSE, r_type); } break; @@ -1283,16 +1283,16 @@ avr_cons_fix_new (frag, where, nbytes, exp) if (exp_mod_pm == 0) { if (nbytes == 2) - fix_new_exp (frag, where, nbytes, exp, false, BFD_RELOC_16); + fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_16); else if (nbytes == 4) - fix_new_exp (frag, where, nbytes, exp, false, BFD_RELOC_32); + fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_32); else as_bad (_("illegal %srelocation size: %d"), "", nbytes); } else { if (nbytes == 2) - fix_new_exp (frag, where, nbytes, exp, false, BFD_RELOC_AVR_16_PM); + fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_AVR_16_PM); else as_bad (_("illegal %srelocation size: %d"), "`pm' ", nbytes); exp_mod_pm = 0; diff --git a/gas/config/tc-cris.c b/gas/config/tc-cris.c index 8f4b63324b..84f1a7589c 100644 --- a/gas/config/tc-cris.c +++ b/gas/config/tc-cris.c @@ -158,13 +158,13 @@ static char *cris_insn_first_word_frag PARAMS ((void)); static struct hash_control *op_hash = NULL; /* Whether we demand that registers have a `$' prefix. Default here. */ -static boolean demand_register_prefix = false; +static bfd_boolean demand_register_prefix = FALSE; /* Whether global user symbols have a leading underscore. Default here. */ -static boolean symbols_have_leading_underscore = true; +static bfd_boolean symbols_have_leading_underscore = TRUE; /* Whether or not we allow PIC, and expand to PIC-friendly constructs. */ -static boolean pic = false; +static bfd_boolean pic = FALSE; const pseudo_typeS md_pseudo_table[] = { @@ -2920,21 +2920,21 @@ md_parse_option (arg, argp) return 1; case OPTION_NO_US: - demand_register_prefix = true; + demand_register_prefix = TRUE; if (OUTPUT_FLAVOR == bfd_target_aout_flavour) as_bad (_("--no-underscore is invalid with a.out format")); else - symbols_have_leading_underscore = false; + symbols_have_leading_underscore = FALSE; return 1; case OPTION_US: - demand_register_prefix = false; - symbols_have_leading_underscore = true; + demand_register_prefix = FALSE; + symbols_have_leading_underscore = TRUE; return 1; case OPTION_PIC: - pic = true; + pic = TRUE; return 1; default: @@ -3195,14 +3195,14 @@ tc_cris_check_adjusted_broken_word (new_offset, brokwP) static void cris_force_reg_prefix () { - demand_register_prefix = true; + demand_register_prefix = TRUE; } /* Do not demand a leading REGISTER_PREFIX_CHAR for all registers. */ static void cris_relax_reg_prefix () { - demand_register_prefix = false; + demand_register_prefix = FALSE; } /* Adjust for having a leading '_' on all user symbols. */ @@ -3213,7 +3213,7 @@ static void cris_sym_leading_underscore () thinks symbol starts with agrees with the command-line options, since the bfd is already created. */ - if (symbols_have_leading_underscore == false) + if (!symbols_have_leading_underscore) as_bad (_(".syntax %s requires command-line option `--underscore'"), SYNTAX_USER_SYM_LEADING_UNDERSCORE); } @@ -3222,7 +3222,7 @@ static void cris_sym_leading_underscore () static void cris_sym_no_leading_underscore () { - if (symbols_have_leading_underscore == true) + if (symbols_have_leading_underscore) as_bad (_(".syntax %s requires command-line option `--no-underscore'"), SYNTAX_USER_SYM_NO_LEADING_UNDERSCORE); } diff --git a/gas/config/tc-d10v.c b/gas/config/tc-d10v.c index 8dab9a1e53..c9c54a8680 100644 --- a/gas/config/tc-d10v.c +++ b/gas/config/tc-d10v.c @@ -71,13 +71,13 @@ typedef int packing_type; #define PACK_RIGHT_LEFT (3) /* "<-" */ static packing_type etype = PACK_UNSPEC; /* Used by d10v_cleanup. */ -/* True if instruction swapping warnings should be inhibited. +/* TRUE if instruction swapping warnings should be inhibited. --nowarnswap. */ -static boolean flag_warn_suppress_instructionswap; +static bfd_boolean flag_warn_suppress_instructionswap; -/* True if instruction packing should be performed when --gstabs is specified. +/* TRUE if instruction packing should be performed when --gstabs is specified. --gstabs-packing, --no-gstabs-packing. */ -static boolean flag_allow_gstabs_packing = 1; +static bfd_boolean flag_allow_gstabs_packing = 1; /* Local functions. */ static int reg_name_search PARAMS ((char *name)); @@ -99,9 +99,9 @@ static int parallel_ok PARAMS ((struct d10v_opcode *opcode1, unsigned long insn1 struct d10v_opcode *opcode2, unsigned long insn2, packing_type exec_type)); -static void check_resource_conflict PARAMS ((struct d10v_opcode *opcode1, - unsigned long insn1, - struct d10v_opcode *opcode2, +static void check_resource_conflict PARAMS ((struct d10v_opcode *opcode1, + unsigned long insn1, + struct d10v_opcode *opcode2, unsigned long insn2)); static symbolS * find_symbol_matching_register PARAMS ((expressionS *)); @@ -652,7 +652,7 @@ build_insn (opcode, opers, insn) get_reloc ((struct d10v_operand *) &d10v_operands[opcode->operands[i]]); /* Check that a immediate was passed to ops that expect one. */ - if ((flags & OPERAND_NUM) + if ((flags & OPERAND_NUM) && (fixups->fix[fixups->fc].reloc == 0)) as_bad (_("operand is not an immediate")); } @@ -666,10 +666,10 @@ build_insn (opcode, opers, insn) fixups->fix[fixups->fc].exp = opers[i]; fixups->fix[fixups->fc].operand = opcode->operands[i]; fixups->fix[fixups->fc].pcrel = - (flags & OPERAND_ADDR) ? true : false; + (flags & OPERAND_ADDR) ? TRUE : FALSE; (fixups->fc)++; } - + /* Truncate to the proper number of bits. */ if ((opers[i].X_op == O_constant) && check_range (number, bits, flags)) as_bad (_("operand out of range: %lu"), number); @@ -677,8 +677,8 @@ build_insn (opcode, opers, insn) insn = insn | (number << shift); } - /* kludge: for DIVS, we need to put the operands in twice on the second - pass, format is changed to LONG_R to force the second set of operands + /* kludge: for DIVS, we need to put the operands in twice on the second + pass, format is changed to LONG_R to force the second set of operands to not be shifted over 15. */ if ((opcode->opcode == OPCODE_DIVS) && (format == LONG_L)) insn = build_insn (opcode, opers, insn); @@ -735,8 +735,8 @@ write_1_short (opcode, insn, fx) if (opcode->exec_type & PARONLY) as_fatal (_("Instruction must be executed in parallel with another instruction.")); - /* The other container needs to be NOP. - According to 4.3.1: for FM=00, sub-instructions performed only by IU + /* The other container needs to be NOP. + According to 4.3.1: for FM=00, sub-instructions performed only by IU cannot be encoded in L-container. */ if (opcode->unit == IU) insn |= FM00 | (NOP << 15); /* Right container. */ @@ -969,8 +969,8 @@ parallel_ok (op1, insn1, op2, insn2, exec_type) and the second reads the PSW (which includes C, F0, and F1), then they cannot operate safely in parallel. */ - /* The bitmasks (mod and used) look like this (bit 31 = MSB). - r0-r15 0-15 + /* The bitmasks (mod and used) look like this (bit 31 = MSB). + r0-r15 0-15 a0-a1 16-17 cr (not psw) 18 psw 19 @@ -1057,7 +1057,7 @@ parallel_ok (op1, insn1, op2, insn2, exec_type) /* Determine if there are any resource conflicts among two manually parallelized instructions. Some of this was lifted from parallel_ok. */ -static void +static void check_resource_conflict (op1, insn1, op2, insn2) struct d10v_opcode *op1, *op2; unsigned long insn1, insn2; @@ -1130,17 +1130,17 @@ check_resource_conflict (op1, insn1, op2, insn2) if (flags & (OPERAND_ACC0 | OPERAND_ACC1)) regno += 16; else if (flags & OPERAND_CONTROL) /* mvtc or mvfc */ - { + { if (regno == 0) regno = 19; else - regno = 18; + regno = 18; } else if (flags & OPERAND_FFLAG) regno = 22; else if (flags & OPERAND_CFLAG) regno = 21; - + if (flags & OPERAND_DEST /* Auto inc/dec also modifies the register. */ || (op->operands[i + 1] != 0 @@ -1286,7 +1286,7 @@ md_assemble (str) d10v_cleanup (); if (prev_opcode - && (0 == write_2_short (prev_opcode, prev_insn, opcode, insn, extype, + && (0 == write_2_short (prev_opcode, prev_insn, opcode, insn, extype, fixups))) { /* No instructions saved. */ @@ -1454,14 +1454,14 @@ find_opcode (opcode, myops) unsigned long current_position; unsigned long symbol_position; unsigned long value; - boolean found_symbol; + bfd_boolean found_symbol; /* Calculate the address of the current instruction and the address of the symbol. Do this by summing the offsets of previous frags until we reach the frag containing the symbol, and the current frag. */ sym_frag = symbol_get_frag (myops[opnum].X_add_symbol); - found_symbol = false; + found_symbol = FALSE; current_position = obstack_next_free (&frchain_now->frch_obstack) @@ -1473,7 +1473,7 @@ find_opcode (opcode, myops) current_position += f->fr_fix + f->fr_offset; if (f == sym_frag) - found_symbol = true; + found_symbol = TRUE; if (! found_symbol) symbol_position += f->fr_fix + f->fr_offset; @@ -1512,7 +1512,7 @@ find_opcode (opcode, myops) } match = 0; - + /* Now search the opcode table table for one with operands that matches what we've got. */ while (!match) @@ -1554,19 +1554,19 @@ find_opcode (opcode, myops) break; } - /* Unfortunatly, for the indirect operand in instructions such - as ``ldb r1, @(c,r14)'' this function can be passed - X_op == O_register (because 'c' is a valid register name). - However we cannot just ignore the case when X_op == O_register - but flags & OPERAND_REG is null, so we check to see if a symbol - of the same name as the register exists. If the symbol does - exist, then the parser was unable to distinguish the two cases + /* Unfortunatly, for the indirect operand in instructions such + as ``ldb r1, @(c,r14)'' this function can be passed + X_op == O_register (because 'c' is a valid register name). + However we cannot just ignore the case when X_op == O_register + but flags & OPERAND_REG is null, so we check to see if a symbol + of the same name as the register exists. If the symbol does + exist, then the parser was unable to distinguish the two cases and we fix things here. (Ref: PR14826) */ if (!(flags & OPERAND_REG) && (X_op == O_register)) { symbolS * sym; - + sym = find_symbol_matching_register (& myops[i]); if (sym != NULL) @@ -1764,9 +1764,9 @@ md_apply_fix3 (fixP, valP, seg) rep = (struct d10v_opcode *) hash_find (d10v_hash, "rep"); repi = (struct d10v_opcode *) hash_find (d10v_hash, "repi"); if ((insn & FM11) == FM11 - && ((repi != NULL + && ((repi != NULL && (insn & repi->mask) == (unsigned) repi->opcode) - || (rep != NULL + || (rep != NULL && (insn & rep->mask) == (unsigned) rep->opcode)) && value < 4) as_fatal @@ -1892,7 +1892,7 @@ md_operand (expressionP) } } -boolean +bfd_boolean d10v_fix_adjustable (fixP) fixS *fixP; { diff --git a/gas/config/tc-d10v.h b/gas/config/tc-d10v.h index 53fe66e755..dd8ad58c5a 100644 --- a/gas/config/tc-d10v.h +++ b/gas/config/tc-d10v.h @@ -58,7 +58,7 @@ int d10v_cleanup PARAMS ((void)); } while (0) #define tc_fix_adjustable(FIX) d10v_fix_adjustable(FIX) -boolean d10v_fix_adjustable PARAMS ((struct fix *)); +bfd_boolean d10v_fix_adjustable PARAMS ((struct fix *)); #define TC_FORCE_RELOCATION(FIX) d10v_force_relocation(FIX) extern int d10v_force_relocation PARAMS ((struct fix *)); diff --git a/gas/config/tc-d30v.c b/gas/config/tc-d30v.c index 4b547b370b..facf13759b 100644 --- a/gas/config/tc-d30v.c +++ b/gas/config/tc-d30v.c @@ -793,7 +793,7 @@ write_2_short (opcode1, insn1, opcode2, insn2, exec_type, fx) we are not optimizing, then we have been asked to produce an error about such constructs. For the purposes of this test, subroutine calls are considered to be branches. */ - write_1_short (opcode1, insn1, fx->next, false); + write_1_short (opcode1, insn1, fx->next, FALSE); return 1; } @@ -833,14 +833,14 @@ write_2_short (opcode1, insn1, opcode2, insn2, exec_type, fx) /* We must treat repeat instructions likewise, since the following instruction has to be separate from the repeat in order to be repeated. */ - write_1_short (opcode1, insn1, fx->next, false); + write_1_short (opcode1, insn1, fx->next, FALSE); return 1; } else if (prev_left_kills_right_p) { /* The left instruction kils the right slot, so we must leave it empty. */ - write_1_short (opcode1, insn1, fx->next, false); + write_1_short (opcode1, insn1, fx->next, FALSE); return 1; } else if (opcode1->op->unit == IU) @@ -850,7 +850,7 @@ write_2_short (opcode1, insn1, opcode2, insn2, exec_type, fx) /* Case 103810 is a request from Mitsubishi that opcodes with EITHER_BUT_PREFER_MU should not be executed in reverse sequential order. */ - write_1_short (opcode1, insn1, fx->next, false); + write_1_short (opcode1, insn1, fx->next, FALSE); return 1; } @@ -1243,7 +1243,7 @@ md_assemble (str) if ((prev_insn != -1) && prev_seg && ((prev_seg != now_seg) || (prev_subseg != now_subseg))) - d30v_cleanup (false); + d30v_cleanup (FALSE); if (d30v_current_align < 3) d30v_align (3, NULL, d30v_last_label); @@ -1282,7 +1282,7 @@ md_assemble (str) /* If two instructions are present and we already have one saved, then first write it out. */ - d30v_cleanup (false); + d30v_cleanup (FALSE); /* Assemble first instruction and save it. */ prev_insn = do_assemble (str, &prev_opcode, 1, 0); @@ -1343,13 +1343,13 @@ md_assemble (str) of NOPs for us. */ if (prev_insn != -1 && (strcmp (prev_opcode.op->name, "nop") == 0)) - d30v_cleanup (false); + d30v_cleanup (FALSE); else { char *f; if (prev_insn != -1) - d30v_cleanup (true); + d30v_cleanup (TRUE); else { f = frag_more (8); @@ -1374,7 +1374,7 @@ md_assemble (str) { /* Can't parallelize, flush current instruction and add a sequential NOP. */ - write_1_short (&opcode, (long) insn, fixups->next->next, true); + write_1_short (&opcode, (long) insn, fixups->next->next, TRUE); /* Make the previous instruction the current one. */ extype = EXEC_UNKNOWN; @@ -1393,7 +1393,7 @@ md_assemble (str) { if (extype != EXEC_UNKNOWN) as_bad (_("Instruction uses long version, so it cannot be mixed as specified")); - d30v_cleanup (false); + d30v_cleanup (FALSE); write_long (&opcode, insn, fixups); prev_insn = -1; } @@ -1999,7 +1999,7 @@ d30v_cleanup (use_sequential) subseg_set (seg, subseg); prev_insn = -1; if (use_sequential) - prev_mul32_p = false; + prev_mul32_p = FALSE; } return 1; @@ -2031,7 +2031,7 @@ d30v_start_line () c++; if (*c == '.') - d30v_cleanup (false); + d30v_cleanup (FALSE); } static void @@ -2063,7 +2063,7 @@ d30v_frob_label (lab) symbolS *lab; { /* Emit any pending instructions. */ - d30v_cleanup (false); + d30v_cleanup (FALSE); /* Update the label's address with the current output pointer. */ symbol_set_frag (lab, frag_now); @@ -2113,7 +2113,7 @@ d30v_align (n, pfill, label) this alignement request. The alignment of the current frag can be changed under our feet, for example by a .ascii directive in the source code. cf testsuite/gas/d30v/reloc.s */ - d30v_cleanup (false); + d30v_cleanup (FALSE); if (pfill == NULL) { @@ -2140,7 +2140,7 @@ d30v_align (n, pfill, label) if (label != NULL) { symbolS *sym; - int label_seen = false; + int label_seen = FALSE; struct frag *old_frag; valueT old_value; valueT new_value; @@ -2167,7 +2167,7 @@ d30v_align (n, pfill, label) if (symbol_get_frag (sym) == old_frag && S_GET_VALUE (sym) == old_value) { - label_seen = true; + label_seen = TRUE; symbol_set_frag (sym, frag_now); S_SET_VALUE (sym, new_value); } diff --git a/gas/config/tc-d30v.h b/gas/config/tc-d30v.h index e0f7475bf4..7306817c10 100644 --- a/gas/config/tc-d30v.h +++ b/gas/config/tc-d30v.h @@ -48,9 +48,9 @@ extern long md_pcrel_from_section PARAMS ((struct fix *, segT)); #define md_number_to_chars number_to_chars_bigendian int d30v_cleanup PARAMS ((int)); -#define md_after_pass_hook() d30v_cleanup (false) -#define md_cleanup() d30v_cleanup (false) -#define TC_START_LABEL(ch, ptr) (ch == ':' && d30v_cleanup (false)) +#define md_after_pass_hook() d30v_cleanup (FALSE) +#define md_cleanup() d30v_cleanup (FALSE) +#define TC_START_LABEL(ch, ptr) (ch == ':' && d30v_cleanup (FALSE)) void d30v_start_line PARAMS ((void)); #define md_start_line_hook() d30v_start_line () diff --git a/gas/config/tc-dlx.c b/gas/config/tc-dlx.c index 1fc0ab5e7d..2ceee03ebf 100644 --- a/gas/config/tc-dlx.c +++ b/gas/config/tc-dlx.c @@ -1154,7 +1154,7 @@ md_dlx_force_relocation (fixp) || S_FORCE_RELOC (fixp->fx_addsy)); } -boolean +bfd_boolean md_dlx_fix_adjustable (fixP) fixS *fixP; { diff --git a/gas/config/tc-dlx.h b/gas/config/tc-dlx.h index 691981fa50..aa3890be31 100644 --- a/gas/config/tc-dlx.h +++ b/gas/config/tc-dlx.h @@ -80,7 +80,7 @@ struct fix; extern int md_dlx_force_relocation PARAMS ((struct fix *)); #define tc_fix_adjustable(FIX) md_dlx_fix_adjustable (FIX) -extern boolean md_dlx_fix_adjustable PARAMS ((struct fix *)); +extern bfd_boolean md_dlx_fix_adjustable PARAMS ((struct fix *)); /* Values passed to md_apply_fix3 don't include the symbol value. */ #define MD_APPLY_SYM_VALUE(FIX) 0 diff --git a/gas/config/tc-fr30.c b/gas/config/tc-fr30.c index 54a12bfb34..943af80f0c 100644 --- a/gas/config/tc-fr30.c +++ b/gas/config/tc-fr30.c @@ -641,7 +641,7 @@ fr30_is_colon_insn (start) return 0; } -boolean +bfd_boolean fr30_fix_adjustable (fixP) fixS * fixP; { diff --git a/gas/config/tc-fr30.h b/gas/config/tc-fr30.h index be817cffba..5f7bc62cfe 100644 --- a/gas/config/tc-fr30.h +++ b/gas/config/tc-fr30.h @@ -49,7 +49,7 @@ #define tc_fix_adjustable(FIX) fr30_fix_adjustable (FIX) struct fix; -extern boolean fr30_fix_adjustable PARAMS ((struct fix *)); +extern bfd_boolean fr30_fix_adjustable PARAMS ((struct fix *)); /* When relaxing, we need to emit various relocs we otherwise wouldn't. */ #define TC_FORCE_RELOCATION(fix) fr30_force_relocation (fix) diff --git a/gas/config/tc-frv.c b/gas/config/tc-frv.c index 6dbe78aa93..b0807e1ca0 100644 --- a/gas/config/tc-frv.c +++ b/gas/config/tc-frv.c @@ -1,5 +1,5 @@ /* tc-frv.c -- Assembler for the Fujitsu FRV. - Copyright (C) 2002 Free Software Foundation. + Copyright 2002 Free Software Foundation. This file is part of GAS, the GNU Assembler. @@ -67,8 +67,8 @@ enum vliw_insn_type #define NOP_KEEP 1 /* Keep these NOPS. */ #define NOP_DELETE 2 /* Delete these NOPS. */ -#define DO_COUNT true -#define DONT_COUNT false +#define DO_COUNT TRUE +#define DONT_COUNT FALSE /* A list of insns within a VLIW insn. */ struct vliw_insn_list @@ -469,7 +469,7 @@ int chain_num = 0; struct vliw_insn_list * frv_insert_vliw_insn (count) - boolean count; + bfd_boolean count; { struct vliw_insn_list *vliw_insn_list_entry; struct vliw_chain *vliw_chain_entry; @@ -631,7 +631,7 @@ frv_tomcat_shuffle (this_nop_type, vliw_to_split, insert_before_insn) struct vliw_insn_list *insert_before_insn; { - boolean pack_prev = false; + bfd_boolean pack_prev = FALSE; struct vliw_chain *return_me = NULL; struct vliw_insn_list *prev_insn = NULL; struct vliw_insn_list *curr_insn = vliw_to_split->insn_list; @@ -652,7 +652,7 @@ frv_tomcat_shuffle (this_nop_type, vliw_to_split, insert_before_insn) Then don't set pack bit later. */ if (curr_insn->type != VLIW_LABEL_TYPE) - pack_prev = true; + pack_prev = TRUE; prev_insn = curr_insn; curr_insn = curr_insn->next; } @@ -1182,11 +1182,11 @@ md_cgen_lookup_reloc (insn, operand, fixP) switch (operand->type) { case FRV_OPERAND_LABEL16: - fixP->fx_pcrel = true; + fixP->fx_pcrel = TRUE; return BFD_RELOC_FRV_LABEL16; case FRV_OPERAND_LABEL24: - fixP->fx_pcrel = true; + fixP->fx_pcrel = TRUE; return BFD_RELOC_FRV_LABEL24; case FRV_OPERAND_UHI16: @@ -1298,7 +1298,7 @@ md_atof (type, litP, sizeP) return 0; } -boolean +bfd_boolean frv_fix_adjustable (fixP) fixS * fixP; { diff --git a/gas/config/tc-frv.h b/gas/config/tc-frv.h index 843a9346bd..4d1d54c658 100644 --- a/gas/config/tc-frv.h +++ b/gas/config/tc-frv.h @@ -1,5 +1,5 @@ /* tc-frv.h -- Header file for tc-frv.c. - Copyright (C) 2002 Free Software Foundation, Inc. + Copyright 2002 Free Software Foundation, Inc. This file is part of GAS, the GNU Assembler. @@ -57,7 +57,7 @@ extern long frv_relax_frag PARAMS ((fragS *, long)); #define tc_fix_adjustable(FIX) frv_fix_adjustable (FIX) struct fix; -extern boolean frv_fix_adjustable PARAMS ((struct fix *)); +extern bfd_boolean frv_fix_adjustable PARAMS ((struct fix *)); /* When relaxing, we need to emit various relocs we otherwise wouldn't. */ #define TC_FORCE_RELOCATION(fix) frv_force_relocation (fix) diff --git a/gas/config/tc-hppa.c b/gas/config/tc-hppa.c index 4f617318b8..e19ac93e4e 100644 --- a/gas/config/tc-hppa.c +++ b/gas/config/tc-hppa.c @@ -3949,7 +3949,7 @@ pa_ip (str) failed: /* Check if the args matched. */ - if (match == FALSE) + if (!match) { if (&insn[1] - pa_opcodes < (int) NUMOPCODES && !strcmp (insn->name, insn[1].name)) @@ -4680,7 +4680,7 @@ pa_parse_number (s, is_float) symbolS *sym; int status; char *p = *s; - boolean have_prefix; + bfd_boolean have_prefix; /* Skip whitespace before the number. */ while (*p == ' ' || *p == '\t') @@ -4819,7 +4819,7 @@ pa_parse_number (s, is_float) num = S_GET_VALUE (sym); /* Well, we don't really have one, but we do have a register, so... */ - have_prefix = true; + have_prefix = TRUE; } else if (S_GET_SEGMENT (sym) == &bfd_abs_section) num = S_GET_VALUE (sym); diff --git a/gas/config/tc-i370.c b/gas/config/tc-i370.c index 5c4687176b..31d2f7a1fc 100644 --- a/gas/config/tc-i370.c +++ b/gas/config/tc-i370.c @@ -158,11 +158,11 @@ const pseudo_typeS md_pseudo_table[] = /* ***************************************************************** */ /* Whether to use user friendly register names. */ -#define TARGET_REG_NAMES_P true +#define TARGET_REG_NAMES_P TRUE -static boolean reg_names_p = TARGET_REG_NAMES_P; +static bfd_boolean reg_names_p = TARGET_REG_NAMES_P; -static boolean register_name PARAMS ((expressionS *)); +static bfd_boolean register_name PARAMS ((expressionS *)); static void i370_set_cpu PARAMS ((void)); static i370_insn_t i370_insert_operand PARAMS ((i370_insn_t insn, const struct i370_operand *operand, offsetT val)); @@ -323,7 +323,7 @@ reg_name_search (regs, regcount, name) * original state. */ -static boolean +static bfd_boolean register_name (expressionP) expressionS *expressionP; { @@ -338,7 +338,7 @@ register_name (expressionP) name = ++input_line_pointer; else if (!reg_names_p) - return false; + return FALSE; while (' ' == *name) name = ++input_line_pointer; @@ -367,12 +367,12 @@ register_name (expressionP) /* Make the rest nice. */ expressionP->X_add_symbol = NULL; expressionP->X_op_symbol = NULL; - return true; + return TRUE; } /* Reset the line as if we had not done anything. */ input_line_pointer = start; - return false; + return FALSE; } /* Local variables. */ @@ -479,10 +479,10 @@ md_parse_option (c, arg) i370_cpu = I370_OPCODE_370; else if (strcmp (arg, "regnames") == 0) - reg_names_p = true; + reg_names_p = TRUE; else if (strcmp (arg, "no-regnames") == 0) - reg_names_p = false; + reg_names_p = FALSE; #ifdef OBJ_ELF /* -mrelocatable/-mrelocatable-lib -- warn about initializations that require relocation */ @@ -572,7 +572,7 @@ md_begin () const struct i370_opcode *op_end; const struct i370_macro *macro; const struct i370_macro *macro_end; - boolean dup_insn = false; + bfd_boolean dup_insn = FALSE; i370_set_cpu (); @@ -598,7 +598,7 @@ md_begin () if (retval != (const char *) NULL) { as_bad ("Internal assembler error for instruction %s", op->name); - dup_insn = true; + dup_insn = TRUE; } } } @@ -617,7 +617,7 @@ md_begin () if (retval != (const char *) NULL) { as_bad ("Internal assembler error for macro %s", macro->name); - dup_insn = true; + dup_insn = TRUE; } } } @@ -1477,7 +1477,7 @@ symbol_locate (symbolP, name, segment, valu, frag) * register operands. For example, "BL .L33" branch low * to .L33 RX form insn frequently terminates for-loops, */ -static boolean +static bfd_boolean i370_addr_offset (expressionS *exx) { char *dot, *lab; @@ -1517,7 +1517,7 @@ i370_addr_offset (expressionS *exx) dot = strchr (input_line_pointer, '*'); if (!dot && !islabel) - return false; + return FALSE; /* replace * with . and let expr munch on it. */ if (dot) @@ -1539,7 +1539,7 @@ i370_addr_offset (expressionS *exx) if (dot) *dot = '*'; - return true; + return TRUE; } /* handle address constants of various sorts */ @@ -1550,7 +1550,7 @@ i370_addr_offset (expressionS *exx) * =F'1234' 32-bit const int * =H'1234' 16-bit const int */ -static boolean +static bfd_boolean i370_addr_cons (expressionS *exp) { char *name; @@ -1568,7 +1568,7 @@ i370_addr_cons (expressionS *exp) } else { - return false; + return FALSE; } switch (name[0]) { @@ -1686,17 +1686,17 @@ i370_addr_cons (expressionS *exp) if ((exp->X_op != O_constant) && (exp->X_op != O_big)) { as_bad ("expression not a constant"); - return false; + return FALSE; } add_to_lit_pool (exp, 0x0, cons_len); break; default: as_bad ("Unknown/unsupported address literal type"); - return false; + return FALSE; } - return true; + return TRUE; } diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index b17d39f8b8..fc1eeaf2a2 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -5146,7 +5146,7 @@ i386_validate_fix (fixp) } } -boolean +bfd_boolean i386_force_relocation (fixp) fixS *fixp; { diff --git a/gas/config/tc-i386.h b/gas/config/tc-i386.h index fc7de781dc..0a15fcd77d 100644 --- a/gas/config/tc-i386.h +++ b/gas/config/tc-i386.h @@ -483,7 +483,7 @@ extern int tc_i386_fix_adjustable PARAMS ((struct fix *)); #endif #define TC_FORCE_RELOCATION(FIX) i386_force_relocation (FIX) -extern boolean i386_force_relocation PARAMS ((struct fix *)); +extern bfd_boolean i386_force_relocation PARAMS ((struct fix *)); /* This expression evaluates to true if the relocation is for a local object for which we still want to do the relocation at runtime. diff --git a/gas/config/tc-m32r.c b/gas/config/tc-m32r.c index 6772b6e283..d236c950c2 100644 --- a/gas/config/tc-m32r.c +++ b/gas/config/tc-m32r.c @@ -687,7 +687,7 @@ can_make_parallel (a, b) || CGEN_FIELDS_BITSIZE (&b->fields) != 16) abort (); - if (first_writes_to_seconds_operands (a, b, true)) + if (first_writes_to_seconds_operands (a, b, TRUE)) return _("Instructions write to the same destination register."); a_pipe = CGEN_INSN_ATTR_VALUE (a->insn, CGEN_INSN_PIPE); @@ -929,11 +929,11 @@ assemble_two_insns (str, str2, parallel_p) if (parallel_p && warn_explicit_parallel_conflicts) { - if (first_writes_to_seconds_operands (&first, &second, false)) + if (first_writes_to_seconds_operands (&first, &second, FALSE)) /* xgettext:c-format */ as_warn (_("%s: output of 1st instruction is the same as an input to 2nd instruction - is this intentional ?"), str2); - if (first_writes_to_seconds_operands (&second, &first, false)) + if (first_writes_to_seconds_operands (&second, &first, FALSE)) /* xgettext:c-format */ as_warn (_("%s: output of 2nd instruction is the same as an input to 1st instruction - is this intentional ?"), str2); } @@ -1063,7 +1063,7 @@ md_assemble (str) else { int on_32bit_boundary_p; - int swap = false; + int swap = FALSE; if (CGEN_INSN_BITSIZE (insn.insn) != 16) abort (); @@ -1111,12 +1111,12 @@ md_assemble (str) && optimize && CGEN_INSN_ATTR_VALUE (insn.orig_insn, CGEN_INSN_RELAXABLE) == 0 && ! writes_to_pc (&prev_insn) - && ! first_writes_to_seconds_operands (&prev_insn, &insn, false)) + && ! first_writes_to_seconds_operands (&prev_insn, &insn, FALSE)) { if (can_make_parallel (&prev_insn, &insn) == NULL) make_parallel (insn.buffer); else if (can_make_parallel (&insn, &prev_insn) == NULL) - swap = true; + swap = TRUE; } expand_debug_syms (insn.debug_sym_link, 1); @@ -1909,7 +1909,7 @@ m32r_elf_section_change_hook () /* Return true if can adjust the reloc to be relative to its section (such as .data) instead of relative to some symbol. */ -boolean +bfd_boolean m32r_fix_adjustable (fixP) fixS *fixP; { diff --git a/gas/config/tc-m68hc11.c b/gas/config/tc-m68hc11.c index 254bf1eac0..38d45fe999 100644 --- a/gas/config/tc-m68hc11.c +++ b/gas/config/tc-m68hc11.c @@ -1373,7 +1373,7 @@ fixup8 (oper, mode, opmode) fixS *fixp; fixp = fix_new_exp (frag_now, f - frag_now->fr_literal, 1, - oper, true, BFD_RELOC_8_PCREL); + oper, TRUE, BFD_RELOC_8_PCREL); fixp->fx_pcrel_adjust = 1; } else @@ -1381,7 +1381,7 @@ fixup8 (oper, mode, opmode) /* Now create an 8-bit fixup. If there was some %hi or %lo modifier, generate the reloc accordingly. */ fix_new_exp (frag_now, f - frag_now->fr_literal, 1, - oper, false, + oper, FALSE, ((opmode & M6811_OP_HIGH_ADDR) ? BFD_RELOC_M68HC11_HI8 : ((opmode & M6811_OP_LOW_ADDR) @@ -1425,7 +1425,7 @@ fixup16 (oper, mode, opmode) /* Now create a 16-bit fixup. */ fixp = fix_new_exp (frag_now, f - frag_now->fr_literal, 2, oper, - (mode & M6812_OP_JUMP_REL16 ? true : false), + (mode & M6812_OP_JUMP_REL16 ? TRUE : FALSE), (mode & M6812_OP_JUMP_REL16 ? BFD_RELOC_16_PCREL : (mode & M6812_OP_PAGE) @@ -1467,7 +1467,7 @@ fixup24 (oper, mode, opmode) /* Now create a 24-bit fixup. */ fixp = fix_new_exp (frag_now, f - frag_now->fr_literal, 2, - oper, false, BFD_RELOC_M68HC11_24); + oper, FALSE, BFD_RELOC_M68HC11_24); number_to_chars_bigendian (f, 0, 3); } else @@ -1907,7 +1907,7 @@ build_indexed_byte (op, format, move_insn) f = frag_more (2); fix_new_exp (frag_now, f - frag_now->fr_literal, 2, - &op->exp, false, BFD_RELOC_16); + &op->exp, FALSE, BFD_RELOC_16); number_to_chars_bigendian (f, 0, 2); } else diff --git a/gas/config/tc-mcore.c b/gas/config/tc-mcore.c index 00e2648744..4e84d8d9d6 100644 --- a/gas/config/tc-mcore.c +++ b/gas/config/tc-mcore.c @@ -2390,7 +2390,7 @@ mcore_force_relocation (fix) /* Return true if the fix can be handled by GAS, false if it must be passed through to the linker. */ -boolean +bfd_boolean mcore_fix_adjustable (fixP) fixS * fixP; { diff --git a/gas/config/tc-mcore.h b/gas/config/tc-mcore.h index b41c2a66ee..f37988ac61 100644 --- a/gas/config/tc-mcore.h +++ b/gas/config/tc-mcore.h @@ -96,7 +96,7 @@ struct mcore_tc_sy extern int mcore_force_relocation PARAMS ((struct fix *)); #define tc_fix_adjustable(FIX) mcore_fix_adjustable (FIX) -extern boolean mcore_fix_adjustable PARAMS ((struct fix *)); +extern bfd_boolean mcore_fix_adjustable PARAMS ((struct fix *)); /* Values passed to md_apply_fix3 don't include the symbol value. */ #define MD_APPLY_SYM_VALUE(FIX) 0 diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index c17e70a81b..e5b9aa9d57 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -293,7 +293,7 @@ static int mips_32bitmode = 0; ) /* Return true if the given CPU supports the MDMX ASE. */ -#define CPU_HAS_MDMX(cpu) (false \ +#define CPU_HAS_MDMX(cpu) (FALSE \ ) /* True if CPU has a dror instruction. */ @@ -693,7 +693,7 @@ static int mips_relax_branch; It would be possible to generate a shorter sequence by losing the likely bit, generating something like: - + bne reg1, reg2, 0f nop j[al] label @@ -791,95 +791,149 @@ static int mips_relax_branch; enum mips_regclass { MIPS_GR_REG, MIPS_FP_REG, MIPS16_REG }; -static int insn_uses_reg PARAMS ((struct mips_cl_insn *ip, - unsigned int reg, enum mips_regclass class)); -static int reg_needs_delay PARAMS ((unsigned int)); -static void mips16_mark_labels PARAMS ((void)); -static void append_insn PARAMS ((char *place, - struct mips_cl_insn * ip, - expressionS * p, - bfd_reloc_code_real_type *r, - boolean)); -static void mips_no_prev_insn PARAMS ((int)); -static void mips_emit_delays PARAMS ((boolean)); +static int insn_uses_reg + PARAMS ((struct mips_cl_insn *ip, unsigned int reg, + enum mips_regclass class)); +static int reg_needs_delay + PARAMS ((unsigned int)); +static void mips16_mark_labels + PARAMS ((void)); +static void append_insn + PARAMS ((char *place, struct mips_cl_insn * ip, expressionS * p, + bfd_reloc_code_real_type *r, bfd_boolean)); +static void mips_no_prev_insn + PARAMS ((int)); +static void mips_emit_delays + PARAMS ((bfd_boolean)); #ifdef USE_STDARG -static void macro_build PARAMS ((char *place, int *counter, expressionS * ep, - const char *name, const char *fmt, - ...)); +static void macro_build + PARAMS ((char *place, int *counter, expressionS * ep, const char *name, + const char *fmt, ...)); #else static void macro_build (); #endif -static void mips16_macro_build PARAMS ((char *, int *, expressionS *, - const char *, const char *, - va_list)); -static void macro_build_jalr PARAMS ((int, expressionS *)); -static void macro_build_lui PARAMS ((char *place, int *counter, - expressionS * ep, int regnum)); -static void macro_build_ldst_constoffset PARAMS ((char *place, int *counter, - expressionS * ep, const char *op, - int valreg, int breg)); -static void set_at PARAMS ((int *counter, int reg, int unsignedp)); -static void check_absolute_expr PARAMS ((struct mips_cl_insn * ip, - expressionS *)); -static void load_register PARAMS ((int *, int, expressionS *, int)); -static void load_address PARAMS ((int *, int, expressionS *, int *)); -static void move_register PARAMS ((int *, int, int)); -static void macro PARAMS ((struct mips_cl_insn * ip)); -static void mips16_macro PARAMS ((struct mips_cl_insn * ip)); +static void mips16_macro_build + PARAMS ((char *, int *, expressionS *, const char *, const char *, va_list)); +static void macro_build_jalr + PARAMS ((int, expressionS *)); +static void macro_build_lui + PARAMS ((char *place, int *counter, expressionS * ep, int regnum)); +static void macro_build_ldst_constoffset + PARAMS ((char *place, int *counter, expressionS * ep, const char *op, + int valreg, int breg)); +static void set_at + PARAMS ((int *counter, int reg, int unsignedp)); +static void check_absolute_expr + PARAMS ((struct mips_cl_insn * ip, expressionS *)); +static void load_register + PARAMS ((int *, int, expressionS *, int)); +static void load_address + PARAMS ((int *, int, expressionS *, int *)); +static void move_register + PARAMS ((int *, int, int)); +static void macro + PARAMS ((struct mips_cl_insn * ip)); +static void mips16_macro + PARAMS ((struct mips_cl_insn * ip)); #ifdef LOSING_COMPILER -static void macro2 PARAMS ((struct mips_cl_insn * ip)); +static void macro2 + PARAMS ((struct mips_cl_insn * ip)); #endif -static void mips_ip PARAMS ((char *str, struct mips_cl_insn * ip)); -static void mips16_ip PARAMS ((char *str, struct mips_cl_insn * ip)); -static void mips16_immed PARAMS ((char *, unsigned int, int, offsetT, boolean, - boolean, boolean, unsigned long *, - boolean *, unsigned short *)); -static int my_getPercentOp PARAMS ((char **, unsigned int *, int *)); -static int my_getSmallParser PARAMS ((char **, unsigned int *, int *)); -static int my_getSmallExpression PARAMS ((expressionS *, char *)); -static void my_getExpression PARAMS ((expressionS *, char *)); +static void mips_ip + PARAMS ((char *str, struct mips_cl_insn * ip)); +static void mips16_ip + PARAMS ((char *str, struct mips_cl_insn * ip)); +static void mips16_immed + PARAMS ((char *, unsigned int, int, offsetT, bfd_boolean, bfd_boolean, + bfd_boolean, unsigned long *, bfd_boolean *, unsigned short *)); +static int my_getPercentOp + PARAMS ((char **, unsigned int *, int *)); +static int my_getSmallParser + PARAMS ((char **, unsigned int *, int *)); +static int my_getSmallExpression + PARAMS ((expressionS *, char *)); +static void my_getExpression + PARAMS ((expressionS *, char *)); #ifdef OBJ_ELF -static int support_64bit_objects PARAMS((void)); +static int support_64bit_objects + PARAMS((void)); #endif -static void mips_set_option_string PARAMS ((const char **, const char *)); -static symbolS *get_symbol PARAMS ((void)); -static void mips_align PARAMS ((int to, int fill, symbolS *label)); -static void s_align PARAMS ((int)); -static void s_change_sec PARAMS ((int)); -static void s_change_section PARAMS ((int)); -static void s_cons PARAMS ((int)); -static void s_float_cons PARAMS ((int)); -static void s_mips_globl PARAMS ((int)); -static void s_option PARAMS ((int)); -static void s_mipsset PARAMS ((int)); -static void s_abicalls PARAMS ((int)); -static void s_cpload PARAMS ((int)); -static void s_cpsetup PARAMS ((int)); -static void s_cplocal PARAMS ((int)); -static void s_cprestore PARAMS ((int)); -static void s_cpreturn PARAMS ((int)); -static void s_gpvalue PARAMS ((int)); -static void s_gpword PARAMS ((int)); -static void s_gpdword PARAMS ((int)); -static void s_cpadd PARAMS ((int)); -static void s_insn PARAMS ((int)); -static void md_obj_begin PARAMS ((void)); -static void md_obj_end PARAMS ((void)); -static long get_number PARAMS ((void)); -static void s_mips_ent PARAMS ((int)); -static void s_mips_end PARAMS ((int)); -static void s_mips_frame PARAMS ((int)); -static void s_mips_mask PARAMS ((int)); -static void s_mips_stab PARAMS ((int)); -static void s_mips_weakext PARAMS ((int)); -static void s_mips_file PARAMS ((int)); -static void s_mips_loc PARAMS ((int)); -static int mips16_extended_frag PARAMS ((fragS *, asection *, long)); +static void mips_set_option_string + PARAMS ((const char **, const char *)); +static symbolS *get_symbol + PARAMS ((void)); +static void mips_align + PARAMS ((int to, int fill, symbolS *label)); +static void s_align + PARAMS ((int)); +static void s_change_sec + PARAMS ((int)); +static void s_change_section + PARAMS ((int)); +static void s_cons + PARAMS ((int)); +static void s_float_cons + PARAMS ((int)); +static void s_mips_globl + PARAMS ((int)); +static void s_option + PARAMS ((int)); +static void s_mipsset + PARAMS ((int)); +static void s_abicalls + PARAMS ((int)); +static void s_cpload + PARAMS ((int)); +static void s_cpsetup + PARAMS ((int)); +static void s_cplocal + PARAMS ((int)); +static void s_cprestore + PARAMS ((int)); +static void s_cpreturn + PARAMS ((int)); +static void s_gpvalue + PARAMS ((int)); +static void s_gpword + PARAMS ((int)); +static void s_gpdword + PARAMS ((int)); +static void s_cpadd + PARAMS ((int)); +static void s_insn + PARAMS ((int)); +static void md_obj_begin + PARAMS ((void)); +static void md_obj_end + PARAMS ((void)); +static long get_number + PARAMS ((void)); +static void s_mips_ent + PARAMS ((int)); +static void s_mips_end + PARAMS ((int)); +static void s_mips_frame + PARAMS ((int)); +static void s_mips_mask + PARAMS ((int)); +static void s_mips_stab + PARAMS ((int)); +static void s_mips_weakext + PARAMS ((int)); +static void s_mips_file + PARAMS ((int)); +static void s_mips_loc + PARAMS ((int)); +static int mips16_extended_frag + PARAMS ((fragS *, asection *, long)); static int relaxed_branch_length (fragS *, asection *, int); -static int validate_mips_insn PARAMS ((const struct mips_opcode *)); -static void show PARAMS ((FILE *, const char *, int *, int *)); +static int validate_mips_insn + PARAMS ((const struct mips_opcode *)); +static void show + PARAMS ((FILE *, const char *, int *, int *)); #ifdef OBJ_ELF -static int mips_need_elf_addend_fixup PARAMS ((fixS *)); +static int mips_need_elf_addend_fixup + PARAMS ((fixS *)); #endif /* Return values of my_getSmallExpression(). */ @@ -919,14 +973,18 @@ struct mips_cpu_info int cpu; /* CPU number (default CPU if ISA). */ }; -static void mips_set_architecture PARAMS ((const struct mips_cpu_info *)); -static void mips_set_tune PARAMS ((const struct mips_cpu_info *)); -static boolean mips_strict_matching_cpu_name_p PARAMS ((const char *, - const char *)); -static boolean mips_matching_cpu_name_p PARAMS ((const char *, const char *)); -static const struct mips_cpu_info *mips_parse_cpu PARAMS ((const char *, - const char *)); -static const struct mips_cpu_info *mips_cpu_info_from_isa PARAMS ((int)); +static void mips_set_architecture + PARAMS ((const struct mips_cpu_info *)); +static void mips_set_tune + PARAMS ((const struct mips_cpu_info *)); +static bfd_boolean mips_strict_matching_cpu_name_p + PARAMS ((const char *, const char *)); +static bfd_boolean mips_matching_cpu_name_p + PARAMS ((const char *, const char *)); +static const struct mips_cpu_info *mips_parse_cpu + PARAMS ((const char *, const char *)); +static const struct mips_cpu_info *mips_cpu_info_from_isa + PARAMS ((int)); /* Pseudo-op table. @@ -1070,11 +1128,11 @@ static bfd_reloc_code_real_type offset_reloc[3] /* This is set by mips_ip if imm_reloc is an unmatched HI16_S reloc. */ -static boolean imm_unmatched_hi; +static bfd_boolean imm_unmatched_hi; /* These are set by mips16_ip if an explicit extension is used. */ -static boolean mips16_small, mips16_ext; +static bfd_boolean mips16_small, mips16_ext; #ifdef OBJ_ELF /* The pdr segment for per procedure frame/regmask info. Not used for @@ -1237,7 +1295,7 @@ md_begin () &zero_address_frag)); } - mips_no_prev_insn (false); + mips_no_prev_insn (FALSE); mips_gprmask = 0; mips_cprmask[0] = 0; @@ -1362,7 +1420,7 @@ md_assemble (str) = {BFD_RELOC_UNUSED, BFD_RELOC_UNUSED, BFD_RELOC_UNUSED}; imm_expr.X_op = O_absent; - imm_unmatched_hi = false; + imm_unmatched_hi = FALSE; offset_expr.X_op = O_absent; imm_reloc[0] = BFD_RELOC_UNUSED; imm_reloc[1] = BFD_RELOC_UNUSED; @@ -1398,9 +1456,9 @@ md_assemble (str) if (imm_expr.X_op != O_absent) append_insn (NULL, &insn, &imm_expr, imm_reloc, imm_unmatched_hi); else if (offset_expr.X_op != O_absent) - append_insn (NULL, &insn, &offset_expr, offset_reloc, false); + append_insn (NULL, &insn, &offset_expr, offset_reloc, FALSE); else - append_insn (NULL, &insn, NULL, unused_reloc, false); + append_insn (NULL, &insn, NULL, unused_reloc, FALSE); } } @@ -1553,7 +1611,7 @@ append_insn (place, ip, address_expr, reloc_type, unmatched_hi) struct mips_cl_insn *ip; expressionS *address_expr; bfd_reloc_code_real_type *reloc_type; - boolean unmatched_hi; + bfd_boolean unmatched_hi; { register unsigned long prev_pinfo, pinfo; char *f; @@ -2138,7 +2196,7 @@ append_insn (place, ip, address_expr, reloc_type, unmatched_hi) address_expr->X_add_number = 0; fixp[1] = fix_new_exp (frag_now, f - frag_now->fr_literal, - 4, address_expr, false, + 4, address_expr, FALSE, reloc_type[1]); /* These relocations can have an addend that won't fit in @@ -2170,7 +2228,7 @@ append_insn (place, ip, address_expr, reloc_type, unmatched_hi) fixp[2] = fix_new_exp (frag_now, f - frag_now->fr_literal, 4, - address_expr, false, + address_expr, FALSE, reloc_type[2]); /* These relocations can have an addend that won't fit in @@ -2726,7 +2784,7 @@ mips_no_prev_insn (preserve) static void mips_emit_delays (insns) - boolean insns; + bfd_boolean insns; { if (! mips_opts.noreorder) { @@ -2916,7 +2974,7 @@ macro_build (place, counter, ep, name, fmt, va_alist) /* Search until we get a match for NAME. */ while (1) { - /* It is assumed here that macros will never generate + /* It is assumed here that macros will never generate MDMX or MIPS-3D instructions. */ if (strcmp (fmt, insn.insn_mo->args) == 0 && insn.insn_mo->pinfo != INSN_MACRO @@ -3082,7 +3140,7 @@ macro_build (place, counter, ep, name, fmt, va_alist) va_end (args); assert (*r == BFD_RELOC_UNUSED ? ep == NULL : ep != NULL); - append_insn (place, &insn, ep, r, false); + append_insn (place, &insn, ep, r, FALSE); } static void @@ -3111,7 +3169,7 @@ mips16_macro_build (place, counter, ep, name, fmt, args) } insn.insn_opcode = insn.insn_mo->match; - insn.use_extend = false; + insn.use_extend = FALSE; for (;;) { @@ -3189,8 +3247,8 @@ mips16_macro_build (place, counter, ep, name, fmt, args) *r = (int) BFD_RELOC_UNUSED + c; else { - mips16_immed (NULL, 0, c, ep->X_add_number, false, false, - false, &insn.insn_opcode, &insn.use_extend, + mips16_immed (NULL, 0, c, ep->X_add_number, FALSE, FALSE, + FALSE, &insn.insn_opcode, &insn.use_extend, &insn.extend); ep = NULL; *r = BFD_RELOC_UNUSED; @@ -3208,7 +3266,7 @@ mips16_macro_build (place, counter, ep, name, fmt, args) assert (*r == BFD_RELOC_UNUSED ? ep == NULL : ep != NULL); - append_insn (place, &insn, ep, r, false); + append_insn (place, &insn, ep, r, FALSE); } /* @@ -3221,7 +3279,7 @@ macro_build_jalr (icnt, ep) expressionS *ep; { char *f; - + if (HAVE_NEWABI) { frag_grow (4); @@ -3231,7 +3289,7 @@ macro_build_jalr (icnt, ep) RA, PIC_CALL_REG); if (HAVE_NEWABI) fix_new_exp (frag_now, f - frag_now->fr_literal, - 0, ep, false, BFD_RELOC_MIPS_JALR); + 0, ep, FALSE, BFD_RELOC_MIPS_JALR); } /* @@ -3298,10 +3356,10 @@ macro_build_lui (place, counter, ep, regnum) if (*r == BFD_RELOC_UNUSED) { insn.insn_opcode |= high_expr.X_add_number; - append_insn (place, &insn, NULL, r, false); + append_insn (place, &insn, NULL, r, FALSE); } else - append_insn (place, &insn, &high_expr, r, false); + append_insn (place, &insn, &high_expr, r, FALSE); } /* Generate a sequence of instructions to do a load or store from a constant @@ -4054,7 +4112,7 @@ macro (ip) sub v0,$zero,$a0 */ - mips_emit_delays (true); + mips_emit_delays (TRUE); ++mips_opts.noreorder; mips_any_noreorder = 1; @@ -4518,7 +4576,7 @@ macro (ip) return; } - mips_emit_delays (true); + mips_emit_delays (TRUE); ++mips_opts.noreorder; mips_any_noreorder = 1; if (mips_trap) @@ -4673,7 +4731,7 @@ macro (ip) s = "ddivu"; s2 = "mfhi"; do_divu3: - mips_emit_delays (true); + mips_emit_delays (TRUE); ++mips_opts.noreorder; mips_any_noreorder = 1; if (mips_trap) @@ -6827,7 +6885,7 @@ macro2 (ip) dbl = 1; case M_MULO: do_mulo: - mips_emit_delays (true); + mips_emit_delays (TRUE); ++mips_opts.noreorder; mips_any_noreorder = 1; if (imm) @@ -6867,7 +6925,7 @@ macro2 (ip) dbl = 1; case M_MULOU: do_mulou: - mips_emit_delays (true); + mips_emit_delays (TRUE); ++mips_opts.noreorder; mips_any_noreorder = 1; if (imm) @@ -7376,7 +7434,7 @@ macro2 (ip) * Is the double cfc1 instruction a bug in the mips assembler; * or is there a reason for it? */ - mips_emit_delays (true); + mips_emit_delays (TRUE); ++mips_opts.noreorder; mips_any_noreorder = 1; macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "cfc1", "t,G", @@ -7660,7 +7718,7 @@ mips16_macro (ip) case M_REM_3: s = "mfhi"; do_div3: - mips_emit_delays (true); + mips_emit_delays (TRUE); ++mips_opts.noreorder; mips_any_noreorder = 1; macro_build ((char *) NULL, &icnt, (expressionS *) NULL, @@ -7695,7 +7753,7 @@ mips16_macro (ip) s = "ddivu"; s2 = "mfhi"; do_divu3: - mips_emit_delays (true); + mips_emit_delays (TRUE); ++mips_opts.noreorder; mips_any_noreorder = 1; macro_build ((char *) NULL, &icnt, (expressionS *) NULL, s, "0,x,y", @@ -8034,7 +8092,7 @@ mips_ip (str, ip) argsStart = s; for (;;) { - boolean ok; + bfd_boolean ok; assert (strcmp (insn->name, str) == 0); @@ -8044,14 +8102,14 @@ mips_ip (str, ip) | (mips_opts.ase_mdmx ? INSN_MDMX : 0) | (mips_opts.ase_mips3d ? INSN_MIPS3D : 0)), mips_arch)) - ok = true; + ok = TRUE; else - ok = false; + ok = FALSE; if (insn->pinfo != INSN_MACRO) { if (mips_arch == CPU_R4650 && (insn->pinfo & FP_D) != 0) - ok = false; + ok = FALSE; } if (! ok) @@ -8843,7 +8901,7 @@ mips_ip (str, ip) if (c == S_EX_HI) { *imm_reloc = BFD_RELOC_HI16_S; - imm_unmatched_hi = true; + imm_unmatched_hi = TRUE; } #ifdef OBJ_ELF else if (c == S_EX_HIGHEST) @@ -8973,7 +9031,7 @@ mips_ip (str, ip) if (c == S_EX_HI) { *imm_reloc = BFD_RELOC_HI16_S; - imm_unmatched_hi = true; + imm_unmatched_hi = TRUE; } #ifdef OBJ_ELF else if (c == S_EX_HIGHEST) @@ -9139,8 +9197,8 @@ mips16_ip (str, ip) insn_error = NULL; - mips16_small = false; - mips16_ext = false; + mips16_small = FALSE; + mips16_ext = FALSE; for (s = str; ISLOWER (*s); ++s) ; @@ -9157,14 +9215,14 @@ mips16_ip (str, ip) if (s[1] == 't' && s[2] == ' ') { *s = '\0'; - mips16_small = true; + mips16_small = TRUE; s += 3; break; } else if (s[1] == 'e' && s[2] == ' ') { *s = '\0'; - mips16_ext = true; + mips16_ext = TRUE; s += 3; break; } @@ -9175,7 +9233,7 @@ mips16_ip (str, ip) } if (mips_opts.noautoextend && ! mips16_ext) - mips16_small = true; + mips16_small = TRUE; if ((insn = (struct mips_opcode *) hash_find (mips16_op_hash, str)) == NULL) { @@ -9190,7 +9248,7 @@ mips16_ip (str, ip) ip->insn_mo = insn; ip->insn_opcode = insn->match; - ip->use_extend = false; + ip->use_extend = FALSE; imm_expr.X_op = O_absent; imm_reloc[0] = BFD_RELOC_UNUSED; imm_reloc[1] = BFD_RELOC_UNUSED; @@ -9222,7 +9280,7 @@ mips16_ip (str, ip) && insn->pinfo != INSN_MACRO) { mips16_immed (NULL, 0, *imm_reloc - BFD_RELOC_UNUSED, - imm_expr.X_add_number, true, mips16_small, + imm_expr.X_add_number, TRUE, mips16_small, mips16_ext, &ip->insn_opcode, &ip->use_extend, &ip->extend); imm_expr.X_op = O_absent; @@ -9460,10 +9518,10 @@ mips16_ip (str, ip) my_getExpression (&imm_expr, s + sizeof "%gprel" - 1); if (imm_expr.X_op == O_symbol) { - mips16_ext = true; + mips16_ext = TRUE; *imm_reloc = BFD_RELOC_MIPS16_GPREL; s = expr_end; - ip->use_extend = true; + ip->use_extend = TRUE; ip->extend = 0; continue; } @@ -9739,16 +9797,16 @@ mips16_immed (file, line, type, val, warn, small, ext, insn, use_extend, unsigned int line; int type; offsetT val; - boolean warn; - boolean small; - boolean ext; + bfd_boolean warn; + bfd_boolean small; + bfd_boolean ext; unsigned long *insn; - boolean *use_extend; + bfd_boolean *use_extend; unsigned short *extend; { register const struct mips16_immed_operand *op; int mintiny, maxtiny; - boolean needext; + bfd_boolean needext; op = mips16_immed_operands; while (op->type != type) @@ -9783,9 +9841,9 @@ mips16_immed (file, line, type, val, warn, small, ext, insn, use_extend, if ((val & ((1 << op->shift) - 1)) != 0 || val < (mintiny << op->shift) || val > (maxtiny << op->shift)) - needext = true; + needext = TRUE; else - needext = false; + needext = FALSE; if (warn && ext && ! needext) as_warn_where (file, line, @@ -9797,7 +9855,7 @@ mips16_immed (file, line, type, val, warn, small, ext, insn, use_extend, { int insnval; - *use_extend = false; + *use_extend = FALSE; insnval = ((val >> op->shift) & ((1 << op->nbits) - 1)); insnval <<= op->op_shift; *insn |= insnval; @@ -9821,7 +9879,7 @@ mips16_immed (file, line, type, val, warn, small, ext, insn, use_extend, as_bad_where (file, line, _("operand value out of range for instruction")); - *use_extend = true; + *use_extend = TRUE; if (op->extbits == 16) { extval = ((val >> 11) & 0x1f) | (val & 0x7e0); @@ -10445,12 +10503,12 @@ md_parse_option (c, arg) case OPTION_MIPS16: mips_opts.mips16 = 1; - mips_no_prev_insn (false); + mips_no_prev_insn (FALSE); break; case OPTION_NO_MIPS16: mips_opts.mips16 = 0; - mips_no_prev_insn (false); + mips_no_prev_insn (FALSE); break; case OPTION_MIPS3D: @@ -10619,20 +10677,20 @@ md_parse_option (c, arg) #endif /* OBJ_ELF */ case OPTION_M7000_HILO_FIX: - mips_7000_hilo_fix = true; + mips_7000_hilo_fix = TRUE; break; case OPTION_MNO_7000_HILO_FIX: - mips_7000_hilo_fix = false; + mips_7000_hilo_fix = FALSE; break; #ifdef OBJ_ELF case OPTION_MDEBUG: - mips_flag_mdebug = true; + mips_flag_mdebug = TRUE; break; case OPTION_NO_MDEBUG: - mips_flag_mdebug = false; + mips_flag_mdebug = FALSE; break; #endif /* OBJ_ELF */ @@ -11053,10 +11111,10 @@ md_apply_fix3 (fixP, valP, seg) /* In this case, the bfd_install_relocation routine will incorrectly add the symbol value back in. We just want the addend to appear in the object file. - + howto->pcrel_offset is added for R_MIPS_PC16, which is generated for code like - + globl g1 .text .text .space 20 @@ -11480,7 +11538,7 @@ mips_align (to, fill, label) int fill; symbolS *label; { - mips_emit_delays (false); + mips_emit_delays (FALSE); frag_align (to, fill, 0); record_alignment (now_seg, to); if (label != NULL) @@ -11546,7 +11604,7 @@ s_align (x) void mips_flush_pending_output () { - mips_emit_delays (false); + mips_emit_delays (FALSE); mips_clear_insn_labels (); } @@ -11573,7 +11631,7 @@ s_change_sec (sec) obj_elf_section_change_hook (); #endif - mips_emit_delays (false); + mips_emit_delays (FALSE); switch (sec) { case 't': @@ -11638,7 +11696,7 @@ s_change_sec (sec) auto_align = 1; } - + void s_change_section (ignore) int ignore ATTRIBUTE_UNUSED; @@ -11651,7 +11709,7 @@ s_change_section (ignore) int section_flag; int section_entry_size; int section_alignment; - + if (OUTPUT_FLAVOR != bfd_target_elf_flavour) return; @@ -11712,7 +11770,7 @@ s_cons (log_size) symbolS *label; label = insn_labels != NULL ? insn_labels->label : NULL; - mips_emit_delays (false); + mips_emit_delays (FALSE); if (log_size > 0 && auto_align) mips_align (log_size, 0, label); mips_clear_insn_labels (); @@ -11727,7 +11785,7 @@ s_float_cons (type) label = insn_labels != NULL ? insn_labels->label : NULL; - mips_emit_delays (false); + mips_emit_delays (FALSE); if (auto_align) { @@ -11868,7 +11926,7 @@ s_mipsset (x) } else if (strcmp (name, "noreorder") == 0) { - mips_emit_delays (true); + mips_emit_delays (TRUE); mips_opts.noreorder = 1; mips_any_noreorder = 1; } @@ -11989,7 +12047,7 @@ s_mipsset (x) /* If we're changing the reorder mode we need to handle delay slots correctly. */ if (s->options.noreorder && ! mips_opts.noreorder) - mips_emit_delays (true); + mips_emit_delays (TRUE); else if (! s->options.noreorder && mips_opts.noreorder) { if (prev_nop_frag != NULL) @@ -12310,7 +12368,7 @@ s_gpword (ignore) } label = insn_labels != NULL ? insn_labels->label : NULL; - mips_emit_delays (true); + mips_emit_delays (TRUE); if (auto_align) mips_align (2, 0, label); mips_clear_insn_labels (); @@ -12325,7 +12383,7 @@ s_gpword (ignore) p = frag_more (4); md_number_to_chars (p, (valueT) 0, 4); - fix_new_exp (frag_now, p - frag_now->fr_literal, 4, &ex, false, + fix_new_exp (frag_now, p - frag_now->fr_literal, 4, &ex, FALSE, BFD_RELOC_GPREL32); demand_empty_rest_of_line (); @@ -12347,7 +12405,7 @@ s_gpdword (ignore) } label = insn_labels != NULL ? insn_labels->label : NULL; - mips_emit_delays (true); + mips_emit_delays (TRUE); if (auto_align) mips_align (3, 0, label); mips_clear_insn_labels (); @@ -12362,14 +12420,14 @@ s_gpdword (ignore) p = frag_more (8); md_number_to_chars (p, (valueT) 0, 8); - fix_new_exp (frag_now, p - frag_now->fr_literal, 8, &ex, false, + fix_new_exp (frag_now, p - frag_now->fr_literal, 8, &ex, FALSE, BFD_RELOC_GPREL32); /* GPREL32 composed with 64 gives a 64-bit GP offset. */ ex.X_op = O_absent; ex.X_add_symbol = 0; ex.X_add_number = 0; - fix_new_exp (frag_now, p - frag_now->fr_literal, 8, &ex, false, + fix_new_exp (frag_now, p - frag_now->fr_literal, 8, &ex, FALSE, BFD_RELOC_64); demand_empty_rest_of_line (); @@ -12873,7 +12931,7 @@ relaxed_branch_length (fragp, sec, update) asection *sec; int update; { - boolean toofar; + bfd_boolean toofar; int length; if (fragp @@ -12895,9 +12953,9 @@ relaxed_branch_length (fragp, sec, update) /* If the symbol is not defined or it's in a different segment, assume the user knows what's going on and emit a short branch. */ - toofar = false; + toofar = FALSE; else - toofar = true; + toofar = TRUE; if (fragp && update && toofar != RELAX_BRANCH_TOOFAR (fragp->fr_subtype)) fragp->fr_subtype @@ -12926,7 +12984,7 @@ relaxed_branch_length (fragp, sec, update) if (fragp ? !RELAX_BRANCH_UNCOND (fragp->fr_subtype) : (update >= 0)) length += 8; } - + return length; } @@ -12941,13 +12999,13 @@ md_estimate_size_before_relax (fragp, segtype) asection *segtype; { int change = 0; - boolean linkonce = false; + bfd_boolean linkonce = FALSE; if (RELAX_BRANCH_P (fragp->fr_subtype)) { - fragp->fr_var = relaxed_branch_length (fragp, segtype, false); - + fragp->fr_var = relaxed_branch_length (fragp, segtype, FALSE); + return fragp->fr_var; } @@ -12987,14 +13045,14 @@ md_estimate_size_before_relax (fragp, segtype) { if ((bfd_get_section_flags (stdoutput, symsec) & SEC_LINK_ONCE) != 0) - linkonce = true; + linkonce = TRUE; /* The GNU toolchain uses an extension for ELF: a section beginning with the magic string .gnu.linkonce is a linkonce section. */ if (strncmp (segment_name (symsec), ".gnu.linkonce", sizeof ".gnu.linkonce" - 1) == 0) - linkonce = true; + linkonce = TRUE; } /* This must duplicate the test in adjust_reloc_syms. */ @@ -13333,8 +13391,8 @@ mips_relax_frag (sec, fragp, stretch) if (RELAX_BRANCH_P (fragp->fr_subtype)) { offsetT old_var = fragp->fr_var; - - fragp->fr_var = relaxed_branch_length (fragp, sec, true); + + fragp->fr_var = relaxed_branch_length (fragp, sec, TRUE); return fragp->fr_var - old_var; } @@ -13377,14 +13435,14 @@ md_convert_frag (abfd, asec, fragp) unsigned long insn; expressionS exp; fixS *fixp; - + buf = (bfd_byte *)fragp->fr_literal + fragp->fr_fix; if (target_big_endian) insn = bfd_getb32 (buf); else insn = bfd_getl32 (buf); - + if (!RELAX_BRANCH_TOOFAR (fragp->fr_subtype)) { /* We generate a fixup instead of applying it right now @@ -13401,7 +13459,7 @@ md_convert_frag (abfd, asec, fragp) : BFD_RELOC_16_PCREL); fixp->fx_file = fragp->fr_file; fixp->fx_line = fragp->fr_line; - + md_number_to_chars ((char *)buf, insn, 4); buf += 4; } @@ -13434,7 +13492,7 @@ md_convert_frag (abfd, asec, fragp) assert ((insn & 0xfc0e0000) == 0x04000000); insn ^= 0x00010000; break; - + case 1: /* beq 0x10000000 bne 0x14000000 blez 0x18000000 bgtz 0x1c000000 */ @@ -13471,7 +13529,7 @@ md_convert_frag (abfd, asec, fragp) /* Convert to instruction count. */ i >>= 2; /* Branch counts from the next instruction. */ - i--; + i--; insn |= i; /* Branch over the jump. */ md_number_to_chars ((char *)buf, insn, 4); @@ -13543,7 +13601,7 @@ md_convert_frag (abfd, asec, fragp) md_number_to_chars ((char*)buf, insn, 4); buf += 4; - + if (mips_opts.isa == ISA_MIPS1) { /* nop */ @@ -13558,7 +13616,7 @@ md_convert_frag (abfd, asec, fragp) 4, &exp, 0, BFD_RELOC_LO16); fixp->fx_file = fragp->fr_file; fixp->fx_line = fragp->fr_line; - + md_number_to_chars ((char*)buf, insn, 4); buf += 4; @@ -13585,11 +13643,11 @@ md_convert_frag (abfd, asec, fragp) { int type; register const struct mips16_immed_operand *op; - boolean small, ext; + bfd_boolean small, ext; offsetT val; bfd_byte *buf; unsigned long insn; - boolean use_extend; + bfd_boolean use_extend; unsigned short extend; type = RELAX_MIPS16_TYPE (fragp->fr_subtype); @@ -13599,13 +13657,13 @@ md_convert_frag (abfd, asec, fragp) if (RELAX_MIPS16_EXTENDED (fragp->fr_subtype)) { - small = false; - ext = true; + small = FALSE; + ext = TRUE; } else { - small = true; - ext = false; + small = TRUE; + ext = FALSE; } resolve_symbol_value (fragp->fr_symbol); @@ -14326,7 +14384,7 @@ static const struct mips_cpu_info mips_cpu_info_table[] = Note: this function is shared between GCC and GAS. */ -static boolean +static bfd_boolean mips_strict_matching_cpu_name_p (canonical, given) const char *canonical, *given; { @@ -14343,21 +14401,21 @@ mips_strict_matching_cpu_name_p (canonical, given) Note: this function is shared between GCC and GAS. */ -static boolean +static bfd_boolean mips_matching_cpu_name_p (canonical, given) const char *canonical, *given; { /* First see if the name matches exactly, or with a final "000" turned into "k". */ if (mips_strict_matching_cpu_name_p (canonical, given)) - return true; + return TRUE; /* If not, try comparing based on numerical designation alone. See if GIVEN is an unadorned number, or 'r' followed by a number. */ if (TOLOWER (*given) == 'r') given++; if (!ISDIGIT (*given)) - return false; + return FALSE; /* Skip over some well-known prefixes in the canonical name, hoping to find a number there too. */ diff --git a/gas/config/tc-mips.h b/gas/config/tc-mips.h index 2c0f3fac18..dd52a7f418 100644 --- a/gas/config/tc-mips.h +++ b/gas/config/tc-mips.h @@ -97,7 +97,7 @@ struct mips_cl_insn unsigned long insn_opcode; const struct mips_opcode *insn_mo; /* The next two fields are used when generating mips16 code. */ - boolean use_extend; + bfd_boolean use_extend; unsigned short extend; }; diff --git a/gas/config/tc-mn10200.c b/gas/config/tc-mn10200.c index ff30fecc99..5c27dc063e 100644 --- a/gas/config/tc-mn10200.c +++ b/gas/config/tc-mn10200.c @@ -1,5 +1,5 @@ /* tc-mn10200.c -- Assembler code for the Matsushita 10200 - Copyright 1996, 1997, 1998, 1999, 2000, 2001 + Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc. This file is part of GAS, the GNU Assembler. @@ -81,9 +81,9 @@ static unsigned long check_operand PARAMS ((unsigned long, const struct mn10200_operand *, offsetT)); static int reg_name_search PARAMS ((const struct reg_name *, int, const char *)); -static boolean data_register_name PARAMS ((expressionS *expressionP)); -static boolean address_register_name PARAMS ((expressionS *expressionP)); -static boolean other_register_name PARAMS ((expressionS *expressionP)); +static bfd_boolean data_register_name PARAMS ((expressionS *expressionP)); +static bfd_boolean address_register_name PARAMS ((expressionS *expressionP)); +static bfd_boolean other_register_name PARAMS ((expressionS *expressionP)); /* Fixups. */ #define MAX_INSN_FIXUPS (5) @@ -182,7 +182,7 @@ reg_name_search (regs, regcount, name) * its original state. */ -static boolean +static bfd_boolean data_register_name (expressionP) expressionS *expressionP; { @@ -210,12 +210,12 @@ data_register_name (expressionP) expressionP->X_add_symbol = NULL; expressionP->X_op_symbol = NULL; - return true; + return TRUE; } /* Reset the line as if we had not done anything. */ input_line_pointer = start; - return false; + return FALSE; } /* Summary of register_name(). @@ -229,7 +229,7 @@ data_register_name (expressionP) * its original state. */ -static boolean +static bfd_boolean address_register_name (expressionP) expressionS *expressionP; { @@ -257,12 +257,12 @@ address_register_name (expressionP) expressionP->X_add_symbol = NULL; expressionP->X_op_symbol = NULL; - return true; + return TRUE; } /* Reset the line as if we had not done anything. */ input_line_pointer = start; - return false; + return FALSE; } /* Summary of register_name(). @@ -276,7 +276,7 @@ address_register_name (expressionP) * its original state. */ -static boolean +static bfd_boolean other_register_name (expressionP) expressionS *expressionP; { @@ -304,12 +304,12 @@ other_register_name (expressionP) expressionP->X_add_symbol = NULL; expressionP->X_op_symbol = NULL; - return true; + return TRUE; } /* Reset the line as if we had not done anything. */ input_line_pointer = start; - return false; + return FALSE; } void diff --git a/gas/config/tc-mn10300.c b/gas/config/tc-mn10300.c index 012932b41f..6749460e73 100644 --- a/gas/config/tc-mn10300.c +++ b/gas/config/tc-mn10300.c @@ -89,9 +89,9 @@ static unsigned long check_operand PARAMS ((unsigned long, const struct mn10300_operand *, offsetT)); static int reg_name_search PARAMS ((const struct reg_name *, int, const char *)); -static boolean data_register_name PARAMS ((expressionS *expressionP)); -static boolean address_register_name PARAMS ((expressionS *expressionP)); -static boolean other_register_name PARAMS ((expressionS *expressionP)); +static bfd_boolean data_register_name PARAMS ((expressionS *expressionP)); +static bfd_boolean address_register_name PARAMS ((expressionS *expressionP)); +static bfd_boolean other_register_name PARAMS ((expressionS *expressionP)); static void set_arch_mach PARAMS ((unsigned int)); /* Set linkrelax here to avoid fixups in most sections. */ @@ -293,7 +293,7 @@ reg_name_search (regs, regcount, name) * its original state. */ -static boolean +static bfd_boolean r_register_name (expressionP) expressionS *expressionP; { @@ -321,12 +321,12 @@ r_register_name (expressionP) expressionP->X_add_symbol = NULL; expressionP->X_op_symbol = NULL; - return true; + return TRUE; } /* Reset the line as if we had not done anything. */ input_line_pointer = start; - return false; + return FALSE; } /* Summary of register_name(). @@ -340,7 +340,7 @@ r_register_name (expressionP) * its original state. */ -static boolean +static bfd_boolean xr_register_name (expressionP) expressionS *expressionP; { @@ -368,12 +368,12 @@ xr_register_name (expressionP) expressionP->X_add_symbol = NULL; expressionP->X_op_symbol = NULL; - return true; + return TRUE; } /* Reset the line as if we had not done anything. */ input_line_pointer = start; - return false; + return FALSE; } /* Summary of register_name(). @@ -387,7 +387,7 @@ xr_register_name (expressionP) * its original state. */ -static boolean +static bfd_boolean data_register_name (expressionP) expressionS *expressionP; { @@ -415,12 +415,12 @@ data_register_name (expressionP) expressionP->X_add_symbol = NULL; expressionP->X_op_symbol = NULL; - return true; + return TRUE; } /* Reset the line as if we had not done anything. */ input_line_pointer = start; - return false; + return FALSE; } /* Summary of register_name(). @@ -434,7 +434,7 @@ data_register_name (expressionP) * its original state. */ -static boolean +static bfd_boolean address_register_name (expressionP) expressionS *expressionP; { @@ -462,12 +462,12 @@ address_register_name (expressionP) expressionP->X_add_symbol = NULL; expressionP->X_op_symbol = NULL; - return true; + return TRUE; } /* Reset the line as if we had not done anything. */ input_line_pointer = start; - return false; + return FALSE; } /* Summary of register_name(). @@ -481,7 +481,7 @@ address_register_name (expressionP) * its original state. */ -static boolean +static bfd_boolean other_register_name (expressionP) expressionS *expressionP; { @@ -510,12 +510,12 @@ other_register_name (expressionP) expressionP->X_add_symbol = NULL; expressionP->X_op_symbol = NULL; - return true; + return TRUE; } /* Reset the line as if we had not done anything. */ input_line_pointer = start; - return false; + return FALSE; } void @@ -2008,7 +2008,7 @@ mn10300_force_relocation (fixp) /* Return zero if the fixup in fixp should be left alone and not adjusted. */ -boolean +bfd_boolean mn10300_fix_adjustable (fixp) struct fix *fixp; { diff --git a/gas/config/tc-mn10300.h b/gas/config/tc-mn10300.h index 21611961c5..739cd8bc3e 100644 --- a/gas/config/tc-mn10300.h +++ b/gas/config/tc-mn10300.h @@ -63,7 +63,7 @@ extern int mn10300_force_relocation PARAMS ((struct fix *)); /* Don't bother to adjust relocs. */ #define tc_fix_adjustable(FIX) 0 /* #define tc_fix_adjustable(FIX) mn10300_fix_adjustable (FIX) */ -extern boolean mn10300_fix_adjustable PARAMS ((struct fix *)); +extern bfd_boolean mn10300_fix_adjustable PARAMS ((struct fix *)); /* We do relaxing in the assembler as well as the linker. */ extern const struct relax_type md_relax_table[]; diff --git a/gas/config/tc-openrisc.c b/gas/config/tc-openrisc.c index 2a7869ab33..d4177eba94 100644 --- a/gas/config/tc-openrisc.c +++ b/gas/config/tc-openrisc.c @@ -1,5 +1,5 @@ /* tc-openrisc.c -- Assembler for the OpenRISC family. - Copyright (C) 2001, 2002 Free Software Foundation. + Copyright 2001, 2002 Free Software Foundation. Contributed by Johan Rydberg, jrydberg@opencores.org This file is part of GAS, the GNU Assembler. @@ -483,7 +483,7 @@ md_atof (type, litP, sizeP) return 0; } -boolean +bfd_boolean openrisc_fix_adjustable (fixP) fixS * fixP; { diff --git a/gas/config/tc-openrisc.h b/gas/config/tc-openrisc.h index cf38d50b3c..24db9ab912 100644 --- a/gas/config/tc-openrisc.h +++ b/gas/config/tc-openrisc.h @@ -52,7 +52,7 @@ extern const char openrisc_comment_chars []; #define md_apply_fix3 gas_cgen_md_apply_fix3 -extern boolean openrisc_fix_adjustable PARAMS ((struct fix *)); +extern bfd_boolean openrisc_fix_adjustable PARAMS ((struct fix *)); #define tc_fix_adjustable(FIX) openrisc_fix_adjustable (FIX) /* When relaxing, we need to emit various relocs we otherwise wouldn't. */ diff --git a/gas/config/tc-ppc.c b/gas/config/tc-ppc.c index b071a9ea69..04fae38107 100644 --- a/gas/config/tc-ppc.c +++ b/gas/config/tc-ppc.c @@ -47,9 +47,9 @@ static int set_target_endian = 0; /* Whether to use user friendly register names. */ #ifndef TARGET_REG_NAMES_P #ifdef TE_PE -#define TARGET_REG_NAMES_P true +#define TARGET_REG_NAMES_P TRUE #else -#define TARGET_REG_NAMES_P false +#define TARGET_REG_NAMES_P FALSE #endif #endif @@ -83,9 +83,9 @@ static int set_target_endian = 0; #define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000) -static boolean reg_names_p = TARGET_REG_NAMES_P; +static bfd_boolean reg_names_p = TARGET_REG_NAMES_P; -static boolean register_name PARAMS ((expressionS *)); +static bfd_boolean register_name PARAMS ((expressionS *)); static void ppc_set_cpu PARAMS ((void)); static unsigned long ppc_insert_operand PARAMS ((unsigned long insn, const struct powerpc_operand *operand, @@ -603,7 +603,7 @@ reg_name_search (regs, regcount, name) * original state. */ -static boolean +static bfd_boolean register_name (expressionP) expressionS *expressionP; { @@ -618,7 +618,7 @@ register_name (expressionP) name = ++input_line_pointer; else if (!reg_names_p || !ISALPHA (name[0])) - return false; + return FALSE; c = get_symbol_end (); reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name); @@ -635,12 +635,12 @@ register_name (expressionP) /* Make the rest nice. */ expressionP->X_add_symbol = NULL; expressionP->X_op_symbol = NULL; - return true; + return TRUE; } /* Reset the line as if we had not done anything. */ input_line_pointer = start; - return false; + return FALSE; } /* This function is called for each symbol seen in an expression. It @@ -648,7 +648,7 @@ register_name (expressionP) to use for condition codes. */ /* Whether to do the special parsing. */ -static boolean cr_operand; +static bfd_boolean cr_operand; /* Names to recognize in a condition code. This table is sorted. */ static const struct pd_reg cr_names[] = @@ -716,12 +716,12 @@ static flagword ppc_flags = 0; /* Whether this is Solaris or not. */ #ifdef TARGET_SOLARIS_COMMENT -#define SOLARIS_P true +#define SOLARIS_P TRUE #else -#define SOLARIS_P false +#define SOLARIS_P FALSE #endif -static boolean msolaris = SOLARIS_P; +static bfd_boolean msolaris = SOLARIS_P; #endif #ifdef OBJ_XCOFF @@ -796,8 +796,8 @@ symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */ #define PPC_APUINFO_EFS 0x101 #define PPC_APUINFO_BRLOCK 0x102 -/* - * We keep a list of APUinfo +/* + * We keep a list of APUinfo */ unsigned long *ppc_apuinfo_list; unsigned int ppc_apuinfo_num; @@ -891,8 +891,8 @@ md_parse_option (c, arg) /* -m601 means to assemble for the PowerPC 601, which includes instructions that are holdovers from the Power. */ else if (strcmp (arg, "601") == 0) - ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC - | PPC_OPCODE_601 | PPC_OPCODE_32; + ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC + | PPC_OPCODE_601 | PPC_OPCODE_32); /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the PowerPC 603/604. */ else if (strcmp (arg, "ppc") == 0 @@ -902,28 +902,29 @@ md_parse_option (c, arg) ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32; /* -m403 and -m405 mean to assemble for the PowerPC 403/405. */ else if (strcmp (arg, "403") == 0 - || strcmp (arg, "405") == 0) - ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC - | PPC_OPCODE_403 | PPC_OPCODE_32; + || strcmp (arg, "405") == 0) + ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC + | PPC_OPCODE_403 | PPC_OPCODE_32); else if (strcmp (arg, "7400") == 0 - || strcmp (arg, "7410") == 0 - || strcmp (arg, "7450") == 0 - || strcmp (arg, "7455") == 0) - ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC - | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32; + || strcmp (arg, "7410") == 0 + || strcmp (arg, "7450") == 0 + || strcmp (arg, "7455") == 0) + ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC + | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32); else if (strcmp (arg, "altivec") == 0) - { - if (ppc_cpu == 0) - ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC; - else - ppc_cpu |= PPC_OPCODE_ALTIVEC; - } + { + if (ppc_cpu == 0) + ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC; + else + ppc_cpu |= PPC_OPCODE_ALTIVEC; + } else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0) { - ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE - | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK - | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI; - } + ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE + | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK + | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK + | PPC_OPCODE_RFMCI); + } else if (strcmp (arg, "spe") == 0) { if (ppc_cpu == 0) @@ -939,8 +940,8 @@ md_parse_option (c, arg) } else if (strcmp (arg, "ppc64bridge") == 0) { - ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC - | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64; + ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC + | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64); } /* -mbooke/-mbooke32 mean enable 32-bit BookE support. */ else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0) @@ -950,13 +951,13 @@ md_parse_option (c, arg) /* -mbooke64 means enable 64-bit BookE support. */ else if (strcmp (arg, "booke64") == 0) { - ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | - PPC_OPCODE_BOOKE64 | PPC_OPCODE_64; + ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE + | PPC_OPCODE_BOOKE64 | PPC_OPCODE_64); } else if (strcmp (arg, "power4") == 0) { - ppc_cpu = PPC_OPCODE_PPC| PPC_OPCODE_CLASSIC - | PPC_OPCODE_64 | PPC_OPCODE_POWER4; + ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC + | PPC_OPCODE_64 | PPC_OPCODE_POWER4); } /* -mcom means assemble for the common intersection between Power and PowerPC. At present, we just allow the union, rather @@ -968,10 +969,10 @@ md_parse_option (c, arg) ppc_cpu = PPC_OPCODE_ANY | PPC_OPCODE_32; else if (strcmp (arg, "regnames") == 0) - reg_names_p = true; + reg_names_p = TRUE; else if (strcmp (arg, "no-regnames") == 0) - reg_names_p = false; + reg_names_p = FALSE; #ifdef OBJ_ELF /* -mrelocatable/-mrelocatable-lib -- warn about initializations @@ -1008,13 +1009,13 @@ md_parse_option (c, arg) else if (strcmp (arg, "solaris") == 0) { - msolaris = true; + msolaris = TRUE; ppc_comment_chars = ppc_solaris_comment_chars; } else if (strcmp (arg, "no-solaris") == 0) { - msolaris = false; + msolaris = FALSE; ppc_comment_chars = ppc_eabi_comment_chars; } #endif @@ -1116,12 +1117,12 @@ ppc_set_cpu () else if (strcmp (default_cpu, "rs6000") == 0) ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32; else if (strncmp (default_cpu, "powerpc", 7) == 0) - { - if (default_cpu[7] == '6' && default_cpu[8] == '4') - ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64; - else - ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32; - } + { + if (default_cpu[7] == '6' && default_cpu[8] == '4') + ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64; + else + ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32; + } else as_fatal (_("Unknown default cpu = %s, os = %s"), default_cpu, default_os); @@ -1197,7 +1198,7 @@ md_begin () const struct powerpc_opcode *op_end; const struct powerpc_macro *macro; const struct powerpc_macro *macro_end; - boolean dup_insn = false; + bfd_boolean dup_insn = FALSE; ppc_set_cpu (); @@ -1244,7 +1245,7 @@ md_begin () as_bad (_("Internal assembler error for instruction %s"), op->name); - dup_insn = true; + dup_insn = TRUE; } } } @@ -1263,7 +1264,7 @@ md_begin () if (retval != (const char *) NULL) { as_bad (_("Internal assembler error for macro %s"), macro->name); - dup_insn = true; + dup_insn = TRUE; } } } @@ -1345,8 +1346,8 @@ ppc_cleanup () for (i = 0; i < ppc_apuinfo_num; i++) { - p = frag_more (4); - md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4); + p = frag_more (4); + md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4); } frag_align (2, 0, 0); @@ -1968,7 +1969,7 @@ ppc_apuinfo_section_add (apu, version) for (i = 0; i < ppc_apuinfo_num; i++) if (ppc_apuinfo_list[i] == APUID (apu, version)) return; - + if (ppc_apuinfo_num == ppc_apuinfo_num_alloc) { if (ppc_apuinfo_num_alloc == 0) @@ -2272,9 +2273,9 @@ md_assemble (str) if (! register_name (&ex)) { if ((operand->flags & PPC_OPERAND_CR) != 0) - cr_operand = true; + cr_operand = TRUE; expression (&ex); - cr_operand = false; + cr_operand = FALSE; } } @@ -2491,19 +2492,19 @@ md_assemble (str) { /* These are all version "1". */ if (opcode->flags & PPC_OPCODE_SPE) - ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1); + ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1); if (opcode->flags & PPC_OPCODE_ISEL) - ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1); + ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1); if (opcode->flags & PPC_OPCODE_EFS) - ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1); + ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1); if (opcode->flags & PPC_OPCODE_BRLOCK) - ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1); + ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1); if (opcode->flags & PPC_OPCODE_PMR) - ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1); + ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1); if (opcode->flags & PPC_OPCODE_CACHELCK) - ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1); + ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1); if (opcode->flags & PPC_OPCODE_RFMCI) - ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1); + ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1); } #endif @@ -2759,7 +2760,7 @@ ppc_byte (ignore) /* This is set if we are creating a .stabx symbol, since we don't want to handle symbol suffixes for such symbols. */ -static boolean ppc_stab_symbol; +static bfd_boolean ppc_stab_symbol; /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common symbols in the .bss segment as though they were local common @@ -3202,9 +3203,9 @@ ppc_stabx (ignore) } ++input_line_pointer; - ppc_stab_symbol = true; + ppc_stab_symbol = TRUE; sym = symbol_make (name); - ppc_stab_symbol = false; + ppc_stab_symbol = FALSE; symbol_get_tc (sym)->real_name = name; @@ -3933,11 +3934,11 @@ ppc_previous (ignore) /* pseudo-op: .pdata behaviour: predefined read only data section - double word aligned + double word aligned errors: None warnings: None initial: .section .pdata "adr3" - a - don't know -- maybe a misprint + a - don't know -- maybe a misprint d - initialized data r - readable 3 - double word aligned (that would be 4 byte boundary) @@ -3969,11 +3970,11 @@ ppc_pdata (ignore) /* pseudo-op: .ydata behaviour: predefined read only data section - double word aligned + double word aligned errors: None warnings: None initial: .section .ydata "drw3" - a - don't know -- maybe a misprint + a - don't know -- maybe a misprint d - initialized data r - readable 3 - double word aligned (that would be 4 byte boundary) @@ -4003,7 +4004,7 @@ ppc_ydata (ignore) /* pseudo-op: .reldata behaviour: predefined read write data section - double word aligned (4-byte) + double word aligned (4-byte) FIXME: relocation is applied to it FIXME: what's the difference between this and .data? errors: None @@ -4041,7 +4042,7 @@ ppc_reldata (ignore) /* pseudo-op: .rdata behaviour: predefined read only data section - double word aligned + double word aligned errors: None warnings: None initial: .section .rdata "dr3" @@ -4071,7 +4072,7 @@ ppc_rdata (ignore) /* pseudo-op: .ualong behaviour: much like .int, with the exception that no alignment is - performed. + performed. FIXME: test the alignment statement errors: None warnings: None */ @@ -4086,7 +4087,7 @@ ppc_ualong (ignore) /* pseudo-op: .znop <symbol name> behaviour: Issue a nop instruction - Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using + Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using the supplied symbol name. errors: None warnings: Missing symbol name */ @@ -4648,7 +4649,7 @@ ppc_frob_label (sym) seen. It tells ppc_adjust_symtab whether it needs to look through the symbols. */ -static boolean ppc_saw_abs; +static bfd_boolean ppc_saw_abs; /* Change the name of a symbol just before writing it out. Set the real name if the .rename pseudo-op was used. Otherwise, remove any @@ -4791,7 +4792,7 @@ ppc_frob_symbol (sym) { /* This is an absolute symbol. The csect will be created by ppc_adjust_symtab. */ - ppc_saw_abs = true; + ppc_saw_abs = TRUE; a->x_csect.x_smtyp = XTY_LD; if (symbol_get_tc (sym)->class == -1) symbol_get_tc (sym)->class = XMC_XO; @@ -4959,7 +4960,7 @@ ppc_adjust_symtab () coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1; } - ppc_saw_abs = false; + ppc_saw_abs = FALSE; } /* Set the VMA for a section. This is called on all the sections in diff --git a/gas/config/tc-s390.c b/gas/config/tc-s390.c index d7e6fe6cda..d34e2c6690 100644 --- a/gas/config/tc-s390.c +++ b/gas/config/tc-s390.c @@ -41,15 +41,15 @@ static enum s390_opcode_arch_val current_architecture = S390_OPCODE_ESA; static int current_arch_mask = 1 << S390_OPCODE_ESA; static int current_arch_requested = 0; -/* Whether to use user friendly register names. Default is true. */ +/* Whether to use user friendly register names. Default is TRUE. */ #ifndef TARGET_REG_NAMES_P -#define TARGET_REG_NAMES_P true +#define TARGET_REG_NAMES_P TRUE #endif -static boolean reg_names_p = TARGET_REG_NAMES_P; +static bfd_boolean reg_names_p = TARGET_REG_NAMES_P; /* Set to TRUE if we want to warn about zero base/index registers. */ -static boolean warn_areg_zero = FALSE; +static bfd_boolean warn_areg_zero = FALSE; /* Generic assembler global variables which must be defined by all targets. */ @@ -204,7 +204,7 @@ static const struct pd_reg pre_defined_registers[] = static int reg_name_search PARAMS ((const struct pd_reg *, int, const char *)); -static boolean register_name PARAMS ((expressionS *)); +static bfd_boolean register_name PARAMS ((expressionS *)); static void init_default_arch PARAMS ((void)); static void s390_insert_operand PARAMS ((unsigned char *, const struct s390_operand *, offsetT, char *, @@ -256,7 +256,7 @@ reg_name_search (regs, regcount, name) * original state. */ -static boolean +static bfd_boolean register_name (expressionP) expressionS *expressionP; { @@ -270,7 +270,7 @@ register_name (expressionP) if (name[0] == '%' && ISALPHA (name[1])) name = ++input_line_pointer; else - return false; + return FALSE; c = get_symbol_end (); reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name); @@ -287,12 +287,12 @@ register_name (expressionP) /* Make the rest nice. */ expressionP->X_add_symbol = NULL; expressionP->X_op_symbol = NULL; - return true; + return TRUE; } /* Reset the line as if we had not done anything. */ input_line_pointer = start; - return false; + return FALSE; } /* Local variables. */ @@ -366,10 +366,10 @@ md_parse_option (c, arg) break; case 'm': if (arg != NULL && strcmp (arg, "regnames") == 0) - reg_names_p = true; + reg_names_p = TRUE; else if (arg != NULL && strcmp (arg, "no-regnames") == 0) - reg_names_p = false; + reg_names_p = FALSE; else if (arg != NULL && strcmp (arg, "warn-areg-zero") == 0) warn_areg_zero = TRUE; @@ -440,7 +440,7 @@ md_begin () { register const struct s390_opcode *op; const struct s390_opcode *op_end; - boolean dup_insn = false; + bfd_boolean dup_insn = FALSE; const char *retval; /* Give a warning if the combination -m64-bit and -Aesa is used. */ @@ -462,7 +462,7 @@ md_begin () { as_bad (_("Internal assembler error for instruction format %s"), op->name); - dup_insn = true; + dup_insn = TRUE; } } @@ -476,7 +476,7 @@ md_begin () if (retval != (const char *) NULL) { as_bad (_("Internal assembler error for instruction %s"), op->name); - dup_insn = true; + dup_insn = TRUE; } } @@ -973,9 +973,9 @@ s390_elf_cons (nbytes) where = frag_more (nbytes); md_number_to_chars (where, 0, size); /* To make fixup_segment do the pc relative conversion the - pcrel parameter on the fix_new_exp call needs to be false. */ + pcrel parameter on the fix_new_exp call needs to be FALSE. */ fix_new_exp (frag_now, where - frag_now->fr_literal, - size, &exp, false, reloc); + size, &exp, FALSE, reloc); } else as_bad (_("relocation not applicable")); @@ -1080,11 +1080,11 @@ md_gather_operands (str, insn, opcode) { if ((operand->flags & S390_OPERAND_INDEX) && ex.X_add_number == 0 - && warn_areg_zero == TRUE) + && warn_areg_zero) as_warn ("index register specified but zero"); if ((operand->flags & S390_OPERAND_BASE) && ex.X_add_number == 0 - && warn_areg_zero == TRUE) + && warn_areg_zero) as_warn ("base register specified but zero"); s390_insert_operand (insn, operand, ex.X_add_number, NULL, 0); } diff --git a/gas/config/tc-sh.c b/gas/config/tc-sh.c index eac7fc1450..74b7593ff8 100644 --- a/gas/config/tc-sh.c +++ b/gas/config/tc-sh.c @@ -71,7 +71,7 @@ static void build_relax PARAMS ((sh_opcode_info *, sh_operand_info *)); static char *insert_loop_bounds PARAMS ((char *, sh_operand_info *)); static unsigned int build_Mytes PARAMS ((sh_opcode_info *, sh_operand_info *)); -static boolean sh_local_pcrel PARAMS ((fixS *fix)); +static bfd_boolean sh_local_pcrel PARAMS ((fixS *fix)); #ifdef OBJ_ELF static void sh_elf_cons PARAMS ((int)); @@ -826,7 +826,7 @@ sh_elf_cons (nbytes) #ifdef HAVE_SH64 /* Update existing range to include a previous insn, if there was one. */ - sh64_update_contents_mark (true); + sh64_update_contents_mark (TRUE); /* We need to make sure the contents type is set to data. */ sh64_flag_output (); @@ -2348,13 +2348,13 @@ md_assemble (str) { /* If we've seen pseudo-directives, make sure any emitted data or frags are marked as data. */ - if (seen_insn == false) + if (!seen_insn) { - sh64_update_contents_mark (true); + sh64_update_contents_mark (TRUE); sh64_set_contents_type (CRT_SH5_ISA16); } - seen_insn = true; + seen_insn = TRUE; } #endif /* HAVE_SH64 */ @@ -2685,19 +2685,19 @@ md_parse_option (c, arg) break; case OPTION_NO_MIX: - sh64_mix = false; + sh64_mix = FALSE; break; case OPTION_SHCOMPACT_CONST_CRANGE: - sh64_shcompact_const_crange = true; + sh64_shcompact_const_crange = TRUE; break; case OPTION_NO_EXPAND: - sh64_expand = false; + sh64_expand = FALSE; break; case OPTION_PT32: - sh64_pt32 = true; + sh64_pt32 = TRUE; break; #endif /* HAVE_SH64 */ @@ -3062,7 +3062,7 @@ md_convert_frag (headers, seg, fragP) default: #ifdef HAVE_SH64 - shmedia_md_convert_frag (headers, seg, fragP, true); + shmedia_md_convert_frag (headers, seg, fragP, TRUE); #else abort (); #endif @@ -3208,18 +3208,18 @@ sh_handle_align (frag) /* See whether the relocation should be resolved locally. */ -static boolean +static bfd_boolean sh_local_pcrel (fix) fixS *fix; { - return (! sh_relax && - (fix->fx_r_type == BFD_RELOC_SH_PCDISP8BY2 - || fix->fx_r_type == BFD_RELOC_SH_PCDISP12BY2 - || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY2 - || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY4 - || fix->fx_r_type == BFD_RELOC_8_PCREL - || fix->fx_r_type == BFD_RELOC_SH_SWITCH16 - || fix->fx_r_type == BFD_RELOC_SH_SWITCH32)); + return (! sh_relax + && (fix->fx_r_type == BFD_RELOC_SH_PCDISP8BY2 + || fix->fx_r_type == BFD_RELOC_SH_PCDISP12BY2 + || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY2 + || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY4 + || fix->fx_r_type == BFD_RELOC_8_PCREL + || fix->fx_r_type == BFD_RELOC_SH_SWITCH16 + || fix->fx_r_type == BFD_RELOC_SH_SWITCH32)); } /* See whether we need to force a relocation into the output file. @@ -3264,7 +3264,7 @@ sh_force_relocation (fix) } #ifdef OBJ_ELF -boolean +bfd_boolean sh_fix_adjustable (fixP) fixS *fixP; { diff --git a/gas/config/tc-sh.h b/gas/config/tc-sh.h index 6ff45c8876..8a6c358b7c 100644 --- a/gas/config/tc-sh.h +++ b/gas/config/tc-sh.h @@ -211,7 +211,7 @@ extern void sh_elf_final_processing PARAMS ((void)); #define TC_RELOC_GLOBAL_OFFSET_TABLE BFD_RELOC_SH_GOTPC #define tc_fix_adjustable(FIX) sh_fix_adjustable(FIX) -extern boolean sh_fix_adjustable PARAMS ((struct fix *)); +extern bfd_boolean sh_fix_adjustable PARAMS ((struct fix *)); /* Values passed to md_apply_fix3 don't include symbol values. */ #define MD_APPLY_SYM_VALUE(FIX) 0 diff --git a/gas/config/tc-sh64.c b/gas/config/tc-sh64.c index 8d899fbefb..c6321f24ff 100644 --- a/gas/config/tc-sh64.c +++ b/gas/config/tc-sh64.c @@ -1,5 +1,5 @@ /* tc-sh64.c -- Assemble code for the Hitachi Super-H SHcompact and SHmedia. - Copyright (C) 2000, 2001, 2002 Free Software Foundation. + Copyright 2000, 2001, 2002 Free Software Foundation. This file is part of GAS, the GNU Assembler. @@ -87,36 +87,36 @@ static enum sh64_abi_values sh64_abi = sh64_abi_unspecified; /* A note that says if we're in a sequence of insns without label settings, segment or ISA mode changes or emitted data. */ -static boolean seen_insn = false; +static bfd_boolean seen_insn = FALSE; -/* This is set to true in shmedia_md_end, so that we don't emit any +/* This is set to TRUE in shmedia_md_end, so that we don't emit any .cranges entries when the assembler calls output functions while grinding along after all input is seen. */ -static boolean sh64_end_of_assembly = false; +static bfd_boolean sh64_end_of_assembly = FALSE; /* Controlled by the option -no-mix, this invalidates mixing SHcompact and SHmedia code in the same section, and also invalidates mixing data and SHmedia code in the same section. No .cranges will therefore be emitted, unless -shcompact-const-crange is specified and there is a constant pool in SHcompact code. */ -static boolean sh64_mix = true; +static bfd_boolean sh64_mix = TRUE; -static boolean sh64_shcompact_const_crange = false; +static bfd_boolean sh64_shcompact_const_crange = FALSE; /* Controlled by the option -no-expand, this says whether or not we expand MOVI and PT/PTA/PTB. When we do not expand these insns to fit an operand, we will emit errors for operands out of range and generate the basic instruction and reloc for an external symbol. */ -static boolean sh64_expand = true; +static bfd_boolean sh64_expand = TRUE; /* Controlled by the option -expand-pt32, this says whether we expand PT/PTA/PTB of an external symbol to (only) 32 or (the full) 64 bits when -abi=64 is in effect. */ -static boolean sh64_pt32 = false; +static bfd_boolean sh64_pt32 = FALSE; /* When emitting a .cranges descriptor, we want to avoid getting recursive calls through emit_expr. */ -static boolean emitting_crange = false; +static bfd_boolean emitting_crange = FALSE; /* SHmedia mnemonics. */ static struct hash_control *shmedia_opcode_hash_control = NULL; @@ -133,32 +133,58 @@ static const unsigned char shmedia_little_nop_pattern[4] = (SHMEDIA_NOP_OPC >> 16) & 255, (SHMEDIA_NOP_OPC >> 24) & 255 }; -static void shmedia_md_begin PARAMS ((void)); -static int shmedia_parse_reg PARAMS ((char *, int *, int *, shmedia_arg_type)); -static void shmedia_md_assemble PARAMS ((char *)); -static void shmedia_md_apply_fix3 PARAMS ((fixS *, valueT *)); -static int shmedia_md_estimate_size_before_relax PARAMS ((fragS *, segT)); -static int shmedia_init_reloc PARAMS ((arelent *, fixS *)); -static char *shmedia_get_operands PARAMS ((shmedia_opcode_info *, char *, shmedia_operands_info *)); -static void s_sh64_mode PARAMS ((int)); -static void s_sh64_abi PARAMS ((int)); -static void shmedia_md_convert_frag PARAMS ((bfd *, segT, fragS *, boolean)); -static void shmedia_check_limits PARAMS ((offsetT *, bfd_reloc_code_real_type, fixS *)); -static void sh64_set_contents_type PARAMS ((enum sh64_elf_cr_type)); -static void shmedia_get_operand PARAMS ((char **, shmedia_operand_info *, shmedia_arg_type)); -static unsigned long shmedia_immediate_op PARAMS ((char *, shmedia_operand_info *, int, bfd_reloc_code_real_type)); -static char *shmedia_parse_exp PARAMS ((char *, shmedia_operand_info *)); -static void shmedia_frob_file_before_adjust PARAMS ((void)); -static void sh64_emit_crange PARAMS ((symbolS *, symbolS *, enum sh64_elf_cr_type)); -static void sh64_flush_last_crange PARAMS ((bfd *, asection *, PTR)); -static void sh64_flag_output PARAMS ((void)); -static void sh64_update_contents_mark PARAMS ((boolean)); -static void sh64_vtable_entry PARAMS ((int)); -static void sh64_vtable_inherit PARAMS ((int)); -static char * strip_datalabels PARAMS ((void)); -static int shmedia_build_Mytes PARAMS ((shmedia_opcode_info *, shmedia_operands_info *)); -static shmedia_opcode_info * shmedia_find_cooked_opcode PARAMS ((char **)); -static unsigned long shmedia_mask_number PARAMS ((unsigned long, bfd_reloc_code_real_type)); +static void shmedia_md_begin + PARAMS ((void)); +static int shmedia_parse_reg + PARAMS ((char *, int *, int *, shmedia_arg_type)); +static void shmedia_md_assemble + PARAMS ((char *)); +static void shmedia_md_apply_fix3 + PARAMS ((fixS *, valueT *)); +static int shmedia_md_estimate_size_before_relax + PARAMS ((fragS *, segT)); +static int shmedia_init_reloc + PARAMS ((arelent *, fixS *)); +static char *shmedia_get_operands + PARAMS ((shmedia_opcode_info *, char *, shmedia_operands_info *)); +static void s_sh64_mode + PARAMS ((int)); +static void s_sh64_abi + PARAMS ((int)); +static void shmedia_md_convert_frag + PARAMS ((bfd *, segT, fragS *, bfd_boolean)); +static void shmedia_check_limits + PARAMS ((offsetT *, bfd_reloc_code_real_type, fixS *)); +static void sh64_set_contents_type + PARAMS ((enum sh64_elf_cr_type)); +static void shmedia_get_operand + PARAMS ((char **, shmedia_operand_info *, shmedia_arg_type)); +static unsigned long shmedia_immediate_op + PARAMS ((char *, shmedia_operand_info *, int, bfd_reloc_code_real_type)); +static char *shmedia_parse_exp + PARAMS ((char *, shmedia_operand_info *)); +static void shmedia_frob_file_before_adjust + PARAMS ((void)); +static void sh64_emit_crange + PARAMS ((symbolS *, symbolS *, enum sh64_elf_cr_type)); +static void sh64_flush_last_crange + PARAMS ((bfd *, asection *, PTR)); +static void sh64_flag_output + PARAMS ((void)); +static void sh64_update_contents_mark + PARAMS ((bfd_boolean)); +static void sh64_vtable_entry + PARAMS ((int)); +static void sh64_vtable_inherit + PARAMS ((int)); +static char * strip_datalabels + PARAMS ((void)); +static int shmedia_build_Mytes + PARAMS ((shmedia_opcode_info *, shmedia_operands_info *)); +static shmedia_opcode_info * shmedia_find_cooked_opcode + PARAMS ((char **)); +static unsigned long shmedia_mask_number + PARAMS ((unsigned long, bfd_reloc_code_real_type)); #include "tc-sh.c" @@ -169,7 +195,7 @@ shmedia_md_end () /* First, update the last range to include whatever data was last emitted. */ - sh64_update_contents_mark (true); + sh64_update_contents_mark (TRUE); /* Make sure frags generated after this point are not marked with the wrong ISA; make them easily spottable. We still want to distinguish @@ -178,7 +204,7 @@ shmedia_md_end () if (sh64_isa_mode != sh64_isa_unspecified) sh64_isa_mode = sh64_isa_sh5_guard; - sh64_end_of_assembly = true; + sh64_end_of_assembly = TRUE; bfd_map_over_sections (stdoutput, sh64_flush_last_crange, NULL); @@ -315,7 +341,7 @@ sh64_do_align (n, fill, len, max) int max; { /* Update region, or put a data region in front. */ - sh64_update_contents_mark (true); + sh64_update_contents_mark (TRUE); /* Only make a frag if we HAVE to... */ if (n != 0 && !need_pass_2) @@ -334,7 +360,7 @@ sh64_do_align (n, fill, len, max) } /* Update mark for current region with current type. */ - sh64_update_contents_mark (false); + sh64_update_contents_mark (FALSE); } /* The MAX_MEM_FOR_RS_ALIGN_CODE worker. We have to find out the ISA of @@ -801,7 +827,7 @@ shmedia_md_convert_frag (output_bfd, seg, fragP, final) bfd *output_bfd ATTRIBUTE_UNUSED; segT seg ATTRIBUTE_UNUSED; fragS *fragP; - boolean final; + bfd_boolean final; { /* Pointer to first byte in variable-sized part of the frag. */ char *var_partp; @@ -819,7 +845,7 @@ shmedia_md_convert_frag (output_bfd, seg, fragP, final) and offsets to varying parts. */ symbolS *symbolP = fragP->fr_symbol; - boolean reloc_needed + bfd_boolean reloc_needed = (! final || sh_relax || symbolP == NULL @@ -1915,7 +1941,7 @@ shmedia_md_estimate_size_before_relax (fragP, segment_type) expressionS *exp; /* For ELF, we can't relax externally visible symbols; see tc-i386.c. */ - boolean sym_relaxable + bfd_boolean sym_relaxable = (fragP->fr_symbol && S_GET_SEGMENT (fragP->fr_symbol) == segment_type && ! S_IS_EXTERNAL (fragP->fr_symbol) @@ -2153,7 +2179,7 @@ shmedia_md_estimate_size_before_relax (fragP, segment_type) /* MOVI expansions that get here have not been converted to PC-relative frags, but instead expanded by md_number_to_chars or by calling shmedia_md_convert_frag - with final == false. We must not have them around as + with final == FALSE. We must not have them around as frags anymore; symbols would be prematurely evaluated when relaxing. We will not need to have md_convert_frag called again with them; any further handling is through @@ -2814,11 +2840,11 @@ shmedia_md_assemble (str) /* Start a SHmedia code region, if there has been pseudoinsns or similar seen since the last one. */ - if (seen_insn == false) + if (!seen_insn) { - sh64_update_contents_mark (true); + sh64_update_contents_mark (TRUE); sh64_set_contents_type (CRT_SH5_ISA32); - seen_insn = true; + seen_insn = TRUE; } op_end = shmedia_get_operands (opcode, op_end, &operands); @@ -2867,7 +2893,7 @@ s_sh64_mode (ignore) /* Make sure data up to this location is handled according to the previous ISA. */ - sh64_update_contents_mark (true); + sh64_update_contents_mark (TRUE); while (!is_end_of_line[(unsigned char) *input_line_pointer]) input_line_pointer++; @@ -2893,7 +2919,7 @@ s_sh64_mode (ignore) /* Contents type up to this new point is the same as before; don't add a data region just because the new frag we created. */ - sh64_update_contents_mark (false); + sh64_update_contents_mark (FALSE); *input_line_pointer = ch; demand_empty_rest_of_line (); @@ -3157,7 +3183,7 @@ sh64_set_contents_type (new_contents_type) /* We will not be called when emitting .cranges output, since callers stop that. Validize that assumption. */ - know (emitting_crange == false); + know (!emitting_crange); seginfo = seg_info (now_seg); @@ -3223,10 +3249,10 @@ sh64_set_contents_type (new_contents_type) as_bad ( _("SHmedia code not allowed in same section as constants and SHcompact code")); - emitting_crange = true; + emitting_crange = TRUE; sh64_emit_crange (seginfo->tc_segment_info_data.mode_start_symbol, symp, contents_type); - emitting_crange = false; + emitting_crange = FALSE; seginfo->tc_segment_info_data.emitted_ranges++; } @@ -3387,7 +3413,7 @@ sh64_exclude_symbol (symp) static void sh64_update_contents_mark (update_type) - boolean update_type; + bfd_boolean update_type; { segment_info_type *seginfo; seginfo = seg_info (now_seg); @@ -3433,7 +3459,7 @@ sh64_update_contents_mark (update_type) } } - seen_insn = false; + seen_insn = FALSE; } /* Called when the assembler is about to output some data, or maybe it's @@ -3442,7 +3468,7 @@ sh64_update_contents_mark (update_type) void sh64_flush_pending_output () { - sh64_update_contents_mark (true); + sh64_update_contents_mark (TRUE); sh_flush_pending_output (); } @@ -3494,9 +3520,9 @@ static void sh64_flag_output () { if (sh64_isa_mode != sh64_isa_unspecified - && seen_insn == false - && sh64_end_of_assembly == false - && ! emitting_crange) + && !seen_insn + && !sh64_end_of_assembly + && !emitting_crange) { md_flush_pending_output (); sh64_set_contents_type (CRT_DATA); diff --git a/gas/config/tc-tic54x.c b/gas/config/tc-tic54x.c index b1c7c2167c..9825e1873d 100644 --- a/gas/config/tc-tic54x.c +++ b/gas/config/tc-tic54x.c @@ -4354,7 +4354,7 @@ emit_insn (insn) if (insn->opcode[i].unresolved) fix_new_exp (frag_now, p - frag_now->fr_literal, insn->opcode[i].r_nchars, &insn->opcode[i].addr_expr, - false, insn->opcode[i].r_type); + FALSE, insn->opcode[i].r_type); } } diff --git a/gas/config/tc-v850.c b/gas/config/tc-v850.c index 04034f7d36..cdc3940f04 100644 --- a/gas/config/tc-v850.c +++ b/gas/config/tc-v850.c @@ -33,8 +33,8 @@ static bfd_reloc_code_real_type hold_cons_reloc = BFD_RELOC_UNUSED; /* Set to TRUE if we want to be pedantic about signed overflows. */ -static boolean warn_signed_overflows = FALSE; -static boolean warn_unsigned_overflows = FALSE; +static bfd_boolean warn_signed_overflows = FALSE; +static bfd_boolean warn_unsigned_overflows = FALSE; /* Indicates the target BFD machine number. */ static int machine = -1; @@ -652,14 +652,14 @@ static const struct reg_name cc_names[] = { success, or -1 on failure. */ static int reg_name_search - PARAMS ((const struct reg_name *, int, const char *, boolean)); + PARAMS ((const struct reg_name *, int, const char *, bfd_boolean)); static int reg_name_search (regs, regcount, name, accept_numbers) const struct reg_name *regs; int regcount; const char *name; - boolean accept_numbers; + bfd_boolean accept_numbers; { int middle, low, high; int cmp; @@ -714,9 +714,9 @@ reg_name_search (regs, regcount, name, accept_numbers) * Input_line_pointer->(next non-blank) char after operand, or is in * its original state. */ -static boolean register_name PARAMS ((expressionS *)); +static bfd_boolean register_name PARAMS ((expressionS *)); -static boolean +static bfd_boolean register_name (expressionP) expressionS *expressionP; { @@ -746,14 +746,14 @@ register_name (expressionP) expressionP->X_add_symbol = NULL; expressionP->X_op_symbol = NULL; - return true; + return TRUE; } else { /* Reset the line as if we had not done anything. */ input_line_pointer = start; - return false; + return FALSE; } } @@ -771,13 +771,14 @@ register_name (expressionP) * Input_line_pointer->(next non-blank) char after operand, or is in * its original state. */ -static boolean system_register_name PARAMS ((expressionS *, boolean, boolean)); +static bfd_boolean system_register_name + PARAMS ((expressionS *, bfd_boolean, bfd_boolean)); -static boolean +static bfd_boolean system_register_name (expressionP, accept_numbers, accept_list_names) expressionS *expressionP; - boolean accept_numbers; - boolean accept_list_names; + bfd_boolean accept_numbers; + bfd_boolean accept_list_names; { int reg_number; char *name; @@ -833,14 +834,14 @@ system_register_name (expressionP, accept_numbers, accept_list_names) expressionP->X_add_symbol = NULL; expressionP->X_op_symbol = NULL; - return true; + return TRUE; } else { /* Reset the line as if we had not done anything. */ input_line_pointer = start; - return false; + return FALSE; } } @@ -854,9 +855,9 @@ system_register_name (expressionP, accept_numbers, accept_list_names) * Input_line_pointer->(next non-blank) char after operand, or is in * its original state. */ -static boolean cc_name PARAMS ((expressionS *)); +static bfd_boolean cc_name PARAMS ((expressionS *)); -static boolean +static bfd_boolean cc_name (expressionP) expressionS *expressionP; { @@ -884,14 +885,14 @@ cc_name (expressionP) expressionP->X_add_symbol = NULL; expressionP->X_op_symbol = NULL; - return true; + return TRUE; } else { /* Reset the line as if we had not done anything. */ input_line_pointer = start; - return false; + return FALSE; } } @@ -1058,7 +1059,7 @@ parse_register_list (insn, operand) return _("illegal register included in list"); } } - else if (system_register_name (&exp, true, true)) + else if (system_register_name (&exp, TRUE, TRUE)) { if (regs == type1_regs) { @@ -1488,13 +1489,13 @@ static bfd_reloc_code_real_type v850_reloc_prefix (operand) const struct v850_operand *operand; { - boolean paren_skipped = false; + bfd_boolean paren_skipped = FALSE; /* Skip leading opening parenthesis. */ if (*input_line_pointer == '(') { ++input_line_pointer; - paren_skipped = true; + paren_skipped = TRUE; } #define CHECK_(name, reloc) \ @@ -1651,7 +1652,7 @@ md_assemble (str) char *f; int i; int match; - boolean extra_data_after_insn = false; + bfd_boolean extra_data_after_insn = FALSE; unsigned extra_data_len = 0; unsigned long extra_data = 0; char *saved_input_line_pointer; @@ -1699,7 +1700,7 @@ md_assemble (str) fc = 0; next_opindex = 0; insn = opcode->opcode; - extra_data_after_insn = false; + extra_data_after_insn = FALSE; input_line_pointer = str = start_of_operands; @@ -1785,7 +1786,7 @@ md_assemble (str) goto error; } - extra_data_after_insn = true; + extra_data_after_insn = TRUE; extra_data_len = 4; extra_data = 0; break; @@ -1814,7 +1815,7 @@ md_assemble (str) goto error; } - extra_data_after_insn = true; + extra_data_after_insn = TRUE; extra_data_len = 4; extra_data = ex.X_add_number; } @@ -1851,7 +1852,7 @@ md_assemble (str) } else if ((operand->flags & V850_OPERAND_SRG) != 0) { - if (!system_register_name (&ex, true, false)) + if (!system_register_name (&ex, TRUE, FALSE)) { errmsg = _("invalid system register name"); } @@ -1911,7 +1912,7 @@ md_assemble (str) errmsg = _("constant too big to fit into instruction"); } - extra_data_after_insn = true; + extra_data_after_insn = TRUE; extra_data_len = 2; extra_data = ex.X_add_number; ex.X_add_number = 0; @@ -1923,7 +1924,7 @@ md_assemble (str) if (ex.X_op != O_constant) errmsg = _("constant expression expected"); - extra_data_after_insn = true; + extra_data_after_insn = TRUE; extra_data_len = 4; extra_data = ex.X_add_number; ex.X_add_number = 0; @@ -1974,7 +1975,7 @@ md_assemble (str) &symbol_rootP, &symbol_lastP); } } - else if (system_register_name (&ex, false, false) + else if (system_register_name (&ex, FALSE, FALSE) && (operand->flags & V850_OPERAND_SRG) == 0) { errmsg = _("syntax error: system register not expected"); @@ -2148,7 +2149,7 @@ md_assemble (str) f = frag_more (extra_data_len); md_number_to_chars (f, extra_data, extra_data_len); - extra_data_after_insn = false; + extra_data_after_insn = FALSE; } } @@ -2450,7 +2451,7 @@ cons_fix_new_v850 (frag, where, size, exp) hold_cons_reloc = BFD_RELOC_UNUSED; } -boolean +bfd_boolean v850_fix_adjustable (fixP) fixS *fixP; { diff --git a/gas/config/tc-v850.h b/gas/config/tc-v850.h index c69a06a13c..713076036a 100644 --- a/gas/config/tc-v850.h +++ b/gas/config/tc-v850.h @@ -38,7 +38,7 @@ #define md_operand(x) #define tc_fix_adjustable(FIX) v850_fix_adjustable (FIX) -extern boolean v850_fix_adjustable PARAMS ((struct fix *)); +extern bfd_boolean v850_fix_adjustable PARAMS ((struct fix *)); #define TC_FORCE_RELOCATION(FIX) v850_force_relocation(FIX) extern int v850_force_relocation PARAMS ((struct fix *)); diff --git a/gas/config/tc-xstormy16.c b/gas/config/tc-xstormy16.c index 30b8bcf459..15d989263f 100644 --- a/gas/config/tc-xstormy16.c +++ b/gas/config/tc-xstormy16.c @@ -1,5 +1,5 @@ /* tc-xstormy16.c -- Assembler for the Sanyo XSTORMY16. - Copyright (C) 2000, 2001, 2002 Free Software Foundation. + Copyright 2000, 2001, 2002 Free Software Foundation. This file is part of GAS, the GNU Assembler. @@ -388,7 +388,7 @@ xstormy16_force_relocation (fix) /* Return true if a relocation against a symbol may be replaced with a relocation against section+offset. */ -boolean +bfd_boolean xstormy16_fix_adjustable (fixP) fixS * fixP; { @@ -491,7 +491,7 @@ xstormy16_md_apply_fix3 (fixP, valueP, seg) /* The operand isn't fully resolved. Determine a BFD reloc value based on the operand information and leave it to bfd_install_relocation. Note that this doesn't work when - partial_inplace == false. */ + !partial_inplace. */ reloc_type = md_cgen_lookup_reloc (insn, operand, fixP); if (reloc_type != BFD_RELOC_NONE) diff --git a/gas/config/tc-xstormy16.h b/gas/config/tc-xstormy16.h index c3ff06bdbb..cd0ebb96dc 100644 --- a/gas/config/tc-xstormy16.h +++ b/gas/config/tc-xstormy16.h @@ -1,5 +1,5 @@ /* tc-xstormy16.h -- Header file for tc-xstormy16.c. - Copyright (C) 2000, 2001, 2002 Free Software Foundation, Inc. + Copyright 2000, 2001, 2002 Free Software Foundation, Inc. This file is part of GAS, the GNU Assembler. @@ -48,7 +48,7 @@ #define md_apply_fix3 xstormy16_md_apply_fix3 #define tc_fix_adjustable(FIX) xstormy16_fix_adjustable (FIX) -extern boolean xstormy16_fix_adjustable PARAMS ((struct fix *)); +extern bfd_boolean xstormy16_fix_adjustable PARAMS ((struct fix *)); #define TC_FORCE_RELOCATION(fix) xstormy16_force_relocation (fix) extern int xstormy16_force_relocation PARAMS ((struct fix *)); |