diff options
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/ChangeLog | 5 | ||||
| -rw-r--r-- | gas/doc/c-sh.texi | 22 |
2 files changed, 23 insertions, 4 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 7c26ea93fb..47d9dce404 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,8 @@ +2004-01-02 Nutan Singh <nutan@kpitcummins.com> + + * doc/c-sh.texi: Update description about floating point behavior + of SH family. + 2004-01-02 Bernardo Innocenti <bernie@develer.com> * configure.in: Add m68k-uClinux target. diff --git a/gas/doc/c-sh.texi b/gas/doc/c-sh.texi index e19959b724..509106fbb9 100644 --- a/gas/doc/c-sh.texi +++ b/gas/doc/c-sh.texi @@ -1,4 +1,4 @@ -@c Copyright 1991, 1992, 1993, 1994, 1995, 1997, 2001 +@c Copyright 1991, 1992, 1993, 1994, 1995, 1997, 2001, 2004 @c Free Software Foundation, Inc. @c This is part of the GAS manual. @c For copying conditions, see the file as.texinfo. @@ -164,9 +164,23 @@ Immediate data @cindex floating point, SH (@sc{ieee}) @cindex SH floating point (@sc{ieee}) -The SH family has no hardware floating point, but the @code{.float} -directive generates @sc{ieee} floating-point numbers for compatibility -with other development tools. +SH2E, SH3E and SH4 groups have on-chip floating-point unit (FPU). Other +SH groups can use @code{.float} directive to generate @sc{ieee} +floating-point numbers. + +SH2E and SH3E support single-precision floating point calculations as +well as entirely PCAPI compatible emulation of double-precision +floating point calculations. SH2E and SH3E instructions are a subset of +the floating point calculations conforming to the IEEE754 standard. + +In addition to single-precision and double-precision floating-point +operation capability, the on-chip FPU of SH4 has a 128-bit graphic +engine that enables 32-bit floating-point data to be processed 128 +bits at a time. It also supports 4 * 4 array operations and inner +product operations. Also, a superscalar architecture is employed that +enables simultaneous execution of two instructions (including FPU +instructions), providing performance of up to twice that of +conventional architectures at the same frequency. @node SH Directives @section SH Machine Directives |