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-rw-r--r--gas/ChangeLog29
-rw-r--r--gas/Makefile.am27
-rw-r--r--gas/Makefile.in35
-rw-r--r--gas/config/tc-xtensa.c9014
-rw-r--r--gas/config/tc-xtensa.h200
-rw-r--r--gas/config/xtensa-relax.c1766
-rw-r--r--gas/config/xtensa-relax.h142
-rwxr-xr-xgas/configure370
-rw-r--r--gas/configure.in10
-rw-r--r--gas/doc/Makefile.am1
-rw-r--r--gas/doc/Makefile.in1
-rw-r--r--gas/doc/all.texi1
-rw-r--r--gas/doc/as.texinfo62
-rw-r--r--gas/doc/c-xtensa.texi740
-rw-r--r--gas/doc/internals.texi4
-rw-r--r--gas/testsuite/ChangeLog10
-rw-r--r--gas/testsuite/gas/xtensa/all.exp98
-rw-r--r--gas/testsuite/gas/xtensa/entry_align.s4
-rw-r--r--gas/testsuite/gas/xtensa/entry_misalign.s4
-rw-r--r--gas/testsuite/gas/xtensa/entry_misalign2.s6
-rw-r--r--gas/testsuite/gas/xtensa/j_too_far.s8
-rw-r--r--gas/testsuite/gas/xtensa/loop_align.s5
-rw-r--r--gas/testsuite/gas/xtensa/loop_misalign.s5
-rw-r--r--gas/write.c4
24 files changed, 12365 insertions, 181 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 132ad34eb9..5462dd59b2 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,32 @@
+2003-04-01 Bob Wilson <bob.wilson@acm.org>
+
+ * Makefile.am (CPU_TYPES): Add xtensa.
+ (TARGET_CPU_CFILES): Add config/tc-xtensa.c.
+ (TARGET_CPU_HFILES): Add config/tc-xtensa.h.
+ (xtensa-relax.o): New target.
+ Run "make dep-am".
+ * Makefile.in: Regenerate.
+ * configure.in: Handle xtensa-*-*. Add xtensa-relax.o to
+ extra_objects for xtensa targets.
+ * configure: Regenerate.
+ * write.c (write_object_file): Add new md_post_relax_hook.
+ * config/tc-xtensa.c: New file.
+ * config/tc-xtensa.h: Likewise.
+ * config/xtensa-istack.h: Likewise.
+ * config/xtensa-relax.c: Likewise.
+ * config/xtensa-relax.h: Likewise.
+ * doc/Makefile.am (CPU_DOCS): Add c-xtensa.texi.
+ * doc/Makefile.in: Regenerate.
+ * doc/all.texi: Set new XTENSA variable.
+ * doc/as.texinfo: Set new Xtensa variable. Describe
+ Xtensa-specific options. Define line comment character for
+ Xtensa. Add Xtensa processors to list of ELF targets where
+ alignment is specified in bytes. Add new Xtensa-Dependent node.
+ Add acknowledgements for those contributing to the Xtensa port.
+ * doc/internals.texi: Describe new md_post_relax_hook.
+ * doc/c-xtensa.texi: New file.
+
+
2003-04-01 Nick Clifton <nickc@redhat.com>
Richard Earnshaw <rearnsha@arm.com>
diff --git a/gas/Makefile.am b/gas/Makefile.am
index 15f8f18801..76665bdb82 100644
--- a/gas/Makefile.am
+++ b/gas/Makefile.am
@@ -86,6 +86,7 @@ CPU_TYPES = \
w65 \
v850 \
xstormy16 \
+ xtensa \
z8k
# Object format types. This is only used for dependency information.
@@ -278,6 +279,7 @@ TARGET_CPU_CFILES = \
config/tc-w65.c \
config/tc-v850.c \
config/tc-xstormy16.c \
+ config/tc-xtensa.c \
config/tc-z8k.c
TARGET_CPU_HFILES = \
@@ -329,6 +331,7 @@ TARGET_CPU_HFILES = \
config/tc-w65.h \
config/tc-v850.h \
config/tc-xstormy16.h \
+ config/tc-xtensa.h \
config/tc-z8k.h
# OBJ files in config
@@ -601,6 +604,10 @@ e-crisaout.o: $(srcdir)/config/e-crisaout.c
e-criself.o: $(srcdir)/config/e-criself.c
$(COMPILE) -c $(srcdir)/config/e-criself.c
+xtensa-relax.o: $(srcdir)/config/xtensa-relax.c
+ $(COMPILE) -c $(srcdir)/config/xtensa-relax.c
+
+
# The m68k operand parser.
EXTRA_as_new_SOURCES = config/m68k-parse.y
@@ -1517,6 +1524,13 @@ DEPTC_xstormy16_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
subsegs.h $(INCDIR)/obstack.h $(srcdir)/../opcodes/xstormy16-desc.h \
$(INCDIR)/opcode/cgen.h $(srcdir)/../opcodes/xstormy16-opc.h \
cgen.h
+DEPTC_xtensa_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
+ $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
+ $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xtensa.h \
+ $(INCDIR)/xtensa-config.h sb.h $(INCDIR)/safe-ctype.h \
+ subsegs.h $(INCDIR)/obstack.h $(srcdir)/config/xtensa-relax.h \
+ $(INCDIR)/xtensa-isa.h $(srcdir)/config/xtensa-istack.h \
+ dwarf2dbg.h struc-symbol.h
DEPTC_z8k_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-z8k.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/z8k.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h \
@@ -1915,8 +1929,8 @@ DEPOBJ_sh64_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-sh64.h \
$(srcdir)/config/tc-sh.h $(INCDIR)/elf/sh.h $(INCDIR)/elf/reloc-macros.h \
- $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- struc-symbol.h $(INCDIR)/aout/aout64.h
+ $(BFDDIR)/elf32-sh64.h $(INCDIR)/safe-ctype.h subsegs.h \
+ $(INCDIR)/obstack.h struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_sparc_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \
$(srcdir)/config/tc-sparc.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \
$(INCDIR)/aout/aout64.h $(INCDIR)/obstack.h
@@ -2023,6 +2037,11 @@ DEPOBJ_xstormy16_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xstormy16.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
struc-symbol.h $(INCDIR)/aout/aout64.h
+DEPOBJ_xtensa_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
+ $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
+ $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xtensa.h \
+ $(INCDIR)/xtensa-config.h $(INCDIR)/safe-ctype.h subsegs.h \
+ $(INCDIR)/obstack.h struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_z8k_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-z8k.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/z8k.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h \
@@ -2363,6 +2382,10 @@ DEP_xstormy16_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-xstormy16.h
DEP_xstormy16_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xstormy16.h
+DEP_xtensa_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
+ $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
+ $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xtensa.h \
+ $(INCDIR)/xtensa-config.h
DEP_z8k_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-z8k.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(INCDIR)/coff/z8k.h \
$(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h
diff --git a/gas/Makefile.in b/gas/Makefile.in
index 75e8767e54..9f18f7fbdf 100644
--- a/gas/Makefile.in
+++ b/gas/Makefile.in
@@ -1,4 +1,4 @@
-# Makefile.in generated automatically by automake 1.4-p6 from Makefile.am
+# Makefile.in generated automatically by automake 1.4-p5 from Makefile.am
# Copyright (C) 1994, 1995-8, 1999, 2001 Free Software Foundation, Inc.
# This Makefile.in is free software; the Free Software Foundation
@@ -197,6 +197,7 @@ CPU_TYPES = \
w65 \
v850 \
xstormy16 \
+ xtensa \
z8k
@@ -395,6 +396,7 @@ TARGET_CPU_CFILES = \
config/tc-w65.c \
config/tc-v850.c \
config/tc-xstormy16.c \
+ config/tc-xtensa.c \
config/tc-z8k.c
@@ -447,6 +449,7 @@ TARGET_CPU_HFILES = \
config/tc-w65.h \
config/tc-v850.h \
config/tc-xstormy16.h \
+ config/tc-xtensa.h \
config/tc-z8k.h
@@ -1333,6 +1336,14 @@ DEPTC_xstormy16_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(INCDIR)/opcode/cgen.h $(srcdir)/../opcodes/xstormy16-opc.h \
cgen.h
+DEPTC_xtensa_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
+ $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
+ $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xtensa.h \
+ $(INCDIR)/xtensa-config.h sb.h $(INCDIR)/safe-ctype.h \
+ subsegs.h $(INCDIR)/obstack.h $(srcdir)/config/xtensa-relax.h \
+ $(INCDIR)/xtensa-isa.h $(srcdir)/config/xtensa-istack.h \
+ dwarf2dbg.h struc-symbol.h
+
DEPTC_z8k_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-z8k.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/z8k.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h \
@@ -1822,8 +1833,8 @@ DEPOBJ_sh64_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-sh64.h \
$(srcdir)/config/tc-sh.h $(INCDIR)/elf/sh.h $(INCDIR)/elf/reloc-macros.h \
- $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
- struc-symbol.h $(INCDIR)/aout/aout64.h
+ $(BFDDIR)/elf32-sh64.h $(INCDIR)/safe-ctype.h subsegs.h \
+ $(INCDIR)/obstack.h struc-symbol.h $(INCDIR)/aout/aout64.h
DEPOBJ_sparc_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \
$(srcdir)/config/tc-sparc.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \
@@ -1956,6 +1967,12 @@ DEPOBJ_xstormy16_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
struc-symbol.h $(INCDIR)/aout/aout64.h
+DEPOBJ_xtensa_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
+ $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
+ $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xtensa.h \
+ $(INCDIR)/xtensa-config.h $(INCDIR)/safe-ctype.h subsegs.h \
+ $(INCDIR)/obstack.h struc-symbol.h $(INCDIR)/aout/aout64.h
+
DEPOBJ_z8k_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \
$(srcdir)/config/tc-z8k.h $(INCDIR)/coff/internal.h \
$(INCDIR)/coff/z8k.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h \
@@ -2411,6 +2428,11 @@ DEP_xstormy16_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
$(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xstormy16.h
+DEP_xtensa_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
+ $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
+ $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xtensa.h \
+ $(INCDIR)/xtensa-config.h
+
DEP_z8k_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-z8k.h \
$(INCDIR)/symcat.h $(INCDIR)/coff/internal.h $(INCDIR)/coff/z8k.h \
$(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h
@@ -2471,7 +2493,7 @@ configure configure.in gdbinit.in itbl-lex.c itbl-parse.c
DISTFILES = $(DIST_COMMON) $(SOURCES) $(HEADERS) $(TEXINFOS) $(EXTRA_DIST)
-TAR = tar
+TAR = gtar
GZIP_ENV = --best
SOURCES = $(itbl_test_SOURCES) $(as_new_SOURCES) $(EXTRA_as_new_SOURCES)
OBJECTS = $(itbl_test_OBJECTS) $(as_new_OBJECTS)
@@ -2807,7 +2829,7 @@ distclean-generic:
-test -z "$(DISTCLEANFILES)" || rm -f $(DISTCLEANFILES)
maintainer-clean-generic:
- -test -z "itbl-lex.cconfig/m68k-parse.hconfig/m68k-parse.citbl-parse.hitbl-parse.c" || rm -f itbl-lex.c config/m68k-parse.h config/m68k-parse.c itbl-parse.h itbl-parse.c
+ -test -z "itbl-lexlconfig/m68k-parsehconfig/m68k-parsecitbl-parsehitbl-parsec" || rm -f itbl-lexl config/m68k-parseh config/m68k-parsec itbl-parseh itbl-parsec
mostlyclean-am: mostlyclean-hdr mostlyclean-noinstPROGRAMS \
mostlyclean-compile mostlyclean-libtool \
mostlyclean-tags mostlyclean-generic
@@ -2955,6 +2977,9 @@ e-crisaout.o: $(srcdir)/config/e-crisaout.c
e-criself.o: $(srcdir)/config/e-criself.c
$(COMPILE) -c $(srcdir)/config/e-criself.c
+xtensa-relax.o: $(srcdir)/config/xtensa-relax.c
+ $(COMPILE) -c $(srcdir)/config/xtensa-relax.c
+
# If m68k-parse.y is in a different directory, then ylwrap will use an
# absolute path when it invokes yacc, which will cause yacc to put the
# absolute path into the generated file. That's a pain when it comes
diff --git a/gas/config/tc-xtensa.c b/gas/config/tc-xtensa.c
new file mode 100644
index 0000000000..32a04beb3d
--- /dev/null
+++ b/gas/config/tc-xtensa.c
@@ -0,0 +1,9014 @@
+/* tc-xtensa.c -- Assemble Xtensa instructions.
+ Copyright 2003 Free Software Foundation, Inc.
+
+ This file is part of GAS, the GNU Assembler.
+
+ GAS is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2, or (at your option)
+ any later version.
+
+ GAS is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GAS; see the file COPYING. If not, write to
+ the Free Software Foundation, 59 Temple Place - Suite 330, Boston,
+ MA 02111-1307, USA. */
+
+#include <string.h>
+#include "as.h"
+#include "sb.h"
+#include "safe-ctype.h"
+#include "tc-xtensa.h"
+#include "frags.h"
+#include "subsegs.h"
+#include "xtensa-relax.h"
+#include "xtensa-istack.h"
+#include "dwarf2dbg.h"
+#include "struc-symbol.h"
+#include "xtensa-config.h"
+
+#ifndef uint32
+#define uint32 unsigned int
+#endif
+#ifndef int32
+#define int32 signed int
+#endif
+
+/* Notes:
+
+ There are 3 forms for instructions,
+ 1) the MEMORY format -- this is the encoding 2 or 3 byte instruction
+ 2) the TInsn -- handles instructions/labels and literals;
+ all operands are assumed to be expressions
+ 3) the IStack -- a stack of TInsn. this allows us to
+ reason about the generated expansion instructions
+
+ Naming conventions (used somewhat inconsistently):
+ The xtensa_ functions are exported
+ The xg_ functions are internal
+
+ We also have a couple of different extensibility mechanisms.
+ 1) The idiom replacement:
+ This is used when a line is first parsed to
+ replace an instruction pattern with another instruction
+ It is currently limited to replacements of instructions
+ with constant operands.
+ 2) The xtensa-relax.c mechanism that has stronger instruction
+ replacement patterns. When an instruction's immediate field
+ does not fit the next instruction sequence is attempted.
+ In addition, "narrow" opcodes are supported this way. */
+
+
+/* Define characters with special meanings to GAS. */
+const char comment_chars[] = "#";
+const char line_comment_chars[] = "#";
+const char line_separator_chars[] = ";";
+const char EXP_CHARS[] = "eE";
+const char FLT_CHARS[] = "rRsSfFdDxXpP";
+
+
+/* Flag to indicate whether the hardware supports the density option.
+ If not, enabling density instructions (via directives or --density flag)
+ is illegal. */
+
+#if STATIC_LIBISA
+bfd_boolean density_supported = XCHAL_HAVE_DENSITY;
+#else
+bfd_boolean density_supported = TRUE;
+#endif
+
+#define XTENSA_FETCH_WIDTH 4
+
+/* Flags for properties of the last instruction in a segment. */
+#define FLAG_IS_A0_WRITER 0x1
+#define FLAG_IS_BAD_LOOPEND 0x2
+
+
+/* We define a special segment names ".literal" to place literals
+ into. The .fini and .init sections are special because they
+ contain code that is moved together by the linker. We give them
+ their own special .fini.literal and .init.literal sections. */
+
+#define LITERAL_SECTION_NAME xtensa_section_rename (".literal")
+#define FINI_SECTION_NAME xtensa_section_rename (".fini")
+#define INIT_SECTION_NAME xtensa_section_rename (".init")
+#define FINI_LITERAL_SECTION_NAME xtensa_section_rename (".fini.literal")
+#define INIT_LITERAL_SECTION_NAME xtensa_section_rename (".init.literal")
+
+
+/* This type is used for the directive_stack to keep track of the
+ state of the literal collection pools. */
+
+typedef struct lit_state_struct
+{
+ const char *lit_seg_name;
+ const char *init_lit_seg_name;
+ const char *fini_lit_seg_name;
+ segT lit_seg;
+ segT init_lit_seg;
+ segT fini_lit_seg;
+} lit_state;
+
+static lit_state default_lit_sections;
+
+
+/* We keep lists of literal segments. The seg_list type is the node
+ for such a list. The *_literal_head locals are the heads of the
+ various lists. All of these lists have a dummy node at the start. */
+
+typedef struct seg_list_struct
+{
+ struct seg_list_struct *next;
+ segT seg;
+} seg_list;
+
+static seg_list literal_head_h;
+static seg_list *literal_head = &literal_head_h;
+static seg_list init_literal_head_h;
+static seg_list *init_literal_head = &init_literal_head_h;
+static seg_list fini_literal_head_h;
+static seg_list *fini_literal_head = &fini_literal_head_h;
+
+
+/* Global flag to indicate when we are emitting literals. */
+int generating_literals = 0;
+
+
+/* Structure for saving the current state before emitting literals. */
+typedef struct emit_state_struct
+{
+ const char *name;
+ segT now_seg;
+ subsegT now_subseg;
+ int generating_literals;
+} emit_state;
+
+
+/* Directives. */
+
+typedef enum
+{
+ directive_none = 0,
+ directive_literal,
+ directive_density,
+ directive_generics,
+ directive_relax,
+ directive_freeregs,
+ directive_longcalls,
+ directive_literal_prefix
+} directiveE;
+
+typedef struct
+{
+ const char *name;
+ bfd_boolean can_be_negated;
+} directive_infoS;
+
+const directive_infoS directive_info[] =
+{
+ {"none", FALSE},
+ {"literal", FALSE},
+ {"density", TRUE},
+ {"generics", TRUE},
+ {"relax", TRUE},
+ {"freeregs", FALSE},
+ {"longcalls", TRUE},
+ {"literal_prefix", FALSE}
+};
+
+bfd_boolean directive_state[] =
+{
+ FALSE, /* none */
+ FALSE, /* literal */
+#if STATIC_LIBISA && !XCHAL_HAVE_DENSITY
+ FALSE, /* density */
+#else
+ TRUE, /* density */
+#endif
+ TRUE, /* generics */
+ TRUE, /* relax */
+ FALSE, /* freeregs */
+ FALSE, /* longcalls */
+ FALSE /* literal_prefix */
+};
+
+
+enum xtensa_relax_statesE
+{
+ RELAX_ALIGN_NEXT_OPCODE,
+ /* Use the first opcode of the next fragment to determine the
+ alignment requirements. This is ONLY used for LOOPS
+ currently. */
+
+ RELAX_DESIRE_ALIGN_IF_TARGET,
+ /* These are placed in front of labels. They will all be converted
+ to RELAX_DESIRE_ALIGN / RELAX_LOOP_END or rs_fill of 0 before
+ relaxation begins. */
+
+ RELAX_ADD_NOP_IF_A0_B_RETW,
+ /* These are placed in front of conditional branches. It will be
+ turned into a NOP (using a1) if the branch is immediately
+ followed by a RETW or RETW.N. Otherwise it will be turned into
+ an rs_fill of 0 before relaxation begins. */
+
+ RELAX_ADD_NOP_IF_PRE_LOOP_END,
+ /* These are placed after JX instructions. It will be turned into a
+ NOP if there is one instruction before a loop end label.
+ Otherwise it will be turned into an rs_fill of 0 before
+ relaxation begins. This is used to avoid a hardware TIE
+ interlock issue prior to T1040. */
+
+ RELAX_ADD_NOP_IF_SHORT_LOOP,
+ /* These are placed after LOOP instructions. It will be turned into
+ a NOP when: (1) there are less than 3 instructions in the loop;
+ we place 2 of these in a row to add up to 2 NOPS in short loops;
+ or (2) The instructions in the loop do not include a branch or
+ jump. Otherwise it will be turned into an rs_fill of 0 before
+ relaxation begins. This is used to avoid hardware bug
+ PR3830. */
+
+ RELAX_ADD_NOP_IF_CLOSE_LOOP_END,
+ /* These are placed after LOOP instructions. It will be turned into
+ a NOP if there are less than 12 bytes to the end of some other
+ loop's end. Otherwise it will be turned into an rs_fill of 0
+ before relaxation begins. This is used to avoid hardware bug
+ PR3830. */
+
+ RELAX_DESIRE_ALIGN,
+ /* The next fragment like its first instruction to NOT cross a
+ 4-byte boundary. */
+
+ RELAX_LOOP_END,
+ /* This will be turned into a NOP or NOP.N if the previous
+ instruction is expanded to negate a loop. */
+
+ RELAX_LOOP_END_ADD_NOP,
+ /* When the code density option is available, this will generate a
+ NOP.N marked RELAX_NARROW. Otherwise, it will create an rs_fill
+ fragment with a NOP in it. */
+
+ RELAX_LITERAL,
+ /* Another fragment could generate an expansion here but has not yet. */
+
+ RELAX_LITERAL_NR,
+ /* Expansion has been generated by an instruction that generates a
+ literal. However, the stretch has NOT been reported yet in this
+ fragment. */
+
+ RELAX_LITERAL_FINAL,
+ /* Expansion has been generated by an instruction that generates a
+ literal. */
+
+ RELAX_LITERAL_POOL_BEGIN,
+ RELAX_LITERAL_POOL_END,
+ /* Technically these are not relaxations at all, but mark a location
+ to store literals later. Note that fr_var stores the frchain for
+ BEGIN frags and fr_var stores now_seg for END frags. */
+
+ RELAX_NARROW,
+ /* The last instruction in this fragment (at->fr_opcode) can be
+ freely replaced with a single wider instruction if a future
+ alignment desires or needs it. */
+
+ RELAX_IMMED,
+ /* The last instruction in this fragment (at->fr_opcode) contains
+ the value defined by fr_symbol (fr_offset = 0). If the value
+ does not fit, use the specified expansion. This is similar to
+ "NARROW", except that these may not be expanded in order to align
+ code. */
+
+ RELAX_IMMED_STEP1,
+ /* The last instruction in this fragment (at->fr_opcode) contains a
+ literal. It has already been expanded at least 1 step. */
+
+ RELAX_IMMED_STEP2
+ /* The last instruction in this fragment (at->fr_opcode) contains a
+ literal. It has already been expanded at least 2 steps. */
+};
+
+/* This is used as a stopper to bound the number of steps that
+ can be taken. */
+#define RELAX_IMMED_MAXSTEPS (RELAX_IMMED_STEP2 - RELAX_IMMED)
+
+
+typedef bfd_boolean (*frag_predicate) (const fragS *);
+
+
+/* Directive functions. */
+
+static bfd_boolean use_generics
+ PARAMS ((void));
+static bfd_boolean use_longcalls
+ PARAMS ((void));
+static bfd_boolean code_density_available
+ PARAMS ((void));
+static bfd_boolean can_relax
+ PARAMS ((void));
+static void directive_push
+ PARAMS ((directiveE, bfd_boolean, const void *));
+static void directive_pop
+ PARAMS ((directiveE *, bfd_boolean *, const char **,
+ unsigned int *, const void **));
+static void directive_balance
+ PARAMS ((void));
+static bfd_boolean inside_directive
+ PARAMS ((directiveE));
+static void get_directive
+ PARAMS ((directiveE *, bfd_boolean *));
+static void xtensa_begin_directive
+ PARAMS ((int));
+static void xtensa_end_directive
+ PARAMS ((int));
+static void xtensa_literal_prefix
+ PARAMS ((char const *, int));
+static void xtensa_literal_position
+ PARAMS ((int));
+static void xtensa_literal_pseudo
+ PARAMS ((int));
+
+/* Parsing and Idiom Translation Functions. */
+
+static const char *expression_end
+ PARAMS ((const char *));
+static unsigned tc_get_register
+ PARAMS ((const char *));
+static void expression_maybe_register
+ PARAMS ((xtensa_operand, expressionS *));
+static int tokenize_arguments
+ PARAMS ((char **, char *));
+static bfd_boolean parse_arguments
+ PARAMS ((TInsn *, int, char **));
+static int xg_translate_idioms
+ PARAMS ((char **, int *, char **));
+static int xg_translate_sysreg_op
+ PARAMS ((char **, int *, char **));
+static void xg_reverse_shift_count
+ PARAMS ((char **));
+static int xg_arg_is_constant
+ PARAMS ((char *, offsetT *));
+static void xg_replace_opname
+ PARAMS ((char **, char *));
+static int xg_check_num_args
+ PARAMS ((int *, int, char *, char **));
+
+/* Functions for dealing with the Xtensa ISA. */
+
+static bfd_boolean operand_is_immed
+ PARAMS ((xtensa_operand));
+static bfd_boolean operand_is_pcrel_label
+ PARAMS ((xtensa_operand));
+static int get_relaxable_immed
+ PARAMS ((xtensa_opcode));
+static xtensa_opcode get_opcode_from_buf
+ PARAMS ((const char *));
+static bfd_boolean is_direct_call_opcode
+ PARAMS ((xtensa_opcode));
+static bfd_boolean is_call_opcode
+ PARAMS ((xtensa_opcode));
+static bfd_boolean is_entry_opcode
+ PARAMS ((xtensa_opcode));
+static bfd_boolean is_loop_opcode
+ PARAMS ((xtensa_opcode));
+static bfd_boolean is_the_loop_opcode
+ PARAMS ((xtensa_opcode));
+static bfd_boolean is_jx_opcode
+ PARAMS ((xtensa_opcode));
+static bfd_boolean is_windowed_return_opcode
+ PARAMS ((xtensa_opcode));
+static bfd_boolean is_conditional_branch_opcode
+ PARAMS ((xtensa_opcode));
+static bfd_boolean is_branch_or_jump_opcode
+ PARAMS ((xtensa_opcode));
+static bfd_reloc_code_real_type opnum_to_reloc
+ PARAMS ((int));
+static int reloc_to_opnum
+ PARAMS ((bfd_reloc_code_real_type));
+static void xtensa_insnbuf_set_operand
+ PARAMS ((xtensa_insnbuf, xtensa_opcode, xtensa_operand, int32,
+ const char *, unsigned int));
+static uint32 xtensa_insnbuf_get_operand
+ PARAMS ((xtensa_insnbuf, xtensa_opcode, int));
+static void xtensa_insnbuf_set_immediate_field
+ PARAMS ((xtensa_opcode, xtensa_insnbuf, int32, const char *,
+ unsigned int));
+static bfd_boolean is_negatable_branch
+ PARAMS ((TInsn *));
+
+/* Functions for Internal Lists of Symbols. */
+static void xtensa_define_label
+ PARAMS ((symbolS *));
+static void add_target_symbol
+ PARAMS ((symbolS *, bfd_boolean));
+static symbolS *xtensa_find_label
+ PARAMS ((fragS *, offsetT, bfd_boolean));
+static void map_over_defined_symbols
+ PARAMS ((void (*fn) (symbolS *)));
+static bfd_boolean is_loop_target_label
+ PARAMS ((symbolS *));
+static void xtensa_mark_target_fragments
+ PARAMS ((void));
+
+/* Various Other Internal Functions. */
+
+static bfd_boolean is_unique_insn_expansion
+ PARAMS ((TransitionRule *));
+static int xg_get_insn_size
+ PARAMS ((TInsn *));
+static int xg_get_build_instr_size
+ PARAMS ((BuildInstr *));
+static bfd_boolean xg_is_narrow_insn
+ PARAMS ((TInsn *));
+static bfd_boolean xg_is_single_relaxable_insn
+ PARAMS ((TInsn *));
+static int xg_get_max_narrow_insn_size
+ PARAMS ((xtensa_opcode));
+static int xg_get_max_insn_widen_size
+ PARAMS ((xtensa_opcode));
+static int xg_get_max_insn_widen_literal_size
+ PARAMS ((xtensa_opcode));
+static bfd_boolean xg_is_relaxable_insn
+ PARAMS ((TInsn *, int));
+static symbolS *get_special_literal_symbol
+ PARAMS ((void));
+static symbolS *get_special_label_symbol
+ PARAMS ((void));
+static bfd_boolean xg_build_to_insn
+ PARAMS ((TInsn *, TInsn *, BuildInstr *));
+static bfd_boolean xg_build_to_stack
+ PARAMS ((IStack *, TInsn *, BuildInstr *));
+static bfd_boolean xg_expand_to_stack
+ PARAMS ((IStack *, TInsn *, int));
+static bfd_boolean xg_expand_narrow
+ PARAMS ((TInsn *, TInsn *));
+static bfd_boolean xg_immeds_fit
+ PARAMS ((const TInsn *));
+static bfd_boolean xg_symbolic_immeds_fit
+ PARAMS ((const TInsn *, segT, fragS *, offsetT, long));
+static bfd_boolean xg_check_operand
+ PARAMS ((int32, xtensa_operand));
+static int is_dnrange
+ PARAMS ((fragS *, symbolS *, long));
+static int xg_assembly_relax
+ PARAMS ((IStack *, TInsn *, segT, fragS *, offsetT, int, long));
+static void xg_force_frag_space
+ PARAMS ((int));
+static void xg_finish_frag
+ PARAMS ((char *, enum xtensa_relax_statesE, int, bfd_boolean));
+static bfd_boolean is_branch_jmp_to_next
+ PARAMS ((TInsn *, fragS *));
+static void xg_add_branch_and_loop_targets
+ PARAMS ((TInsn *));
+static bfd_boolean xg_instruction_matches_rule
+ PARAMS ((TInsn *, TransitionRule *));
+static TransitionRule *xg_instruction_match
+ PARAMS ((TInsn *));
+static bfd_boolean xg_build_token_insn
+ PARAMS ((BuildInstr *, TInsn *, TInsn *));
+static bfd_boolean xg_simplify_insn
+ PARAMS ((TInsn *, TInsn *));
+static bfd_boolean xg_expand_assembly_insn
+ PARAMS ((IStack *, TInsn *));
+static symbolS *xg_assemble_literal
+ PARAMS ((TInsn *));
+static void xg_assemble_literal_space
+ PARAMS ((int));
+static symbolS *xtensa_create_literal_symbol
+ PARAMS ((segT, fragS *));
+static symbolS *xtensa_create_local_symbol
+ PARAMS ((bfd *, const char *, segT, valueT, fragS *));
+static bfd_boolean get_is_linkonce_section
+ PARAMS ((bfd *, segT));
+static bfd_boolean xg_emit_insn
+ PARAMS ((TInsn *, bfd_boolean));
+static bfd_boolean xg_emit_insn_to_buf
+ PARAMS ((TInsn *, char *, fragS *, offsetT, bfd_boolean));
+static bfd_boolean xg_add_opcode_fix
+ PARAMS ((xtensa_opcode, int, expressionS *, fragS *, offsetT));
+static void xg_resolve_literals
+ PARAMS ((TInsn *, symbolS *));
+static void xg_resolve_labels
+ PARAMS ((TInsn *, symbolS *));
+static void xg_assemble_tokens
+ PARAMS ((TInsn *));
+static bfd_boolean is_register_writer
+ PARAMS ((const TInsn *, const char *, int));
+static bfd_boolean is_bad_loopend_opcode
+ PARAMS ((const TInsn *));
+static bfd_boolean is_unaligned_label
+ PARAMS ((symbolS *));
+static fragS *next_non_empty_frag
+ PARAMS ((const fragS *));
+static xtensa_opcode next_frag_opcode
+ PARAMS ((const fragS *));
+static void update_next_frag_nop_state
+ PARAMS ((fragS *));
+static bfd_boolean next_frag_is_branch_target
+ PARAMS ((const fragS *));
+static bfd_boolean next_frag_is_loop_target
+ PARAMS ((const fragS *));
+static addressT next_frag_pre_opcode_bytes
+ PARAMS ((const fragS *));
+static bfd_boolean is_next_frag_target
+ PARAMS ((const fragS *, const fragS *));
+static void xtensa_mark_literal_pool_location
+ PARAMS ((bfd_boolean));
+static void xtensa_move_labels
+ PARAMS ((fragS *, valueT, fragS *, valueT));
+static void assemble_nop
+ PARAMS ((size_t, char *));
+static addressT get_expanded_loop_offset
+ PARAMS ((xtensa_opcode));
+static fragS *get_literal_pool_location
+ PARAMS ((segT));
+static void set_literal_pool_location
+ PARAMS ((segT, fragS *));
+
+/* Helpers for xtensa_end(). */
+
+static void xtensa_cleanup_align_frags
+ PARAMS ((void));
+static void xtensa_fix_target_frags
+ PARAMS ((void));
+static bfd_boolean frag_can_negate_branch
+ PARAMS ((fragS *));
+static void xtensa_fix_a0_b_retw_frags
+ PARAMS ((void));
+static bfd_boolean next_instrs_are_b_retw
+ PARAMS ((fragS *));
+static void xtensa_fix_b_j_loop_end_frags
+ PARAMS ((void));
+static bfd_boolean next_instr_is_loop_end
+ PARAMS ((fragS *));
+static void xtensa_fix_close_loop_end_frags
+ PARAMS ((void));
+static size_t min_bytes_to_other_loop_end
+ PARAMS ((fragS *, fragS *, offsetT, size_t));
+static size_t unrelaxed_frag_min_size
+ PARAMS ((fragS *));
+static void xtensa_fix_short_loop_frags
+ PARAMS ((void));
+static size_t count_insns_to_loop_end
+ PARAMS ((fragS *, bfd_boolean, size_t));
+static size_t unrelaxed_frag_min_insn_count
+ PARAMS ((fragS *));
+static bfd_boolean branch_before_loop_end
+ PARAMS ((fragS *));
+static bfd_boolean unrelaxed_frag_has_b_j
+ PARAMS ((fragS *));
+static void xtensa_sanity_check
+ PARAMS ((void));
+static bfd_boolean is_empty_loop
+ PARAMS ((const TInsn *, fragS *));
+static bfd_boolean is_local_forward_loop
+ PARAMS ((const TInsn *, fragS *));
+
+/* Alignment Functions. */
+
+static size_t get_text_align_power
+ PARAMS ((int));
+static addressT get_text_align_max_fill_size
+ PARAMS ((int, bfd_boolean, bfd_boolean));
+static addressT get_text_align_fill_size
+ PARAMS ((addressT, int, int, bfd_boolean, bfd_boolean));
+static size_t get_text_align_nop_count
+ PARAMS ((size_t, bfd_boolean));
+static size_t get_text_align_nth_nop_size
+ PARAMS ((size_t, size_t, bfd_boolean));
+static addressT get_noop_aligned_address
+ PARAMS ((fragS *, addressT));
+static addressT get_widen_aligned_address
+ PARAMS ((fragS *, addressT));
+
+/* Helpers for xtensa_relax_frag(). */
+
+static long relax_frag_text_align
+ PARAMS ((fragS *, long));
+static long relax_frag_add_nop
+ PARAMS ((fragS *));
+static long relax_frag_narrow
+ PARAMS ((fragS *, long));
+static bfd_boolean future_alignment_required
+ PARAMS ((fragS *, long));
+static long relax_frag_immed
+ PARAMS ((segT, fragS *, long, int, int *));
+
+/* Helpers for md_convert_frag(). */
+
+static void convert_frag_align_next_opcode
+ PARAMS ((fragS *));
+static void convert_frag_narrow
+ PARAMS ((fragS *));
+static void convert_frag_immed
+ PARAMS ((segT, fragS *, int));
+static fixS *fix_new_exp_in_seg
+ PARAMS ((segT, subsegT, fragS *, int, int, expressionS *, int,
+ bfd_reloc_code_real_type));
+static void convert_frag_immed_finish_loop
+ PARAMS ((segT, fragS *, TInsn *));
+static offsetT get_expression_value
+ PARAMS ((segT, expressionS *));
+
+/* Flags for the Last Instruction in Each Subsegment. */
+
+static unsigned get_last_insn_flags
+ PARAMS ((segT, subsegT));
+static void set_last_insn_flags
+ PARAMS ((segT, subsegT, unsigned, bfd_boolean));
+
+/* Segment list functions. */
+
+static void xtensa_remove_section
+ PARAMS ((segT));
+static void xtensa_insert_section
+ PARAMS ((segT, segT));
+static void xtensa_move_seg_list_to_beginning
+ PARAMS ((seg_list *));
+static void xtensa_move_literals
+ PARAMS ((void));
+static void xtensa_move_frag_symbol
+ PARAMS ((symbolS *));
+static void xtensa_move_frag_symbols
+ PARAMS ((void));
+static void xtensa_reorder_seg_list
+ PARAMS ((seg_list *, segT));
+static void xtensa_reorder_segments
+ PARAMS ((void));
+static segT get_last_sec
+ PARAMS ((void));
+static void xtensa_switch_to_literal_fragment
+ PARAMS ((emit_state *));
+static void xtensa_switch_section_emit_state
+ PARAMS ((emit_state *, segT, subsegT));
+static void xtensa_restore_emit_state
+ PARAMS ((emit_state *));
+static void cache_literal_section
+ PARAMS ((seg_list *, const char *, segT *));
+static segT retrieve_literal_seg
+ PARAMS ((seg_list *, const char *));
+static segT seg_present
+ PARAMS ((const char *));
+static void add_seg_list
+ PARAMS ((seg_list *, segT));
+
+/* Property Table (e.g., ".xt.insn" and ".xt.lit") Functions. */
+
+static void xtensa_create_property_segments
+ PARAMS ((frag_predicate, const char *, xt_section_type));
+static segment_info_type *retrieve_segment_info
+ PARAMS ((segT));
+static segT retrieve_xtensa_section
+ PARAMS ((char *));
+static bfd_boolean section_has_property
+ PARAMS ((segT sec, frag_predicate));
+static void add_xt_block_frags
+ PARAMS ((segT, segT, xtensa_block_info **, frag_predicate));
+static bfd_boolean get_frag_is_literal
+ PARAMS ((const fragS *));
+static bfd_boolean get_frag_is_insn
+ PARAMS ((const fragS *));
+
+/* Import from elf32-xtensa.c in BFD library. */
+extern char *xtensa_get_property_section_name
+ PARAMS ((bfd *, asection *, const char *));
+
+/* TInsn and IStack functions. */
+static bfd_boolean tinsn_has_symbolic_operands
+ PARAMS ((const TInsn *));
+static bfd_boolean tinsn_has_invalid_symbolic_operands
+ PARAMS ((const TInsn *));
+static bfd_boolean tinsn_has_complex_operands
+ PARAMS ((const TInsn *));
+static bfd_boolean tinsn_to_insnbuf
+ PARAMS ((TInsn *, xtensa_insnbuf));
+static bfd_boolean tinsn_check_arguments
+ PARAMS ((const TInsn *));
+static void tinsn_from_chars
+ PARAMS ((TInsn *, char *));
+static void tinsn_immed_from_frag
+ PARAMS ((TInsn *, fragS *));
+static int get_num_stack_text_bytes
+ PARAMS ((IStack *));
+static int get_num_stack_literal_bytes
+ PARAMS ((IStack *));
+
+/* Expression Utilities. */
+bfd_boolean expr_is_const
+ PARAMS ((const expressionS *));
+offsetT get_expr_const
+ PARAMS ((const expressionS *));
+void set_expr_const
+ PARAMS ((expressionS *, offsetT));
+void set_expr_symbol_offset
+ PARAMS ((expressionS *, symbolS *, offsetT));
+bfd_boolean expr_is_equal
+ PARAMS ((expressionS *, expressionS *));
+static void copy_expr
+ PARAMS ((expressionS *, const expressionS *));
+
+#ifdef XTENSA_SECTION_RENAME
+static void build_section_rename
+ PARAMS ((const char *));
+static void add_section_rename
+ PARAMS ((char *, char *));
+#endif
+
+#ifdef XTENSA_COMBINE_LITERALS
+static void find_lit_sym_translation
+ PARAMS ((expressionS *));
+static void add_lit_sym_translation
+ PARAMS ((char *, offsetT, symbolS *));
+#endif
+
+
+/* ISA imported from bfd. */
+extern xtensa_isa xtensa_default_isa;
+
+extern int target_big_endian;
+
+static xtensa_opcode xtensa_addi_opcode;
+static xtensa_opcode xtensa_addmi_opcode;
+static xtensa_opcode xtensa_call0_opcode;
+static xtensa_opcode xtensa_call4_opcode;
+static xtensa_opcode xtensa_call8_opcode;
+static xtensa_opcode xtensa_call12_opcode;
+static xtensa_opcode xtensa_callx0_opcode;
+static xtensa_opcode xtensa_callx4_opcode;
+static xtensa_opcode xtensa_callx8_opcode;
+static xtensa_opcode xtensa_callx12_opcode;
+static xtensa_opcode xtensa_entry_opcode;
+static xtensa_opcode xtensa_isync_opcode;
+static xtensa_opcode xtensa_j_opcode;
+static xtensa_opcode xtensa_jx_opcode;
+static xtensa_opcode xtensa_loop_opcode;
+static xtensa_opcode xtensa_loopnez_opcode;
+static xtensa_opcode xtensa_loopgtz_opcode;
+static xtensa_opcode xtensa_nop_n_opcode;
+static xtensa_opcode xtensa_or_opcode;
+static xtensa_opcode xtensa_ret_opcode;
+static xtensa_opcode xtensa_ret_n_opcode;
+static xtensa_opcode xtensa_retw_opcode;
+static xtensa_opcode xtensa_retw_n_opcode;
+static xtensa_opcode xtensa_rsr_opcode;
+static xtensa_opcode xtensa_waiti_opcode;
+
+
+/* Command-line Options. */
+
+bfd_boolean use_literal_section = TRUE;
+static bfd_boolean align_targets = TRUE;
+static bfd_boolean align_only_targets = FALSE;
+static bfd_boolean software_a0_b_retw_interlock = TRUE;
+static bfd_boolean has_a0_b_retw = FALSE;
+static bfd_boolean workaround_a0_b_retw = TRUE;
+
+static bfd_boolean software_avoid_b_j_loop_end = TRUE;
+static bfd_boolean workaround_b_j_loop_end = TRUE;
+static bfd_boolean maybe_has_b_j_loop_end = FALSE;
+
+static bfd_boolean software_avoid_short_loop = TRUE;
+static bfd_boolean workaround_short_loop = TRUE;
+static bfd_boolean maybe_has_short_loop = FALSE;
+
+static bfd_boolean software_avoid_close_loop_end = TRUE;
+static bfd_boolean workaround_close_loop_end = TRUE;
+static bfd_boolean maybe_has_close_loop_end = FALSE;
+
+/* When avoid_short_loops is true, all loops with early exits must
+ have at least 3 instructions. avoid_all_short_loops is a modifier
+ to the avoid_short_loop flag. In addition to the avoid_short_loop
+ actions, all straightline loopgtz and loopnez must have at least 3
+ instructions. */
+
+static bfd_boolean software_avoid_all_short_loops = TRUE;
+static bfd_boolean workaround_all_short_loops = TRUE;
+
+/* This is on a per-instruction basis. */
+static bfd_boolean specific_opcode = FALSE;
+
+enum
+{
+ option_density = OPTION_MD_BASE,
+ option_no_density,
+
+ option_relax,
+ option_no_relax,
+
+ option_generics,
+ option_no_generics,
+
+ option_text_section_literals,
+ option_no_text_section_literals,
+
+ option_align_targets,
+ option_no_align_targets,
+
+ option_align_only_targets,
+ option_no_align_only_targets,
+
+ option_longcalls,
+ option_no_longcalls,
+
+ option_workaround_a0_b_retw,
+ option_no_workaround_a0_b_retw,
+
+ option_workaround_b_j_loop_end,
+ option_no_workaround_b_j_loop_end,
+
+ option_workaround_short_loop,
+ option_no_workaround_short_loop,
+
+ option_workaround_all_short_loops,
+ option_no_workaround_all_short_loops,
+
+ option_workaround_close_loop_end,
+ option_no_workaround_close_loop_end,
+
+ option_no_workarounds,
+
+#ifdef XTENSA_SECTION_RENAME
+ option_literal_section_name,
+ option_text_section_name,
+ option_data_section_name,
+ option_bss_section_name,
+ option_rename_section_name,
+#endif
+
+ option_eb,
+ option_el
+};
+
+const char *md_shortopts = "";
+
+struct option md_longopts[] =
+{
+ {"density", no_argument, NULL, option_density},
+ {"no-density", no_argument, NULL, option_no_density},
+ /* At least as early as alameda, --[no-]relax didn't work as
+ documented, so as of albany, --[no-]relax is equivalent to
+ --[no-]generics. Both of these will be deprecated in
+ BearValley. */
+ {"relax", no_argument, NULL, option_generics},
+ {"no-relax", no_argument, NULL, option_no_generics},
+ {"generics", no_argument, NULL, option_generics},
+ {"no-generics", no_argument, NULL, option_no_generics},
+ {"text-section-literals", no_argument, NULL, option_text_section_literals},
+ {"no-text-section-literals", no_argument, NULL,
+ option_no_text_section_literals},
+ /* This option was changed from -align-target to -target-align
+ because it conflicted with the "-al" option. */
+ {"target-align", no_argument, NULL, option_align_targets},
+ {"no-target-align", no_argument, NULL,
+ option_no_align_targets},
+#if 0
+ /* This option should do a better job aligning targets because
+ it will only attempt to align targets that are the target of a
+ branch. */
+ { "target-align-only", no_argument, NULL, option_align_only_targets },
+ { "no-target-align-only", no_argument, NULL, option_no_align_only_targets },
+#endif /* 0 */
+ {"longcalls", no_argument, NULL, option_longcalls},
+ {"no-longcalls", no_argument, NULL, option_no_longcalls},
+
+ {"no-workaround-a0-b-retw", no_argument, NULL,
+ option_no_workaround_a0_b_retw},
+ {"workaround-a0-b-retw", no_argument, NULL, option_workaround_a0_b_retw},
+
+ {"no-workaround-b-j-loop-end", no_argument, NULL,
+ option_no_workaround_b_j_loop_end},
+ {"workaround-b-j-loop-end", no_argument, NULL,
+ option_workaround_b_j_loop_end},
+
+ {"no-workaround-short-loops", no_argument, NULL,
+ option_no_workaround_short_loop},
+ {"workaround-short-loops", no_argument, NULL, option_workaround_short_loop},
+
+ {"no-workaround-all-short-loops", no_argument, NULL,
+ option_no_workaround_all_short_loops},
+ {"workaround-all-short-loop", no_argument, NULL,
+ option_workaround_all_short_loops},
+
+ {"no-workaround-close-loop-end", no_argument, NULL,
+ option_no_workaround_close_loop_end},
+ {"workaround-close-loop-end", no_argument, NULL,
+ option_workaround_close_loop_end},
+
+ {"no-workarounds", no_argument, NULL, option_no_workarounds},
+
+#ifdef XTENSA_SECTION_RENAME
+ {"literal-section-name", required_argument, NULL,
+ option_literal_section_name},
+ {"text-section-name", required_argument, NULL,
+ option_text_section_name},
+ {"data-section-name", required_argument, NULL,
+ option_data_section_name},
+ {"rename-section", required_argument, NULL,
+ option_rename_section_name},
+ {"bss-section-name", required_argument, NULL,
+ option_bss_section_name},
+#endif /* XTENSA_SECTION_RENAME */
+
+ {NULL, no_argument, NULL, 0}
+};
+
+size_t md_longopts_size = sizeof md_longopts;
+
+
+int
+md_parse_option (c, arg)
+ int c;
+ char *arg;
+{
+ switch (c)
+ {
+ case option_density:
+ if (!density_supported)
+ {
+ as_bad (_("'--density' option not supported in this Xtensa "
+ "configuration"));
+ return 0;
+ }
+ directive_state[directive_density] = TRUE;
+ return 1;
+ case option_no_density:
+ directive_state[directive_density] = FALSE;
+ return 1;
+ case option_generics:
+ directive_state[directive_generics] = TRUE;
+ return 1;
+ case option_no_generics:
+ directive_state[directive_generics] = FALSE;
+ return 1;
+ case option_longcalls:
+ directive_state[directive_longcalls] = TRUE;
+ return 1;
+ case option_no_longcalls:
+ directive_state[directive_longcalls] = FALSE;
+ return 1;
+ case option_text_section_literals:
+ use_literal_section = FALSE;
+ return 1;
+ case option_no_text_section_literals:
+ use_literal_section = TRUE;
+ return 1;
+ case option_workaround_a0_b_retw:
+ workaround_a0_b_retw = TRUE;
+ software_a0_b_retw_interlock = TRUE;
+ return 1;
+ case option_no_workaround_a0_b_retw:
+ workaround_a0_b_retw = FALSE;
+ software_a0_b_retw_interlock = FALSE;
+ return 1;
+ case option_workaround_b_j_loop_end:
+ workaround_b_j_loop_end = TRUE;
+ software_avoid_b_j_loop_end = TRUE;
+ return 1;
+ case option_no_workaround_b_j_loop_end:
+ workaround_b_j_loop_end = FALSE;
+ software_avoid_b_j_loop_end = FALSE;
+ return 1;
+
+ case option_workaround_short_loop:
+ workaround_short_loop = TRUE;
+ software_avoid_short_loop = TRUE;
+ return 1;
+ case option_no_workaround_short_loop:
+ workaround_short_loop = FALSE;
+ software_avoid_short_loop = FALSE;
+ return 1;
+
+ case option_workaround_all_short_loops:
+ workaround_all_short_loops = TRUE;
+ software_avoid_all_short_loops = TRUE;
+ return 1;
+ case option_no_workaround_all_short_loops:
+ workaround_all_short_loops = FALSE;
+ software_avoid_all_short_loops = FALSE;
+ return 1;
+
+ case option_workaround_close_loop_end:
+ workaround_close_loop_end = TRUE;
+ software_avoid_close_loop_end = TRUE;
+ return 1;
+ case option_no_workaround_close_loop_end:
+ workaround_close_loop_end = FALSE;
+ software_avoid_close_loop_end = FALSE;
+ return 1;
+
+ case option_no_workarounds:
+ workaround_a0_b_retw = FALSE;
+ software_a0_b_retw_interlock = FALSE;
+ workaround_b_j_loop_end = FALSE;
+ software_avoid_b_j_loop_end = FALSE;
+ workaround_short_loop = FALSE;
+ software_avoid_short_loop = FALSE;
+ workaround_all_short_loops = FALSE;
+ software_avoid_all_short_loops = FALSE;
+ workaround_close_loop_end = FALSE;
+ software_avoid_close_loop_end = FALSE;
+ return 1;
+
+ case option_align_targets:
+ align_targets = TRUE;
+ return 1;
+ case option_no_align_targets:
+ align_targets = FALSE;
+ return 1;
+
+ case option_align_only_targets:
+ align_only_targets = TRUE;
+ return 1;
+ case option_no_align_only_targets:
+ align_only_targets = FALSE;
+ return 1;
+
+#ifdef XTENSA_SECTION_RENAME
+ case option_literal_section_name:
+ add_section_rename (".literal", arg);
+ as_warn (_("'--literal-section-name' is deprecated; "
+ "use '--rename-section .literal=NEWNAME'"));
+ return 1;
+
+ case option_text_section_name:
+ add_section_rename (".text", arg);
+ as_warn (_("'--text-section-name' is deprecated; "
+ "use '--rename-section .text=NEWNAME'"));
+ return 1;
+
+ case option_data_section_name:
+ add_section_rename (".data", arg);
+ as_warn (_("'--data-section-name' is deprecated; "
+ "use '--rename-section .data=NEWNAME'"));
+ return 1;
+
+ case option_bss_section_name:
+ add_section_rename (".bss", arg);
+ as_warn (_("'--bss-section-name' is deprecated; "
+ "use '--rename-section .bss=NEWNAME'"));
+ return 1;
+
+ case option_rename_section_name:
+ build_section_rename (arg);
+ return 1;
+#endif /* XTENSA_SECTION_RENAME */
+
+ case 'Q':
+ /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
+ should be emitted or not. FIXME: Not implemented. */
+ return 1;
+
+ default:
+ return 0;
+ }
+}
+
+
+void
+md_show_usage (stream)
+ FILE *stream;
+{
+ fputs ("\nXtensa options:\n"
+ "--[no-]density [Do not] emit density instructions\n"
+ "--[no-]relax [Do not] perform branch relaxation\n"
+ "--[no-]generics [Do not] transform instructions\n"
+ "--[no-]longcalls [Do not] emit 32-bit call sequences\n"
+ "--[no-]target-align [Do not] try to align branch targets\n"
+ "--[no-]text-section-literals\n"
+ " [Do not] put literals in the text section\n"
+ "--no-workarounds Do not use any Xtensa workarounds\n"
+#ifdef XTENSA_SECTION_RENAME
+ "--rename-section old=new(:old1=new1)*\n"
+ " Rename section 'old' to 'new'\n"
+ "\nThe following Xtensa options are deprecated\n"
+ "--literal-section-name Name of literal section (default .literal)\n"
+ "--text-section-name Name of text section (default .text)\n"
+ "--data-section-name Name of data section (default .data)\n"
+ "--bss-section-name Name of bss section (default .bss)\n"
+#endif
+ , stream);
+}
+
+
+/* Directive data and functions. */
+
+typedef struct state_stackS_struct
+{
+ directiveE directive;
+ bfd_boolean negated;
+ bfd_boolean old_state;
+ const char *file;
+ unsigned int line;
+ const void *datum;
+ struct state_stackS_struct *prev;
+} state_stackS;
+
+state_stackS *directive_state_stack;
+
+const pseudo_typeS md_pseudo_table[] =
+{
+ {"align", s_align_bytes, 0}, /* Defaulting is invalid (0) */
+ {"literal_position", xtensa_literal_position, 0},
+ {"frame", s_ignore, 0}, /* formerly used for STABS debugging */
+ {"word", cons, 4},
+ {"begin", xtensa_begin_directive, 0},
+ {"end", xtensa_end_directive, 0},
+ {"file", (void (*) PARAMS ((int))) dwarf2_directive_file, 0},
+ {"loc", dwarf2_directive_loc, 0},
+ {"literal", xtensa_literal_pseudo, 0},
+ {NULL, 0, 0},
+};
+
+
+bfd_boolean
+use_generics ()
+{
+ return directive_state[directive_generics];
+}
+
+
+bfd_boolean
+use_longcalls ()
+{
+ return directive_state[directive_longcalls];
+}
+
+
+bfd_boolean
+code_density_available ()
+{
+ return directive_state[directive_density];
+}
+
+
+bfd_boolean
+can_relax ()
+{
+ return use_generics ();
+}
+
+
+static void
+directive_push (directive, negated, datum)
+ directiveE directive;
+ bfd_boolean negated;
+ const void *datum;
+{
+ char *file;
+ unsigned int line;
+ state_stackS *stack = (state_stackS *) xmalloc (sizeof (state_stackS));
+
+ as_where (&file, &line);
+
+ stack->directive = directive;
+ stack->negated = negated;
+ stack->old_state = directive_state[directive];
+ stack->file = file;
+ stack->line = line;
+ stack->datum = datum;
+ stack->prev = directive_state_stack;
+ directive_state_stack = stack;
+
+ directive_state[directive] = !negated;
+}
+
+static void
+directive_pop (directive, negated, file, line, datum)
+ directiveE *directive;
+ bfd_boolean *negated;
+ const char **file;
+ unsigned int *line;
+ const void **datum;
+{
+ state_stackS *top = directive_state_stack;
+
+ if (!directive_state_stack)
+ {
+ as_bad (_("unmatched end directive"));
+ *directive = directive_none;
+ return;
+ }
+
+ directive_state[directive_state_stack->directive] = top->old_state;
+ *directive = top->directive;
+ *negated = top->negated;
+ *file = top->file;
+ *line = top->line;
+ *datum = top->datum;
+ directive_state_stack = top->prev;
+ free (top);
+}
+
+
+static void
+directive_balance ()
+{
+ while (directive_state_stack)
+ {
+ directiveE directive;
+ bfd_boolean negated;
+ const char *file;
+ unsigned int line;
+ const void *datum;
+
+ directive_pop (&directive, &negated, &file, &line, &datum);
+ as_warn_where ((char *) file, line,
+ _(".begin directive with no matching .end directive"));
+ }
+}
+
+
+static bfd_boolean
+inside_directive (dir)
+ directiveE dir;
+{
+ state_stackS *top = directive_state_stack;
+
+ while (top && top->directive != dir)
+ top = top->prev;
+
+ return (top != NULL);
+}
+
+
+static void
+get_directive (directive, negated)
+ directiveE *directive;
+ bfd_boolean *negated;
+{
+ int len;
+ unsigned i;
+
+ if (strncmp (input_line_pointer, "no-", 3) != 0)
+ *negated = FALSE;
+ else
+ {
+ *negated = TRUE;
+ input_line_pointer += 3;
+ }
+
+ len = strspn (input_line_pointer,
+ "abcdefghijklmnopqrstuvwxyz_/0123456789.");
+
+ for (i = 0; i < sizeof (directive_info) / sizeof (*directive_info); ++i)
+ {
+ if (strncmp (input_line_pointer, directive_info[i].name, len) == 0)
+ {
+ input_line_pointer += len;
+ *directive = (directiveE) i;
+ if (*negated && !directive_info[i].can_be_negated)
+ as_bad (_("directive %s can't be negated"),
+ directive_info[i].name);
+ return;
+ }
+ }
+
+ as_bad (_("unknown directive"));
+ *directive = (directiveE) XTENSA_UNDEFINED;
+}
+
+
+static void
+xtensa_begin_directive (ignore)
+ int ignore ATTRIBUTE_UNUSED;
+{
+ directiveE directive;
+ bfd_boolean negated;
+ emit_state *state;
+ int len;
+ lit_state *ls;
+
+ get_directive (&directive, &negated);
+ if (directive == (directiveE) XTENSA_UNDEFINED)
+ {
+ discard_rest_of_line ();
+ return;
+ }
+
+ switch (directive)
+ {
+ case directive_literal:
+ state = (emit_state *) xmalloc (sizeof (emit_state));
+ xtensa_switch_to_literal_fragment (state);
+ directive_push (directive_literal, negated, state);
+ break;
+
+ case directive_literal_prefix:
+ /* Check to see if the current fragment is a literal
+ fragment. If it is, then this operation is not allowed. */
+ if (frag_now->tc_frag_data.is_literal)
+ {
+ as_bad (_("cannot set literal_prefix inside literal fragment"));
+ return;
+ }
+
+ /* Allocate the literal state for this section and push
+ onto the directive stack. */
+ ls = xmalloc (sizeof (lit_state));
+ assert (ls);
+
+ *ls = default_lit_sections;
+
+ directive_push (directive_literal_prefix, negated, ls);
+
+ /* Parse the new prefix from the input_line_pointer. */
+ SKIP_WHITESPACE ();
+ len = strspn (input_line_pointer,
+ "ABCDEFGHIJKLMNOPQRSTUVWXYZ"
+ "abcdefghijklmnopqrstuvwxyz_/0123456789.$");
+
+ /* Process the new prefix. */
+ xtensa_literal_prefix (input_line_pointer, len);
+
+ /* Skip the name in the input line. */
+ input_line_pointer += len;
+ break;
+
+ case directive_freeregs:
+ /* This information is currently unused, but we'll accept the statement
+ and just discard the rest of the line. This won't check the syntax,
+ but it will accept every correct freeregs directive. */
+ input_line_pointer += strcspn (input_line_pointer, "\n");
+ directive_push (directive_freeregs, negated, 0);
+ break;
+
+ case directive_density:
+ if (!density_supported && !negated)
+ {
+ as_warn (_("Xtensa density option not supported; ignored"));
+ break;
+ }
+ /* fall through */
+
+ default:
+ directive_push (directive, negated, 0);
+ break;
+ }
+
+ demand_empty_rest_of_line ();
+}
+
+
+static void
+xtensa_end_directive (ignore)
+ int ignore ATTRIBUTE_UNUSED;
+{
+ directiveE begin_directive, end_directive;
+ bfd_boolean begin_negated, end_negated;
+ const char *file;
+ unsigned int line;
+ emit_state *state;
+ lit_state *s;
+
+ get_directive (&end_directive, &end_negated);
+ if (end_directive == (directiveE) XTENSA_UNDEFINED)
+ {
+ discard_rest_of_line ();
+ return;
+ }
+
+ if (end_directive == directive_density && !density_supported && !end_negated)
+ {
+ as_warn (_("Xtensa density option not supported; ignored"));
+ demand_empty_rest_of_line ();
+ return;
+ }
+
+ directive_pop (&begin_directive, &begin_negated, &file, &line,
+ (const void **) &state);
+
+ if (begin_directive != directive_none)
+ {
+ if (begin_directive != end_directive || begin_negated != end_negated)
+ {
+ as_bad (_("does not match begin %s%s at %s:%d"),
+ begin_negated ? "no-" : "",
+ directive_info[begin_directive].name, file, line);
+ }
+ else
+ {
+ switch (end_directive)
+ {
+ case directive_literal:
+ frag_var (rs_fill, 0, 0, 0, NULL, 0, NULL);
+ xtensa_restore_emit_state (state);
+ free (state);
+ break;
+
+ case directive_freeregs:
+ break;
+
+ case directive_literal_prefix:
+ /* Restore the default collection sections from saved state. */
+ s = (lit_state *) state;
+ assert (s);
+
+ if (use_literal_section)
+ default_lit_sections = *s;
+
+ /* free the state storage */
+ free (s);
+ break;
+
+ default:
+ break;
+ }
+ }
+ }
+
+ demand_empty_rest_of_line ();
+}
+
+
+/* Place an aligned literal fragment at the current location. */
+
+static void
+xtensa_literal_position (ignore)
+ int ignore ATTRIBUTE_UNUSED;
+{
+ if (inside_directive (directive_literal))
+ as_warn (_(".literal_position inside literal directive; ignoring"));
+ else if (!use_literal_section)
+ xtensa_mark_literal_pool_location (FALSE);
+
+ demand_empty_rest_of_line ();
+}
+
+
+/* Support .literal label, value@plt + offset. */
+
+static void
+xtensa_literal_pseudo (ignored)
+ int ignored ATTRIBUTE_UNUSED;
+{
+ emit_state state;
+ char *base_name;
+#ifdef XTENSA_COMBINE_LITERALS
+ char *next_name;
+ symbolS *duplicate;
+ bfd_boolean used_name = FALSE;
+ int offset = 0;
+#endif
+ char c;
+ char *p;
+ expressionS expP;
+ segT dest_seg;
+
+ /* If we are using text-section literals, then this is the right value... */
+ dest_seg = now_seg;
+
+ base_name = input_line_pointer;
+
+ xtensa_switch_to_literal_fragment (&state);
+
+ /* ...but if we aren't using text-section-literals, then we
+ need to put them in the section we just switched to. */
+ if (use_literal_section)
+ dest_seg = now_seg;
+
+ /* All literals are aligned to four-byte boundaries
+ which is handled by switch to literal fragment. */
+ /* frag_align (2, 0, 0); */
+
+ c = get_symbol_end ();
+ /* Just after name is now '\0'. */
+ p = input_line_pointer;
+ *p = c;
+ SKIP_WHITESPACE ();
+
+ if (*input_line_pointer != ',' && *input_line_pointer != ':')
+ {
+ as_bad (_("expected comma or colon after symbol name; "
+ "rest of line ignored"));
+ ignore_rest_of_line ();
+ xtensa_restore_emit_state (&state);
+ return;
+ }
+ *p = 0;
+
+#ifdef XTENSA_COMBINE_LITERALS
+ /* We need next name to start out equal to base_name,
+ but we modify it later to refer to a symbol and an offset. */
+ next_name = xmalloc (strlen (base_name) + 1);
+ strcpy (next_name, base_name);
+
+ /* We need a copy of base_name because we refer to it in the
+ lit_sym_translations and the source is somewhere in the input stream. */
+ base_name = xmalloc (strlen (base_name) + 1);
+ strcpy (base_name, next_name);
+
+#else
+
+ colon (base_name);
+#endif
+
+ do
+ {
+ input_line_pointer++; /* skip ',' or ':' */
+
+ expr (0, &expP);
+
+#ifdef XTENSA_COMBINE_LITERALS
+ duplicate = is_duplicate_literal (&expP, dest_seg);
+ if (duplicate)
+ {
+ add_lit_sym_translation (base_name, offset, duplicate);
+ used_name = TRUE;
+ continue;
+ }
+ colon (next_name);
+#endif
+
+ /* We only support 4-byte literals with .literal. */
+ emit_expr (&expP, 4);
+
+#ifdef XTENSA_COMBINE_LITERALS
+ cache_literal (next_name, &expP, dest_seg);
+ free (next_name);
+
+ if (*input_line_pointer == ',')
+ {
+ offset += 4;
+ next_name = xmalloc (strlen (base_name) +
+ strlen (XTENSA_LIT_PLUS_OFFSET) + 10);
+ sprintf (next_name, "%s%s%d",
+ XTENSA_LIT_PLUS_OFFSET, base_name, offset);
+ }
+#endif
+ }
+ while (*input_line_pointer == ',');
+
+ *p = c;
+#ifdef XTENSA_COMBINE_LITERALS
+ if (!used_name)
+ free (base_name);
+#endif
+
+ demand_empty_rest_of_line ();
+
+ xtensa_restore_emit_state (&state);
+}
+
+
+static void
+xtensa_literal_prefix (start, len)
+ char const *start;
+ int len;
+{
+ segT s_now; /* Storage for the current seg and subseg. */
+ subsegT ss_now;
+ char *name; /* Pointer to the name itself. */
+ char *newname;
+
+ if (!use_literal_section)
+ return;
+
+ /* Store away the current section and subsection. */
+ s_now = now_seg;
+ ss_now = now_subseg;
+
+ /* Get a null-terminated copy of the name. */
+ name = xmalloc (len + 1);
+ assert (name);
+
+ strncpy (name, start, len);
+ name[len] = 0;
+
+ /* Allocate the sections (interesting note: the memory pointing to
+ the name is actually used for the name by the new section). */
+ newname = xmalloc (len + strlen (".literal") + 1);
+ strcpy (newname, name);
+ strcpy (newname + len, ".literal");
+
+ /* Note that retrieve_literal_seg does not create a segment if
+ it already exists. */
+ default_lit_sections.lit_seg = NULL; /* retrieved on demand */
+
+ /* Canonicalizing section names allows renaming literal
+ sections to occur correctly. */
+ default_lit_sections.lit_seg_name =
+ tc_canonicalize_symbol_name (newname);
+
+ free (name);
+
+ /* Restore the current section and subsection and set the
+ generation into the old segment. */
+ subseg_set (s_now, ss_now);
+}
+
+
+/* Parsing and Idiom Translation. */
+
+static const char *
+expression_end (name)
+ const char *name;
+{
+ while (1)
+ {
+ switch (*name)
+ {
+ case ';':
+ case '\0':
+ case ',':
+ return name;
+ case ' ':
+ case '\t':
+ ++name;
+ continue;
+ default:
+ return 0;
+ }
+ }
+}
+
+
+#define ERROR_REG_NUM ((unsigned) -1)
+
+static unsigned
+tc_get_register (prefix)
+ const char *prefix;
+{
+ unsigned reg;
+ const char *next_expr;
+ const char *old_line_pointer;
+
+ SKIP_WHITESPACE ();
+ old_line_pointer = input_line_pointer;
+
+ if (*input_line_pointer == '$')
+ ++input_line_pointer;
+
+ /* Accept "sp" as a synonym for "a1". */
+ if (input_line_pointer[0] == 's' && input_line_pointer[1] == 'p'
+ && expression_end (input_line_pointer + 2))
+ {
+ input_line_pointer += 2;
+ return 1; /* AR[1] */
+ }
+
+ while (*input_line_pointer++ == *prefix++)
+ ;
+ --input_line_pointer;
+ --prefix;
+
+ if (*prefix)
+ {
+ as_bad (_("bad register name: %s"), old_line_pointer);
+ return ERROR_REG_NUM;
+ }
+
+ if (!ISDIGIT ((unsigned char) *input_line_pointer))
+ {
+ as_bad (_("bad register number: %s"), input_line_pointer);
+ return ERROR_REG_NUM;
+ }
+
+ reg = 0;
+
+ while (ISDIGIT ((int) *input_line_pointer))
+ reg = reg * 10 + *input_line_pointer++ - '0';
+
+ if (!(next_expr = expression_end (input_line_pointer)))
+ {
+ as_bad (_("bad register name: %s"), old_line_pointer);
+ return ERROR_REG_NUM;
+ }
+
+ input_line_pointer = (char *) next_expr;
+
+ return reg;
+}
+
+
+#define PLT_SUFFIX "@PLT"
+#define plt_suffix "@plt"
+
+static void
+expression_maybe_register (opnd, tok)
+ xtensa_operand opnd;
+ expressionS *tok;
+{
+ char *kind = xtensa_operand_kind (opnd);
+
+ if ((strlen (kind) == 1)
+ && (*kind == 'l' || *kind == 'L' || *kind == 'i' || *kind == 'r'))
+ {
+ segT t = expression (tok);
+ if (t == absolute_section && operand_is_pcrel_label (opnd))
+ {
+ assert (tok->X_op == O_constant);
+ tok->X_op = O_symbol;
+ tok->X_add_symbol = &abs_symbol;
+ }
+ if (tok->X_op == O_symbol
+ && (!strncmp (input_line_pointer, PLT_SUFFIX,
+ strlen (PLT_SUFFIX) - 1)
+ || !strncmp (input_line_pointer, plt_suffix,
+ strlen (plt_suffix) - 1)))
+ {
+ tok->X_add_symbol->sy_tc.plt = 1;
+ input_line_pointer += strlen (plt_suffix);
+ }
+#ifdef XTENSA_COMBINE_LITERALS
+ find_lit_sym_translation (tok);
+#endif
+ }
+ else
+ {
+ unsigned reg = tc_get_register (kind);
+
+ if (reg != ERROR_REG_NUM) /* Already errored */
+ {
+ uint32 buf = reg;
+ if ((xtensa_operand_encode (opnd, &buf) != xtensa_encode_result_ok)
+ || (reg != xtensa_operand_decode (opnd, buf)))
+ as_bad (_("register number out of range"));
+ }
+
+ tok->X_op = O_register;
+ tok->X_add_symbol = 0;
+ tok->X_add_number = reg;
+ }
+}
+
+
+/* Split up the arguments for an opcode or pseudo-op. */
+
+static int
+tokenize_arguments (args, str)
+ char **args;
+ char *str;
+{
+ char *old_input_line_pointer;
+ bfd_boolean saw_comma = FALSE;
+ bfd_boolean saw_arg = FALSE;
+ int num_args = 0;
+ char *arg_end, *arg;
+ int arg_len;
+
+ /* Save and restore input_line_pointer around this function. */
+ old_input_line_pointer = input_line_pointer;
+ input_line_pointer = str;
+
+ while (*input_line_pointer)
+ {
+ SKIP_WHITESPACE ();
+ switch (*input_line_pointer)
+ {
+ case '\0':
+ goto fini;
+
+ case ',':
+ input_line_pointer++;
+ if (saw_comma || !saw_arg)
+ goto err;
+ saw_comma = TRUE;
+ break;
+
+ default:
+ if (!saw_comma && saw_arg)
+ goto err;
+
+ arg_end = input_line_pointer + 1;
+ while (!expression_end (arg_end))
+ arg_end += 1;
+
+ arg_len = arg_end - input_line_pointer;
+ arg = (char *) xmalloc (arg_len + 1);
+ args[num_args] = arg;
+
+ strncpy (arg, input_line_pointer, arg_len);
+ arg[arg_len] = '\0';
+
+ input_line_pointer = arg_end;
+ num_args += 1;
+ saw_comma = FALSE;
+ saw_arg = TRUE;
+ break;
+ }
+ }
+
+fini:
+ if (saw_comma)
+ goto err;
+ input_line_pointer = old_input_line_pointer;
+ return num_args;
+
+err:
+ input_line_pointer = old_input_line_pointer;
+ return -1;
+}
+
+
+/* Parse the arguments to an opcode. Return true on error. */
+
+static bfd_boolean
+parse_arguments (insn, num_args, arg_strings)
+ TInsn *insn;
+ int num_args;
+ char **arg_strings;
+{
+ expressionS *tok = insn->tok;
+ xtensa_opcode opcode = insn->opcode;
+ bfd_boolean had_error = TRUE;
+ xtensa_isa isa = xtensa_default_isa;
+ int n;
+ int opcode_operand_count;
+ int actual_operand_count = 0;
+ xtensa_operand opnd = NULL;
+ char *old_input_line_pointer;
+
+ if (insn->insn_type == ITYPE_LITERAL)
+ opcode_operand_count = 1;
+ else
+ opcode_operand_count = xtensa_num_operands (isa, opcode);
+
+ memset (tok, 0, sizeof (*tok) * MAX_INSN_ARGS);
+
+ /* Save and restore input_line_pointer around this function. */
+ old_input_line_pointer = input_line_pointer;
+
+ for (n = 0; n < num_args; n++)
+ {
+ input_line_pointer = arg_strings[n];
+
+ if (actual_operand_count >= opcode_operand_count)
+ {
+ as_warn (_("too many arguments"));
+ goto err;
+ }
+ assert (actual_operand_count < MAX_INSN_ARGS);
+
+ opnd = xtensa_get_operand (isa, opcode, actual_operand_count);
+ expression_maybe_register (opnd, tok);
+
+ if (tok->X_op == O_illegal || tok->X_op == O_absent)
+ goto err;
+ actual_operand_count++;
+ tok++;
+ }
+
+ insn->ntok = tok - insn->tok;
+ had_error = FALSE;
+
+ err:
+ input_line_pointer = old_input_line_pointer;
+ return had_error;
+}
+
+
+static void
+xg_reverse_shift_count (cnt_argp)
+ char **cnt_argp;
+{
+ char *cnt_arg, *new_arg;
+ cnt_arg = *cnt_argp;
+
+ /* replace the argument with "31-(argument)" */
+ new_arg = (char *) xmalloc (strlen (cnt_arg) + 6);
+ sprintf (new_arg, "31-(%s)", cnt_arg);
+
+ free (cnt_arg);
+ *cnt_argp = new_arg;
+}
+
+
+/* If "arg" is a constant expression, return non-zero with the value
+ in *valp. */
+
+static int
+xg_arg_is_constant (arg, valp)
+ char *arg;
+ offsetT *valp;
+{
+ expressionS exp;
+ char *save_ptr = input_line_pointer;
+
+ input_line_pointer = arg;
+ expression (&exp);
+ input_line_pointer = save_ptr;
+
+ if (exp.X_op == O_constant)
+ {
+ *valp = exp.X_add_number;
+ return 1;
+ }
+
+ return 0;
+}
+
+
+static void
+xg_replace_opname (popname, newop)
+ char **popname;
+ char *newop;
+{
+ free (*popname);
+ *popname = (char *) xmalloc (strlen (newop) + 1);
+ strcpy (*popname, newop);
+}
+
+
+static int
+xg_check_num_args (pnum_args, expected_num, opname, arg_strings)
+ int *pnum_args;
+ int expected_num;
+ char *opname;
+ char **arg_strings;
+{
+ int num_args = *pnum_args;
+
+ if (num_args < expected_num)
+ {
+ as_bad (_("not enough operands (%d) for '%s'; expected %d"),
+ num_args, opname, expected_num);
+ return -1;
+ }
+
+ if (num_args > expected_num)
+ {
+ as_warn (_("too many operands (%d) for '%s'; expected %d"),
+ num_args, opname, expected_num);
+ while (num_args-- > expected_num)
+ {
+ free (arg_strings[num_args]);
+ arg_strings[num_args] = 0;
+ }
+ *pnum_args = expected_num;
+ return -1;
+ }
+
+ return 0;
+}
+
+
+static int
+xg_translate_sysreg_op (popname, pnum_args, arg_strings)
+ char **popname;
+ int *pnum_args;
+ char **arg_strings;
+{
+ char *opname, *new_opname;
+ offsetT val;
+ bfd_boolean has_underbar = FALSE;
+
+ opname = *popname;
+ if (*opname == '_')
+ {
+ has_underbar = TRUE;
+ opname += 1;
+ }
+
+ /* Opname == [rw]ur... */
+
+ if (opname[3] == '\0')
+ {
+ /* If the register is not specified as part of the opcode,
+ then get it from the operand and move it to the opcode. */
+
+ if (xg_check_num_args (pnum_args, 2, opname, arg_strings))
+ return -1;
+
+ if (!xg_arg_is_constant (arg_strings[1], &val))
+ {
+ as_bad (_("register number for `%s' is not a constant"), opname);
+ return -1;
+ }
+ if ((unsigned) val > 255)
+ {
+ as_bad (_("register number (%ld) for `%s' is out of range"),
+ val, opname);
+ return -1;
+ }
+
+ /* Remove the last argument, which is now part of the opcode. */
+ free (arg_strings[1]);
+ arg_strings[1] = 0;
+ *pnum_args = 1;
+
+ /* Translate the opcode. */
+ new_opname = (char *) xmalloc (8);
+ sprintf (new_opname, "%s%cur%u", (has_underbar ? "_" : ""),
+ opname[0], (unsigned) val);
+ free (*popname);
+ *popname = new_opname;
+ }
+
+ return 0;
+}
+
+
+/* If the instruction is an idiom (i.e., a built-in macro), translate it.
+ Returns non-zero if an error was found. */
+
+static int
+xg_translate_idioms (popname, pnum_args, arg_strings)
+ char **popname;
+ int *pnum_args;
+ char **arg_strings;
+{
+ char *opname = *popname;
+ bfd_boolean has_underbar = FALSE;
+
+ if (*opname == '_')
+ {
+ has_underbar = TRUE;
+ opname += 1;
+ }
+
+ if (strcmp (opname, "mov") == 0)
+ {
+ if (!has_underbar && code_density_available ())
+ xg_replace_opname (popname, "mov.n");
+ else
+ {
+ if (xg_check_num_args (pnum_args, 2, opname, arg_strings))
+ return -1;
+ xg_replace_opname (popname, (has_underbar ? "_or" : "or"));
+ arg_strings[2] = (char *) xmalloc (strlen (arg_strings[1]) + 1);
+ strcpy (arg_strings[2], arg_strings[1]);
+ *pnum_args = 3;
+ }
+ return 0;
+ }
+
+ if (strcmp (opname, "bbsi.l") == 0)
+ {
+ if (xg_check_num_args (pnum_args, 3, opname, arg_strings))
+ return -1;
+ xg_replace_opname (popname, (has_underbar ? "_bbsi" : "bbsi"));
+ if (target_big_endian)
+ xg_reverse_shift_count (&arg_strings[1]);
+ return 0;
+ }
+
+ if (strcmp (opname, "bbci.l") == 0)
+ {
+ if (xg_check_num_args (pnum_args, 3, opname, arg_strings))
+ return -1;
+ xg_replace_opname (popname, (has_underbar ? "_bbci" : "bbci"));
+ if (target_big_endian)
+ xg_reverse_shift_count (&arg_strings[1]);
+ return 0;
+ }
+
+ if (strcmp (opname, "nop") == 0)
+ {
+ if (!has_underbar && code_density_available ())
+ xg_replace_opname (popname, "nop.n");
+ else
+ {
+ if (xg_check_num_args (pnum_args, 0, opname, arg_strings))
+ return -1;
+ xg_replace_opname (popname, (has_underbar ? "_or" : "or"));
+ arg_strings[0] = (char *) xmalloc (3);
+ arg_strings[1] = (char *) xmalloc (3);
+ arg_strings[2] = (char *) xmalloc (3);
+ strcpy (arg_strings[0], "a1");
+ strcpy (arg_strings[1], "a1");
+ strcpy (arg_strings[2], "a1");
+ *pnum_args = 3;
+ }
+ return 0;
+ }
+
+ if ((opname[0] == 'r' || opname[0] == 'w')
+ && opname[1] == 'u'
+ && opname[2] == 'r')
+ return xg_translate_sysreg_op (popname, pnum_args, arg_strings);
+
+
+ /* WIDENING DENSITY OPCODES
+
+ questionable relaxations (widening) from old "tai" idioms:
+
+ ADD.N --> ADD
+ BEQZ.N --> BEQZ
+ RET.N --> RET
+ RETW.N --> RETW
+ MOVI.N --> MOVI
+ MOV.N --> MOV
+ NOP.N --> NOP
+
+ Note: this incomplete list was imported to match the "tai"
+ behavior; other density opcodes are not handled.
+
+ The xtensa-relax code may know how to do these but it doesn't do
+ anything when these density opcodes appear inside a no-density
+ region. Somehow GAS should either print an error when that happens
+ or do the widening. The old "tai" behavior was to do the widening.
+ For now, I'll make it widen but print a warning.
+
+ FIXME: GAS needs to detect density opcodes inside no-density
+ regions and treat them as errors. This code should be removed
+ when that is done. */
+
+ if (use_generics ()
+ && !has_underbar
+ && density_supported
+ && !code_density_available ())
+ {
+ if (strcmp (opname, "add.n") == 0)
+ xg_replace_opname (popname, "add");
+
+ else if (strcmp (opname, "beqz.n") == 0)
+ xg_replace_opname (popname, "beqz");
+
+ else if (strcmp (opname, "ret.n") == 0)
+ xg_replace_opname (popname, "ret");
+
+ else if (strcmp (opname, "retw.n") == 0)
+ xg_replace_opname (popname, "retw");
+
+ else if (strcmp (opname, "movi.n") == 0)
+ xg_replace_opname (popname, "movi");
+
+ else if (strcmp (opname, "mov.n") == 0)
+ {
+ if (xg_check_num_args (pnum_args, 2, opname, arg_strings))
+ return -1;
+ xg_replace_opname (popname, "or");
+ arg_strings[2] = (char *) xmalloc (strlen (arg_strings[1]) + 1);
+ strcpy (arg_strings[2], arg_strings[1]);
+ *pnum_args = 3;
+ }
+
+ else if (strcmp (opname, "nop.n") == 0)
+ {
+ if (xg_check_num_args (pnum_args, 0, opname, arg_strings))
+ return -1;
+ xg_replace_opname (popname, "or");
+ arg_strings[0] = (char *) xmalloc (3);
+ arg_strings[1] = (char *) xmalloc (3);
+ arg_strings[2] = (char *) xmalloc (3);
+ strcpy (arg_strings[0], "a1");
+ strcpy (arg_strings[1], "a1");
+ strcpy (arg_strings[2], "a1");
+ *pnum_args = 3;
+ }
+ }
+
+ return 0;
+}
+
+
+/* Functions for dealing with the Xtensa ISA. */
+
+/* Return true if the given operand is an immed or target instruction,
+ i.e., has a reloc associated with it. Currently, this is only true
+ if the operand kind is "i, "l" or "L". */
+
+static bfd_boolean
+operand_is_immed (opnd)
+ xtensa_operand opnd;
+{
+ const char *opkind = xtensa_operand_kind (opnd);
+ if (opkind[0] == '\0' || opkind[1] != '\0')
+ return FALSE;
+ switch (opkind[0])
+ {
+ case 'i':
+ case 'l':
+ case 'L':
+ return TRUE;
+ }
+ return FALSE;
+}
+
+
+/* Return true if the given operand is a pc-relative label. This is
+ true for "l", "L", and "r" operand kinds. */
+
+bfd_boolean
+operand_is_pcrel_label (opnd)
+ xtensa_operand opnd;
+{
+ const char *opkind = xtensa_operand_kind (opnd);
+ if (opkind[0] == '\0' || opkind[1] != '\0')
+ return FALSE;
+ switch (opkind[0])
+ {
+ case 'r':
+ case 'l':
+ case 'L':
+ return TRUE;
+ }
+ return FALSE;
+}
+
+
+/* Currently the assembler only allows us to use a single target per
+ fragment. Because of this, only one operand for a given
+ instruction may be symbolic. If there is an operand of kind "lrL",
+ the last one is chosen. Otherwise, the result is the number of the
+ last operand of type "i", and if there are none of those, we fail
+ and return -1. */
+
+int
+get_relaxable_immed (opcode)
+ xtensa_opcode opcode;
+{
+ int last_immed = -1;
+ int noperands, opi;
+ xtensa_operand operand;
+
+ if (opcode == XTENSA_UNDEFINED)
+ return -1;
+
+ noperands = xtensa_num_operands (xtensa_default_isa, opcode);
+ for (opi = noperands - 1; opi >= 0; opi--)
+ {
+ operand = xtensa_get_operand (xtensa_default_isa, opcode, opi);
+ if (operand_is_pcrel_label (operand))
+ return opi;
+ if (last_immed == -1 && operand_is_immed (operand))
+ last_immed = opi;
+ }
+ return last_immed;
+}
+
+
+xtensa_opcode
+get_opcode_from_buf (buf)
+ const char *buf;
+{
+ static xtensa_insnbuf insnbuf = NULL;
+ xtensa_opcode opcode;
+ xtensa_isa isa = xtensa_default_isa;
+ if (!insnbuf)
+ insnbuf = xtensa_insnbuf_alloc (isa);
+
+ xtensa_insnbuf_from_chars (isa, insnbuf, buf);
+ opcode = xtensa_decode_insn (isa, insnbuf);
+ return opcode;
+}
+
+
+static bfd_boolean
+is_direct_call_opcode (opcode)
+ xtensa_opcode opcode;
+{
+ if (opcode == XTENSA_UNDEFINED)
+ return FALSE;
+
+ return (opcode == xtensa_call0_opcode
+ || opcode == xtensa_call4_opcode
+ || opcode == xtensa_call8_opcode
+ || opcode == xtensa_call12_opcode);
+}
+
+
+static bfd_boolean
+is_call_opcode (opcode)
+ xtensa_opcode opcode;
+{
+ if (is_direct_call_opcode (opcode))
+ return TRUE;
+
+ if (opcode == XTENSA_UNDEFINED)
+ return FALSE;
+
+ return (opcode == xtensa_callx0_opcode
+ || opcode == xtensa_callx4_opcode
+ || opcode == xtensa_callx8_opcode
+ || opcode == xtensa_callx12_opcode);
+}
+
+
+/* Return true if the opcode is an entry opcode. This is used because
+ "entry" adds an implicit ".align 4" and also the entry instruction
+ has an extra check for an operand value. */
+
+static bfd_boolean
+is_entry_opcode (opcode)
+ xtensa_opcode opcode;
+{
+ if (opcode == XTENSA_UNDEFINED)
+ return FALSE;
+
+ return (opcode == xtensa_entry_opcode);
+}
+
+
+/* Return true if it is one of the loop opcodes. Loops are special
+ because they need automatic alignment and they have a relaxation so
+ complex that we hard-coded it. */
+
+static bfd_boolean
+is_loop_opcode (opcode)
+ xtensa_opcode opcode;
+{
+ if (opcode == XTENSA_UNDEFINED)
+ return FALSE;
+
+ return (opcode == xtensa_loop_opcode
+ || opcode == xtensa_loopnez_opcode
+ || opcode == xtensa_loopgtz_opcode);
+}
+
+
+static bfd_boolean
+is_the_loop_opcode (opcode)
+ xtensa_opcode opcode;
+{
+ if (opcode == XTENSA_UNDEFINED)
+ return FALSE;
+
+ return (opcode == xtensa_loop_opcode);
+}
+
+
+static bfd_boolean
+is_jx_opcode (opcode)
+ xtensa_opcode opcode;
+{
+ if (opcode == XTENSA_UNDEFINED)
+ return FALSE;
+
+ return (opcode == xtensa_jx_opcode);
+}
+
+
+/* Return true if the opcode is a retw or retw.n.
+ Needed to add nops to avoid a hardware interlock issue. */
+
+static bfd_boolean
+is_windowed_return_opcode (opcode)
+ xtensa_opcode opcode;
+{
+ if (opcode == XTENSA_UNDEFINED)
+ return FALSE;
+
+ return (opcode == xtensa_retw_opcode || opcode == xtensa_retw_n_opcode);
+}
+
+
+/* Return true if the opcode type is "l" and the opcode is NOT a jump. */
+
+static bfd_boolean
+is_conditional_branch_opcode (opcode)
+ xtensa_opcode opcode;
+{
+ xtensa_isa isa = xtensa_default_isa;
+ int num_ops, i;
+
+ if (opcode == xtensa_j_opcode && opcode != XTENSA_UNDEFINED)
+ return FALSE;
+
+ num_ops = xtensa_num_operands (isa, opcode);
+ for (i = 0; i < num_ops; i++)
+ {
+ xtensa_operand operand = xtensa_get_operand (isa, opcode, i);
+ if (strcmp (xtensa_operand_kind (operand), "l") == 0)
+ return TRUE;
+ }
+ return FALSE;
+}
+
+
+/* Return true if the given opcode is a conditional branch
+ instruction, i.e., currently this is true if the instruction
+ is a jx or has an operand with 'l' type and is not a loop. */
+
+bfd_boolean
+is_branch_or_jump_opcode (opcode)
+ xtensa_opcode opcode;
+{
+ int opn, op_count;
+
+ if (opcode == XTENSA_UNDEFINED)
+ return FALSE;
+
+ if (is_loop_opcode (opcode))
+ return FALSE;
+
+ if (is_jx_opcode (opcode))
+ return TRUE;
+
+ op_count = xtensa_num_operands (xtensa_default_isa, opcode);
+ for (opn = 0; opn < op_count; opn++)
+ {
+ xtensa_operand opnd =
+ xtensa_get_operand (xtensa_default_isa, opcode, opn);
+ const char *opkind = xtensa_operand_kind (opnd);
+ if (opkind && opkind[0] == 'l' && opkind[1] == '\0')
+ return TRUE;
+ }
+ return FALSE;
+}
+
+
+/* Convert from operand numbers to BFD relocation type code.
+ Return BFD_RELOC_NONE on failure. */
+
+bfd_reloc_code_real_type
+opnum_to_reloc (opnum)
+ int opnum;
+{
+ switch (opnum)
+ {
+ case 0:
+ return BFD_RELOC_XTENSA_OP0;
+ case 1:
+ return BFD_RELOC_XTENSA_OP1;
+ case 2:
+ return BFD_RELOC_XTENSA_OP2;
+ default:
+ break;
+ }
+ return BFD_RELOC_NONE;
+}
+
+
+/* Convert from BFD relocation type code to operand number.
+ Return -1 on failure. */
+
+int
+reloc_to_opnum (reloc)
+ bfd_reloc_code_real_type reloc;
+{
+ switch (reloc)
+ {
+ case BFD_RELOC_XTENSA_OP0:
+ return 0;
+ case BFD_RELOC_XTENSA_OP1:
+ return 1;
+ case BFD_RELOC_XTENSA_OP2:
+ return 2;
+ default:
+ break;
+ }
+ return -1;
+}
+
+
+static void
+xtensa_insnbuf_set_operand (insnbuf, opcode, operand, value, file, line)
+ xtensa_insnbuf insnbuf;
+ xtensa_opcode opcode;
+ xtensa_operand operand;
+ int32 value;
+ const char *file;
+ unsigned int line;
+{
+ xtensa_encode_result encode_result;
+ uint32 valbuf = value;
+
+ encode_result = xtensa_operand_encode (operand, &valbuf);
+
+ switch (encode_result)
+ {
+ case xtensa_encode_result_ok:
+ break;
+ case xtensa_encode_result_align:
+ as_bad_where ((char *) file, line,
+ _("operand %d not properly aligned for '%s'"),
+ value, xtensa_opcode_name (xtensa_default_isa, opcode));
+ break;
+ case xtensa_encode_result_not_in_table:
+ as_bad_where ((char *) file, line,
+ _("operand %d not in immediate table for '%s'"),
+ value, xtensa_opcode_name (xtensa_default_isa, opcode));
+ break;
+ case xtensa_encode_result_too_high:
+ as_bad_where ((char *) file, line,
+ _("operand %d too large for '%s'"), value,
+ xtensa_opcode_name (xtensa_default_isa, opcode));
+ break;
+ case xtensa_encode_result_too_low:
+ as_bad_where ((char *) file, line,
+ _("operand %d too small for '%s'"), value,
+ xtensa_opcode_name (xtensa_default_isa, opcode));
+ break;
+ case xtensa_encode_result_not_ok:
+ as_bad_where ((char *) file, line,
+ _("operand %d is invalid for '%s'"), value,
+ xtensa_opcode_name (xtensa_default_isa, opcode));
+ break;
+ default:
+ abort ();
+ }
+
+ xtensa_operand_set_field (operand, insnbuf, valbuf);
+}
+
+
+static uint32
+xtensa_insnbuf_get_operand (insnbuf, opcode, opnum)
+ xtensa_insnbuf insnbuf;
+ xtensa_opcode opcode;
+ int opnum;
+{
+ xtensa_operand op = xtensa_get_operand (xtensa_default_isa, opcode, opnum);
+ return xtensa_operand_decode (op, xtensa_operand_get_field (op, insnbuf));
+}
+
+
+static void
+xtensa_insnbuf_set_immediate_field (opcode, insnbuf, value, file, line)
+ xtensa_opcode opcode;
+ xtensa_insnbuf insnbuf;
+ int32 value;
+ const char *file;
+ unsigned int line;
+{
+ xtensa_isa isa = xtensa_default_isa;
+ int last_opnd = xtensa_num_operands (isa, opcode) - 1;
+ xtensa_operand operand = xtensa_get_operand (isa, opcode, last_opnd);
+ xtensa_insnbuf_set_operand (insnbuf, opcode, operand, value, file, line);
+}
+
+
+static bfd_boolean
+is_negatable_branch (insn)
+ TInsn *insn;
+{
+ xtensa_isa isa = xtensa_default_isa;
+ int i;
+ int num_ops = xtensa_num_operands (isa, insn->opcode);
+
+ for (i = 0; i < num_ops; i++)
+ {
+ xtensa_operand opnd = xtensa_get_operand (isa, insn->opcode, i);
+ char *kind = xtensa_operand_kind (opnd);
+ if (strlen (kind) == 1 && *kind == 'l')
+ return TRUE;
+ }
+ return FALSE;
+}
+
+
+/* Lists for recording various properties of symbols. */
+
+typedef struct symbol_consS_struct
+{
+ symbolS *first;
+ /* These are used for the target taken. */
+ int is_loop_target:1;
+ int is_branch_target:1;
+ int is_literal:1;
+ int is_moved:1;
+ struct symbol_consS_struct *rest;
+} symbol_consS;
+
+symbol_consS *defined_symbols = 0;
+symbol_consS *branch_targets = 0;
+
+
+static void
+xtensa_define_label (sym)
+ symbolS *sym;
+{
+ symbol_consS *cons = (symbol_consS *) xmalloc (sizeof (symbol_consS));
+
+ cons->first = sym;
+ cons->is_branch_target = 0;
+ cons->is_loop_target = 0;
+ cons->is_literal = generating_literals ? 1 : 0;
+ cons->is_moved = 0;
+ cons->rest = defined_symbols;
+ defined_symbols = cons;
+}
+
+
+void
+add_target_symbol (sym, is_loop)
+ symbolS *sym;
+ bfd_boolean is_loop;
+{
+ symbol_consS *cons, *sym_e;
+
+ for (sym_e = branch_targets; sym_e; sym_e = sym_e->rest)
+ {
+ if (sym_e->first == sym)
+ {
+ if (is_loop)
+ sym_e->is_loop_target = 1;
+ else
+ sym_e->is_branch_target = 1;
+ return;
+ }
+ }
+
+ cons = (symbol_consS *) xmalloc (sizeof (symbol_consS));
+ cons->first = sym;
+ cons->is_branch_target = (is_loop ? 0 : 1);
+ cons->is_loop_target = (is_loop ? 1 : 0);
+ cons->rest = branch_targets;
+ branch_targets = cons;
+}
+
+
+/* Find the symbol at a given position. (Note: the "loops_ok"
+ argument is provided to allow ignoring labels that define loop
+ ends. This fixes a bug where the NOPs to align a loop opcode were
+ included in a previous zero-cost loop:
+
+ loop a0, loopend
+ <loop1 body>
+ loopend:
+
+ loop a2, loopend2
+ <loop2 body>
+
+ would become:
+
+ loop a0, loopend
+ <loop1 body>
+ nop.n <===== bad!
+ loopend:
+
+ loop a2, loopend2
+ <loop2 body>
+
+ This argument is used to prevent moving the NOP to before the
+ loop-end label, which is what you want in this special case.) */
+
+static symbolS *
+xtensa_find_label (fragP, offset, loops_ok)
+ fragS *fragP;
+ offsetT offset;
+ bfd_boolean loops_ok;
+{
+ symbol_consS *consP;
+
+ for (consP = defined_symbols; consP; consP = consP->rest)
+ {
+ symbolS *symP = consP->first;
+
+ if (S_GET_SEGMENT (symP) == now_seg
+ && symbol_get_frag (symP) == fragP
+ && symbol_constant_p (symP)
+ && S_GET_VALUE (symP) == fragP->fr_address + (unsigned) offset
+ && (loops_ok || !is_loop_target_label (symP)))
+ return symP;
+ }
+ return NULL;
+}
+
+
+static void
+map_over_defined_symbols (fn)
+ void (*fn) PARAMS ((symbolS *));
+{
+ symbol_consS *sym_cons;
+
+ for (sym_cons = defined_symbols; sym_cons; sym_cons = sym_cons->rest)
+ fn (sym_cons->first);
+}
+
+
+static bfd_boolean
+is_loop_target_label (sym)
+ symbolS *sym;
+{
+ symbol_consS *sym_e;
+
+ for (sym_e = branch_targets; sym_e; sym_e = sym_e->rest)
+ {
+ if (sym_e->first == sym)
+ return sym_e->is_loop_target;
+ }
+ return FALSE;
+}
+
+
+/* Walk over all of the symbols that are branch target labels and
+ loop target labels. Mark the associated fragments for these with
+ the appropriate flags. */
+
+static void
+xtensa_mark_target_fragments ()
+{
+ symbol_consS *sym_e;
+
+ for (sym_e = branch_targets; sym_e; sym_e = sym_e->rest)
+ {
+ symbolS *sym = sym_e->first;
+
+ if (symbol_get_frag (sym)
+ && symbol_constant_p (sym)
+ && S_GET_VALUE (sym) == 0)
+ {
+ if (sym_e->is_branch_target)
+ symbol_get_frag (sym)->tc_frag_data.is_branch_target = TRUE;
+ if (sym_e->is_loop_target)
+ symbol_get_frag (sym)->tc_frag_data.is_loop_target = TRUE;
+ }
+ }
+}
+
+
+/* Various Other Internal Functions. */
+
+static bfd_boolean
+is_unique_insn_expansion (r)
+ TransitionRule *r;
+{
+ if (!r->to_instr || r->to_instr->next != NULL)
+ return FALSE;
+ if (r->to_instr->typ != INSTR_INSTR)
+ return FALSE;
+ return TRUE;
+}
+
+
+static int
+xg_get_insn_size (insn)
+ TInsn *insn;
+{
+ assert (insn->insn_type == ITYPE_INSN);
+ return xtensa_insn_length (xtensa_default_isa, insn->opcode);
+}
+
+
+static int
+xg_get_build_instr_size (insn)
+ BuildInstr *insn;
+{
+ assert (insn->typ == INSTR_INSTR);
+ return xtensa_insn_length (xtensa_default_isa, insn->opcode);
+}
+
+
+bfd_boolean
+xg_is_narrow_insn (insn)
+ TInsn *insn;
+{
+ TransitionTable *table = xg_build_widen_table ();
+ TransitionList *l;
+ int num_match = 0;
+ assert (insn->insn_type == ITYPE_INSN);
+ assert (insn->opcode < table->num_opcodes);
+
+ for (l = table->table[insn->opcode]; l != NULL; l = l->next)
+ {
+ TransitionRule *rule = l->rule;
+
+ if (xg_instruction_matches_rule (insn, rule)
+ && is_unique_insn_expansion (rule))
+ {
+ /* It only generates one instruction... */
+ assert (insn->insn_type == ITYPE_INSN);
+ /* ...and it is a larger instruction. */
+ if (xg_get_insn_size (insn)
+ < xg_get_build_instr_size (rule->to_instr))
+ {
+ num_match++;
+ if (num_match > 1)
+ return FALSE;
+ }
+ }
+ }
+ return (num_match == 1);
+}
+
+
+bfd_boolean
+xg_is_single_relaxable_insn (insn)
+ TInsn *insn;
+{
+ TransitionTable *table = xg_build_widen_table ();
+ TransitionList *l;
+ int num_match = 0;
+ assert (insn->insn_type == ITYPE_INSN);
+ assert (insn->opcode < table->num_opcodes);
+
+ for (l = table->table[insn->opcode]; l != NULL; l = l->next)
+ {
+ TransitionRule *rule = l->rule;
+
+ if (xg_instruction_matches_rule (insn, rule)
+ && is_unique_insn_expansion (rule))
+ {
+ assert (insn->insn_type == ITYPE_INSN);
+ /* ... and it is a larger instruction. */
+ if (xg_get_insn_size (insn)
+ <= xg_get_build_instr_size (rule->to_instr))
+ {
+ num_match++;
+ if (num_match > 1)
+ return FALSE;
+ }
+ }
+ }
+ return (num_match == 1);
+}
+
+
+/* Return the largest size instruction that this instruction can
+ expand to. Currently, in all cases, this is 3 bytes. Of course we
+ could just calculate this once and generate a table. */
+
+int
+xg_get_max_narrow_insn_size (opcode)
+ xtensa_opcode opcode;
+{
+ /* Go ahead and compute it, but it better be 3. */
+ TransitionTable *table = xg_build_widen_table ();
+ TransitionList *l;
+ int old_size = xtensa_insn_length (xtensa_default_isa, opcode);
+ assert (opcode < table->num_opcodes);
+
+ /* Actually we can do better. Check to see of Only one applies. */
+ for (l = table->table[opcode]; l != NULL; l = l->next)
+ {
+ TransitionRule *rule = l->rule;
+
+ /* If it only generates one instruction. */
+ if (is_unique_insn_expansion (rule))
+ {
+ int new_size = xtensa_insn_length (xtensa_default_isa,
+ rule->to_instr->opcode);
+ if (new_size > old_size)
+ {
+ assert (new_size == 3);
+ return 3;
+ }
+ }
+ }
+ return old_size;
+}
+
+
+/* Return the maximum number of bytes this opcode can expand to. */
+
+int
+xg_get_max_insn_widen_size (opcode)
+ xtensa_opcode opcode;
+{
+ TransitionTable *table = xg_build_widen_table ();
+ TransitionList *l;
+ int max_size = xtensa_insn_length (xtensa_default_isa, opcode);
+
+ assert (opcode < table->num_opcodes);
+
+ for (l = table->table[opcode]; l != NULL; l = l->next)
+ {
+ TransitionRule *rule = l->rule;
+ BuildInstr *build_list;
+ int this_size = 0;
+
+ if (!rule)
+ continue;
+ build_list = rule->to_instr;
+ if (is_unique_insn_expansion (rule))
+ {
+ assert (build_list->typ == INSTR_INSTR);
+ this_size = xg_get_max_insn_widen_size (build_list->opcode);
+ }
+ else
+ for (; build_list != NULL; build_list = build_list->next)
+ {
+ switch (build_list->typ)
+ {
+ case INSTR_INSTR:
+ this_size += xtensa_insn_length (xtensa_default_isa,
+ build_list->opcode);
+
+ break;
+ case INSTR_LITERAL_DEF:
+ case INSTR_LABEL_DEF:
+ default:
+ break;
+ }
+ }
+ if (this_size > max_size)
+ max_size = this_size;
+ }
+ return max_size;
+}
+
+
+/* Return the maximum number of literal bytes this opcode can generate. */
+
+int
+xg_get_max_insn_widen_literal_size (opcode)
+ xtensa_opcode opcode;
+{
+ TransitionTable *table = xg_build_widen_table ();
+ TransitionList *l;
+ int max_size = 0;
+
+ assert (opcode < table->num_opcodes);
+
+ for (l = table->table[opcode]; l != NULL; l = l->next)
+ {
+ TransitionRule *rule = l->rule;
+ BuildInstr *build_list;
+ int this_size = 0;
+
+ if (!rule)
+ continue;
+ build_list = rule->to_instr;
+ if (is_unique_insn_expansion (rule))
+ {
+ assert (build_list->typ == INSTR_INSTR);
+ this_size = xg_get_max_insn_widen_literal_size (build_list->opcode);
+ }
+ else
+ for (; build_list != NULL; build_list = build_list->next)
+ {
+ switch (build_list->typ)
+ {
+ case INSTR_LITERAL_DEF:
+ /* hard coded 4-byte literal. */
+ this_size += 4;
+ break;
+ case INSTR_INSTR:
+ case INSTR_LABEL_DEF:
+ default:
+ break;
+ }
+ }
+ if (this_size > max_size)
+ max_size = this_size;
+ }
+ return max_size;
+}
+
+
+bfd_boolean
+xg_is_relaxable_insn (insn, lateral_steps)
+ TInsn *insn;
+ int lateral_steps;
+{
+ int steps_taken = 0;
+ TransitionTable *table = xg_build_widen_table ();
+ TransitionList *l;
+
+ assert (insn->insn_type == ITYPE_INSN);
+ assert (insn->opcode < table->num_opcodes);
+
+ for (l = table->table[insn->opcode]; l != NULL; l = l->next)
+ {
+ TransitionRule *rule = l->rule;
+
+ if (xg_instruction_matches_rule (insn, rule))
+ {
+ if (steps_taken == lateral_steps)
+ return TRUE;
+ steps_taken++;
+ }
+ }
+ return FALSE;
+}
+
+
+static symbolS *
+get_special_literal_symbol ()
+{
+ static symbolS *sym = NULL;
+
+ if (sym == NULL)
+ sym = symbol_find_or_make ("SPECIAL_LITERAL0\001");
+ return sym;
+}
+
+
+static symbolS *
+get_special_label_symbol ()
+{
+ static symbolS *sym = NULL;
+
+ if (sym == NULL)
+ sym = symbol_find_or_make ("SPECIAL_LABEL0\001");
+ return sym;
+}
+
+
+/* Return true on success. */
+
+bfd_boolean
+xg_build_to_insn (targ, insn, bi)
+ TInsn *targ;
+ TInsn *insn;
+ BuildInstr *bi;
+{
+ BuildOp *op;
+ symbolS *sym;
+
+ memset (targ, 0, sizeof (TInsn));
+ switch (bi->typ)
+ {
+ case INSTR_INSTR:
+ op = bi->ops;
+ targ->opcode = bi->opcode;
+ targ->insn_type = ITYPE_INSN;
+ targ->is_specific_opcode = FALSE;
+
+ for (; op != NULL; op = op->next)
+ {
+ int op_num = op->op_num;
+ int op_data = op->op_data;
+
+ assert (op->op_num < MAX_INSN_ARGS);
+
+ if (targ->ntok <= op_num)
+ targ->ntok = op_num + 1;
+
+ switch (op->typ)
+ {
+ case OP_CONSTANT:
+ set_expr_const (&targ->tok[op_num], op_data);
+ break;
+ case OP_OPERAND:
+ assert (op_data < insn->ntok);
+ copy_expr (&targ->tok[op_num], &insn->tok[op_data]);
+ break;
+ case OP_LITERAL:
+ sym = get_special_literal_symbol ();
+ set_expr_symbol_offset (&targ->tok[op_num], sym, 0);
+ break;
+ case OP_LABEL:
+ sym = get_special_label_symbol ();
+ set_expr_symbol_offset (&targ->tok[op_num], sym, 0);
+ break;
+ default:
+ /* currently handles:
+ OP_OPERAND_LOW8
+ OP_OPERAND_HI24S
+ OP_OPERAND_F32MINUS */
+ if (xg_has_userdef_op_fn (op->typ))
+ {
+ assert (op_data < insn->ntok);
+ if (expr_is_const (&insn->tok[op_data]))
+ {
+ long val;
+ copy_expr (&targ->tok[op_num], &insn->tok[op_data]);
+ val = xg_apply_userdef_op_fn (op->typ,
+ targ->tok[op_num].
+ X_add_number);
+ targ->tok[op_num].X_add_number = val;
+ }
+ else
+ return FALSE; /* We cannot use a relocation for this. */
+ break;
+ }
+ assert (0);
+ break;
+ }
+ }
+ break;
+
+ case INSTR_LITERAL_DEF:
+ op = bi->ops;
+ targ->opcode = XTENSA_UNDEFINED;
+ targ->insn_type = ITYPE_LITERAL;
+ targ->is_specific_opcode = FALSE;
+ for (; op != NULL; op = op->next)
+ {
+ int op_num = op->op_num;
+ int op_data = op->op_data;
+ assert (op->op_num < MAX_INSN_ARGS);
+
+ if (targ->ntok <= op_num)
+ targ->ntok = op_num + 1;
+
+ switch (op->typ)
+ {
+ case OP_OPERAND:
+ assert (op_data < insn->ntok);
+ copy_expr (&targ->tok[op_num], &insn->tok[op_data]);
+ break;
+ case OP_LITERAL:
+ case OP_CONSTANT:
+ case OP_LABEL:
+ default:
+ assert (0);
+ break;
+ }
+ }
+ break;
+
+ case INSTR_LABEL_DEF:
+ op = bi->ops;
+ targ->opcode = XTENSA_UNDEFINED;
+ targ->insn_type = ITYPE_LABEL;
+ targ->is_specific_opcode = FALSE;
+ /* Literal with no ops. is a label? */
+ assert (op == NULL);
+ break;
+
+ default:
+ assert (0);
+ }
+
+ return TRUE;
+}
+
+
+/* Return true on success. */
+
+bfd_boolean
+xg_build_to_stack (istack, insn, bi)
+ IStack *istack;
+ TInsn *insn;
+ BuildInstr *bi;
+{
+ for (; bi != NULL; bi = bi->next)
+ {
+ TInsn *next_insn = istack_push_space (istack);
+
+ if (!xg_build_to_insn (next_insn, insn, bi))
+ return FALSE;
+ }
+ return TRUE;
+}
+
+
+/* Return true on valid expansion. */
+
+bfd_boolean
+xg_expand_to_stack (istack, insn, lateral_steps)
+ IStack *istack;
+ TInsn *insn;
+ int lateral_steps;
+{
+ int stack_size = istack->ninsn;
+ int steps_taken = 0;
+ TransitionTable *table = xg_build_widen_table ();
+ TransitionList *l;
+
+ assert (insn->insn_type == ITYPE_INSN);
+ assert (insn->opcode < table->num_opcodes);
+
+ for (l = table->table[insn->opcode]; l != NULL; l = l->next)
+ {
+ TransitionRule *rule = l->rule;
+
+ if (xg_instruction_matches_rule (insn, rule))
+ {
+ if (lateral_steps == steps_taken)
+ {
+ int i;
+
+ /* This is it. Expand the rule to the stack. */
+ if (!xg_build_to_stack (istack, insn, rule->to_instr))
+ return FALSE;
+
+ /* Check to see if it fits. */
+ for (i = stack_size; i < istack->ninsn; i++)
+ {
+ TInsn *insn = &istack->insn[i];
+
+ if (insn->insn_type == ITYPE_INSN
+ && !tinsn_has_symbolic_operands (insn)
+ && !xg_immeds_fit (insn))
+ {
+ istack->ninsn = stack_size;
+ return FALSE;
+ }
+ }
+ return TRUE;
+ }
+ steps_taken++;
+ }
+ }
+ return FALSE;
+}
+
+
+bfd_boolean
+xg_expand_narrow (targ, insn)
+ TInsn *targ;
+ TInsn *insn;
+{
+ TransitionTable *table = xg_build_widen_table ();
+ TransitionList *l;
+
+ assert (insn->insn_type == ITYPE_INSN);
+ assert (insn->opcode < table->num_opcodes);
+
+ for (l = table->table[insn->opcode]; l != NULL; l = l->next)
+ {
+ TransitionRule *rule = l->rule;
+ if (xg_instruction_matches_rule (insn, rule)
+ && is_unique_insn_expansion (rule))
+ {
+ /* Is it a larger instruction? */
+ if (xg_get_insn_size (insn)
+ <= xg_get_build_instr_size (rule->to_instr))
+ {
+ xg_build_to_insn (targ, insn, rule->to_instr);
+ return FALSE;
+ }
+ }
+ }
+ return TRUE;
+}
+
+
+/* Assumes: All immeds are constants. Check that all constants fit
+ into their immeds; return false if not. */
+
+static bfd_boolean
+xg_immeds_fit (insn)
+ const TInsn *insn;
+{
+ int i;
+
+ int n = insn->ntok;
+ assert (insn->insn_type == ITYPE_INSN);
+ for (i = 0; i < n; ++i)
+ {
+ const expressionS *expr = &insn->tok[i];
+ xtensa_operand opnd = xtensa_get_operand (xtensa_default_isa,
+ insn->opcode, i);
+ if (!operand_is_immed (opnd))
+ continue;
+
+ switch (expr->X_op)
+ {
+ case O_register:
+ case O_constant:
+ {
+ if (xg_check_operand (expr->X_add_number, opnd))
+ return FALSE;
+ }
+ break;
+ default:
+ /* The symbol should have a fixup associated with it. */
+ assert (FALSE);
+ break;
+ }
+ }
+ return TRUE;
+}
+
+
+/* This should only be called after we have an initial
+ estimate of the addresses. */
+
+static bfd_boolean
+xg_symbolic_immeds_fit (insn, pc_seg, pc_frag, pc_offset, stretch)
+ const TInsn *insn;
+ segT pc_seg;
+ fragS *pc_frag;
+ offsetT pc_offset;
+ long stretch;
+{
+ symbolS *symbolP;
+ offsetT target, pc, new_offset;
+ int i;
+ int n = insn->ntok;
+
+ assert (insn->insn_type == ITYPE_INSN);
+
+ for (i = 0; i < n; ++i)
+ {
+ const expressionS *expr = &insn->tok[i];
+ xtensa_operand opnd = xtensa_get_operand (xtensa_default_isa,
+ insn->opcode, i);
+ if (!operand_is_immed (opnd))
+ continue;
+
+ switch (expr->X_op)
+ {
+ case O_register:
+ case O_constant:
+ if (xg_check_operand (expr->X_add_number, opnd))
+ return FALSE;
+ break;
+
+ case O_symbol:
+ /* We only allow symbols for pc-relative stuff.
+ If pc_frag == 0, then we don't have frag locations yet. */
+ if (pc_frag == 0)
+ return FALSE;
+
+ /* If it is PC-relative and the symbol is in the same segment as
+ the PC.... */
+ if (!xtensa_operand_isPCRelative (opnd)
+ || S_GET_SEGMENT (expr->X_add_symbol) != pc_seg)
+ return FALSE;
+
+ symbolP = expr->X_add_symbol;
+ target = S_GET_VALUE (symbolP) + expr->X_add_number;
+ pc = pc_frag->fr_address + pc_offset;
+
+ /* If frag has yet to be reached on this pass, assume it
+ will move by STRETCH just as we did. If this is not so,
+ it will be because some frag between grows, and that will
+ force another pass. Beware zero-length frags. There
+ should be a faster way to do this. */
+
+ if (stretch && is_dnrange (pc_frag, symbolP, stretch))
+ target += stretch;
+
+ new_offset = xtensa_operand_do_reloc (opnd, target, pc);
+ if (xg_check_operand (new_offset, opnd))
+ return FALSE;
+ break;
+
+ default:
+ /* The symbol should have a fixup associated with it. */
+ return FALSE;
+ }
+ }
+
+ return TRUE;
+}
+
+
+/* This will check to see if the value can be converted into the
+ operand type. It will return true if it does not fit. */
+
+static bfd_boolean
+xg_check_operand (value, operand)
+ int32 value;
+ xtensa_operand operand;
+{
+ uint32 valbuf = value;
+ return (xtensa_operand_encode (operand, &valbuf) != xtensa_encode_result_ok);
+}
+
+
+/* Check if a symbol is pointing to somewhere after
+ the start frag, given that the segment has stretched
+ by stretch during relaxation.
+
+ This is more complicated than it might appear at first blush
+ because of the stretching that goes on. Here is how the check
+ works:
+
+ If the symbol and the frag are in the same segment, then
+ the symbol could be down range. Note that this function
+ assumes that start_frag is in now_seg.
+
+ If the symbol is pointing to a frag with an address greater than
+ than the start_frag's address, then it _could_ be down range.
+
+ The problem comes because target_frag may or may not have had
+ stretch bytes added to its address already, depending on if it is
+ before or after start frag. (And if we knew that, then we wouldn't
+ need this function.) start_frag has definitely already had stretch
+ bytes added to its address.
+
+ If target_frag's address hasn't been adjusted yet, then to
+ determine if it comes after start_frag, we need to subtract
+ stretch from start_frag's address.
+
+ If target_frag's address has been adjusted, then it might have
+ been adjusted such that it comes after start_frag's address minus
+ stretch bytes.
+
+ So, in that case, we scan for it down stream to within
+ stretch bytes. We could search to the end of the fr_chain, but
+ that ends up taking too much time (over a minute on some gnu
+ tests). */
+
+int
+is_dnrange (start_frag, sym, stretch)
+ fragS *start_frag;
+ symbolS *sym;
+ long stretch;
+{
+ if (S_GET_SEGMENT (sym) == now_seg)
+ {
+ fragS *cur_frag = symbol_get_frag (sym);
+
+ if (cur_frag->fr_address >= start_frag->fr_address - stretch)
+ {
+ int distance = stretch;
+
+ while (cur_frag && distance >= 0)
+ {
+ distance -= cur_frag->fr_fix;
+ if (cur_frag == start_frag)
+ return 0;
+ cur_frag = cur_frag->fr_next;
+ }
+ return 1;
+ }
+ }
+ return 0;
+}
+
+
+/* Relax the assembly instruction at least "min_steps".
+ Return the number of steps taken. */
+
+int
+xg_assembly_relax (istack, insn, pc_seg, pc_frag, pc_offset, min_steps,
+ stretch)
+ IStack *istack;
+ TInsn *insn;
+ segT pc_seg;
+ fragS *pc_frag; /* If pc_frag == 0, then no pc-relative. */
+ offsetT pc_offset; /* Offset in fragment. */
+ int min_steps; /* Minimum number of conversion steps. */
+ long stretch; /* Number of bytes stretched so far. */
+{
+ int steps_taken = 0;
+
+ /* assert (has no symbolic operands)
+ Some of its immeds don't fit.
+ Try to build a relaxed version.
+ This may go through a couple of stages
+ of single instruction transformations before
+ we get there. */
+
+ TInsn single_target;
+ TInsn current_insn;
+ int lateral_steps = 0;
+ int istack_size = istack->ninsn;
+
+ if (xg_symbolic_immeds_fit (insn, pc_seg, pc_frag, pc_offset, stretch)
+ && steps_taken >= min_steps)
+ {
+ istack_push (istack, insn);
+ return steps_taken;
+ }
+ tinsn_copy (&current_insn, insn);
+
+ /* Walk through all of the single instruction expansions. */
+ while (xg_is_single_relaxable_insn (&current_insn))
+ {
+ int error_val = xg_expand_narrow (&single_target, &current_insn);
+
+ assert (!error_val);
+
+ if (xg_symbolic_immeds_fit (&single_target, pc_seg, pc_frag, pc_offset,
+ stretch))
+ {
+ steps_taken++;
+ if (steps_taken >= min_steps)
+ {
+ istack_push (istack, &single_target);
+ return steps_taken;
+ }
+ }
+ tinsn_copy (&current_insn, &single_target);
+ }
+
+ /* Now check for a multi-instruction expansion. */
+ while (xg_is_relaxable_insn (&current_insn, lateral_steps))
+ {
+ if (xg_symbolic_immeds_fit (&current_insn, pc_seg, pc_frag, pc_offset,
+ stretch))
+ {
+ if (steps_taken >= min_steps)
+ {
+ istack_push (istack, &current_insn);
+ return steps_taken;
+ }
+ }
+ steps_taken++;
+ if (xg_expand_to_stack (istack, &current_insn, lateral_steps))
+ {
+ if (steps_taken >= min_steps)
+ return steps_taken;
+ }
+ lateral_steps++;
+ istack->ninsn = istack_size;
+ }
+
+ /* It's not going to work -- use the original. */
+ istack_push (istack, insn);
+ return steps_taken;
+}
+
+
+static void
+xg_force_frag_space (size)
+ int size;
+{
+ /* This may have the side effect of creating a new fragment for the
+ space to go into. I just do not like the name of the "frag"
+ functions. */
+ frag_grow (size);
+}
+
+
+void
+xg_finish_frag (last_insn, state, max_growth, is_insn)
+ char *last_insn;
+ enum xtensa_relax_statesE state;
+ int max_growth;
+ bfd_boolean is_insn;
+{
+ /* Finish off this fragment so that it has at LEAST the desired
+ max_growth. If it doesn't fit in this fragment, close this one
+ and start a new one. In either case, return a pointer to the
+ beginning of the growth area. */
+
+ fragS *old_frag;
+ xg_force_frag_space (max_growth);
+
+ old_frag = frag_now;
+
+ frag_now->fr_opcode = last_insn;
+ if (is_insn)
+ frag_now->tc_frag_data.is_insn = TRUE;
+
+ frag_var (rs_machine_dependent, max_growth, max_growth,
+ state, frag_now->fr_symbol, frag_now->fr_offset, last_insn);
+
+ /* Just to make sure that we did not split it up. */
+ assert (old_frag->fr_next == frag_now);
+}
+
+
+static bfd_boolean
+is_branch_jmp_to_next (insn, fragP)
+ TInsn *insn;
+ fragS *fragP;
+{
+ xtensa_isa isa = xtensa_default_isa;
+ int i;
+ int num_ops = xtensa_num_operands (isa, insn->opcode);
+ int target_op = -1;
+ symbolS *sym;
+ fragS *target_frag;
+
+ if (is_loop_opcode (insn->opcode))
+ return FALSE;
+
+ for (i = 0; i < num_ops; i++)
+ {
+ xtensa_operand opnd = xtensa_get_operand (isa, insn->opcode, i);
+ char *kind = xtensa_operand_kind (opnd);
+ if (strlen (kind) == 1 && *kind == 'l')
+ {
+ target_op = i;
+ break;
+ }
+ }
+ if (target_op == -1)
+ return FALSE;
+
+ if (insn->ntok <= target_op)
+ return FALSE;
+
+ if (insn->tok[target_op].X_op != O_symbol)
+ return FALSE;
+
+ sym = insn->tok[target_op].X_add_symbol;
+ if (sym == NULL)
+ return FALSE;
+
+ if (insn->tok[target_op].X_add_number != 0)
+ return FALSE;
+
+ target_frag = symbol_get_frag (sym);
+ if (target_frag == NULL)
+ return FALSE;
+
+ if (is_next_frag_target (fragP->fr_next, target_frag)
+ && S_GET_VALUE (sym) == target_frag->fr_address)
+ return TRUE;
+
+ return FALSE;
+}
+
+
+static void
+xg_add_branch_and_loop_targets (insn)
+ TInsn *insn;
+{
+ xtensa_isa isa = xtensa_default_isa;
+ int num_ops = xtensa_num_operands (isa, insn->opcode);
+
+ if (is_loop_opcode (insn->opcode))
+ {
+ int i = 1;
+ xtensa_operand opnd = xtensa_get_operand (isa, insn->opcode, i);
+ char *kind = xtensa_operand_kind (opnd);
+ if (strlen (kind) == 1 && *kind == 'l')
+ if (insn->tok[i].X_op == O_symbol)
+ add_target_symbol (insn->tok[i].X_add_symbol, TRUE);
+ return;
+ }
+
+ /* Currently, we do not add branch targets. This is an optimization
+ for later that tries to align only branch targets, not just any
+ label in a text section. */
+
+ if (align_only_targets)
+ {
+ int i;
+
+ for (i = 0; i < insn->ntok && i < num_ops; i++)
+ {
+ xtensa_operand opnd = xtensa_get_operand (isa, insn->opcode, i);
+ char *kind = xtensa_operand_kind (opnd);
+ if (strlen (kind) == 1 && *kind == 'l'
+ && insn->tok[i].X_op == O_symbol)
+ add_target_symbol (insn->tok[i].X_add_symbol, FALSE);
+ }
+ }
+}
+
+
+/* Return the transition rule that matches or NULL if none matches. */
+
+bfd_boolean
+xg_instruction_matches_rule (insn, rule)
+ TInsn *insn;
+ TransitionRule *rule;
+{
+ PreconditionList *condition_l;
+
+ if (rule->opcode != insn->opcode)
+ return FALSE;
+
+ for (condition_l = rule->conditions;
+ condition_l != NULL;
+ condition_l = condition_l->next)
+ {
+ expressionS *exp1;
+ expressionS *exp2;
+ Precondition *cond = condition_l->precond;
+
+ switch (cond->typ)
+ {
+ case OP_CONSTANT:
+ /* The expression must be the constant. */
+ assert (cond->op_num < insn->ntok);
+ exp1 = &insn->tok[cond->op_num];
+ if (!expr_is_const (exp1))
+ return FALSE;
+ switch (cond->cmp)
+ {
+ case OP_EQUAL:
+ if (get_expr_const (exp1) != cond->op_data)
+ return FALSE;
+ break;
+ case OP_NOTEQUAL:
+ if (get_expr_const (exp1) == cond->op_data)
+ return FALSE;
+ break;
+ }
+ break;
+
+ case OP_OPERAND:
+ assert (cond->op_num < insn->ntok);
+ assert (cond->op_data < insn->ntok);
+ exp1 = &insn->tok[cond->op_num];
+ exp2 = &insn->tok[cond->op_data];
+
+ switch (cond->cmp)
+ {
+ case OP_EQUAL:
+ if (!expr_is_equal (exp1, exp2))
+ return FALSE;
+ break;
+ case OP_NOTEQUAL:
+ if (expr_is_equal (exp1, exp2))
+ return FALSE;
+ break;
+ }
+ break;
+
+ case OP_LITERAL:
+ case OP_LABEL:
+ default:
+ return FALSE;
+ }
+ }
+ return TRUE;
+}
+
+
+TransitionRule *
+xg_instruction_match (insn)
+ TInsn *insn;
+{
+ TransitionTable *table = xg_build_simplify_table ();
+ TransitionList *l;
+ assert (insn->opcode < table->num_opcodes);
+
+ /* Walk through all of the possible transitions. */
+ for (l = table->table[insn->opcode]; l != NULL; l = l->next)
+ {
+ TransitionRule *rule = l->rule;
+ if (xg_instruction_matches_rule (insn, rule))
+ return rule;
+ }
+ return NULL;
+}
+
+
+/* Return false if no error. */
+
+bfd_boolean
+xg_build_token_insn (instr_spec, old_insn, new_insn)
+ BuildInstr *instr_spec;
+ TInsn *old_insn;
+ TInsn *new_insn;
+{
+ int num_ops = 0;
+ BuildOp *b_op;
+
+ switch (instr_spec->typ)
+ {
+ case INSTR_INSTR:
+ new_insn->insn_type = ITYPE_INSN;
+ new_insn->opcode = instr_spec->opcode;
+ new_insn->is_specific_opcode = FALSE;
+ break;
+ case INSTR_LITERAL_DEF:
+ new_insn->insn_type = ITYPE_LITERAL;
+ new_insn->opcode = XTENSA_UNDEFINED;
+ new_insn->is_specific_opcode = FALSE;
+ break;
+ case INSTR_LABEL_DEF:
+ as_bad (_("INSTR_LABEL_DEF not supported yet"));
+ break;
+ }
+
+ for (b_op = instr_spec->ops; b_op != NULL; b_op = b_op->next)
+ {
+ expressionS *exp;
+ const expressionS *src_exp;
+
+ num_ops++;
+ switch (b_op->typ)
+ {
+ case OP_CONSTANT:
+ /* The expression must be the constant. */
+ assert (b_op->op_num < MAX_INSN_ARGS);
+ exp = &new_insn->tok[b_op->op_num];
+ set_expr_const (exp, b_op->op_data);
+ break;
+
+ case OP_OPERAND:
+ assert (b_op->op_num < MAX_INSN_ARGS);
+ assert (b_op->op_data < (unsigned) old_insn->ntok);
+ src_exp = &old_insn->tok[b_op->op_data];
+ exp = &new_insn->tok[b_op->op_num];
+ copy_expr (exp, src_exp);
+ break;
+
+ case OP_LITERAL:
+ case OP_LABEL:
+ as_bad (_("can't handle generation of literal/labels yet"));
+ assert (0);
+
+ default:
+ as_bad (_("can't handle undefined OP TYPE"));
+ assert (0);
+ }
+ }
+
+ new_insn->ntok = num_ops;
+ return FALSE;
+}
+
+
+/* Return true if it was simplified. */
+
+bfd_boolean
+xg_simplify_insn (old_insn, new_insn)
+ TInsn *old_insn;
+ TInsn *new_insn;
+{
+ TransitionRule *rule = xg_instruction_match (old_insn);
+ BuildInstr *insn_spec;
+ if (rule == NULL)
+ return FALSE;
+
+ insn_spec = rule->to_instr;
+ /* There should only be one. */
+ assert (insn_spec != NULL);
+ assert (insn_spec->next == NULL);
+ if (insn_spec->next != NULL)
+ return FALSE;
+
+ xg_build_token_insn (insn_spec, old_insn, new_insn);
+
+ return TRUE;
+}
+
+
+/* xg_expand_assembly_insn: (1) Simplify the instruction, i.e., l32i ->
+ l32i.n. (2) Check the number of operands. (3) Place the instruction
+ tokens into the stack or if we can relax it at assembly time, place
+ multiple instructions/literals onto the stack. Return false if no
+ error. */
+
+static bfd_boolean
+xg_expand_assembly_insn (istack, orig_insn)
+ IStack *istack;
+ TInsn *orig_insn;
+{
+ int noperands;
+ TInsn new_insn;
+ memset (&new_insn, 0, sizeof (TInsn));
+
+ /* On return, we will be using the "use_tokens" with "use_ntok".
+ This will reduce things like addi to addi.n. */
+ if (code_density_available () && !orig_insn->is_specific_opcode)
+ {
+ if (xg_simplify_insn (orig_insn, &new_insn))
+ orig_insn = &new_insn;
+ }
+
+ noperands = xtensa_num_operands (xtensa_default_isa, orig_insn->opcode);
+ if (orig_insn->ntok < noperands)
+ {
+ as_bad (_("found %d operands for '%s': Expected %d"),
+ orig_insn->ntok,
+ xtensa_opcode_name (xtensa_default_isa, orig_insn->opcode),
+ noperands);
+ return TRUE;
+ }
+ if (orig_insn->ntok > noperands)
+ as_warn (_("found too many (%d) operands for '%s': Expected %d"),
+ orig_insn->ntok,
+ xtensa_opcode_name (xtensa_default_isa, orig_insn->opcode),
+ noperands);
+
+ /* If there are not enough operands, we will assert above. If there
+ are too many, just cut out the extras here. */
+
+ orig_insn->ntok = noperands;
+
+ /* Cases:
+
+ Instructions with all constant immeds:
+ Assemble them and relax the instruction if possible.
+ Give error if not possible; no fixup needed.
+
+ Instructions with symbolic immeds:
+ Assemble them with a Fix up (that may cause instruction expansion).
+ Also close out the fragment if the fixup may cause instruction expansion.
+
+ There are some other special cases where we need alignment.
+ 1) before certain instructions with required alignment (OPCODE_ALIGN)
+ 2) before labels that have jumps (LABEL_ALIGN)
+ 3) after call instructions (RETURN_ALIGN)
+ Multiple of these may be possible on the same fragment.
+ If so, make sure to satisfy the required alignment.
+ Then try to get the desired alignment. */
+
+ if (tinsn_has_invalid_symbolic_operands (orig_insn))
+ return TRUE;
+
+ if (orig_insn->is_specific_opcode || !can_relax ())
+ {
+ istack_push (istack, orig_insn);
+ return FALSE;
+ }
+
+ if (tinsn_has_symbolic_operands (orig_insn))
+ {
+ if (tinsn_has_complex_operands (orig_insn))
+ xg_assembly_relax (istack, orig_insn, 0, 0, 0, 0, 0);
+ else
+ istack_push (istack, orig_insn);
+ }
+ else
+ {
+ if (xg_immeds_fit (orig_insn))
+ istack_push (istack, orig_insn);
+ else
+ xg_assembly_relax (istack, orig_insn, 0, 0, 0, 0, 0);
+ }
+
+#if 0
+ for (i = 0; i < istack->ninsn; i++)
+ {
+ if (xg_simplify_insn (&new_insn, &istack->insn[i]))
+ istack->insn[i] = new_insn;
+ }
+#endif
+
+ return FALSE;
+}
+
+
+/* Currently all literals that are generated here are 32-bit L32R targets. */
+
+symbolS *
+xg_assemble_literal (insn)
+ /* const */ TInsn *insn;
+{
+ emit_state state;
+ symbolS *lit_sym = NULL;
+
+ /* size = 4 for L32R. It could easily be larger when we move to
+ larger constants. Add a parameter later. */
+ offsetT litsize = 4;
+ offsetT litalign = 2; /* 2^2 = 4 */
+ expressionS saved_loc;
+ set_expr_symbol_offset (&saved_loc, frag_now->fr_symbol, frag_now_fix ());
+
+ assert (insn->insn_type == ITYPE_LITERAL);
+ assert (insn->ntok = 1); /* must be only one token here */
+
+ xtensa_switch_to_literal_fragment (&state);
+
+ /* Force a 4-byte align here. Note that this opens a new frag, so all
+ literals done with this function have a frag to themselves. That's
+ important for the way text section literals work. */
+ frag_align (litalign, 0, 0);
+
+ emit_expr (&insn->tok[0], litsize);
+
+ assert (frag_now->tc_frag_data.literal_frag == NULL);
+ frag_now->tc_frag_data.literal_frag = get_literal_pool_location (now_seg);
+ frag_now->fr_symbol = xtensa_create_literal_symbol (now_seg, frag_now);
+ lit_sym = frag_now->fr_symbol;
+ frag_now->tc_frag_data.is_literal = TRUE;
+
+ /* Go back. */
+ xtensa_restore_emit_state (&state);
+ return lit_sym;
+}
+
+
+static void
+xg_assemble_literal_space (size)
+ /* const */ int size;
+{
+ emit_state state;
+ /* We might have to do something about this alignment. It only
+ takes effect if something is placed here. */
+ offsetT litalign = 2; /* 2^2 = 4 */
+ fragS *lit_saved_frag;
+
+ expressionS saved_loc;
+
+ assert (size % 4 == 0);
+ set_expr_symbol_offset (&saved_loc, frag_now->fr_symbol, frag_now_fix ());
+
+ xtensa_switch_to_literal_fragment (&state);
+
+ /* Force a 4-byte align here. */
+ frag_align (litalign, 0, 0);
+
+ xg_force_frag_space (size);
+
+ lit_saved_frag = frag_now;
+ frag_now->tc_frag_data.literal_frag = get_literal_pool_location (now_seg);
+ frag_now->tc_frag_data.is_literal = TRUE;
+ frag_now->fr_symbol = xtensa_create_literal_symbol (now_seg, frag_now);
+ xg_finish_frag (0, RELAX_LITERAL, size, FALSE);
+
+ /* Go back. */
+ xtensa_restore_emit_state (&state);
+ frag_now->tc_frag_data.literal_frag = lit_saved_frag;
+}
+
+
+symbolS *
+xtensa_create_literal_symbol (sec, frag)
+ segT sec;
+ fragS *frag;
+{
+ static int lit_num = 0;
+ static char name[256];
+ symbolS *fragSym;
+
+ sprintf (name, ".L_lit_sym%d", lit_num);
+ fragSym = xtensa_create_local_symbol (stdoutput, name, sec, 0, frag_now);
+
+ frag->tc_frag_data.is_literal = TRUE;
+ lit_num++;
+ return fragSym;
+}
+
+
+/* Create a local symbol. If it is in a linkonce section, we have to
+ be careful to make sure that if it is used in a relocation that the
+ symbol will be in the output file. */
+
+symbolS *
+xtensa_create_local_symbol (abfd, name, sec, value, frag)
+ bfd *abfd;
+ const char *name;
+ segT sec;
+ valueT value;
+ fragS *frag;
+{
+ symbolS *symbolP;
+
+ if (get_is_linkonce_section (abfd, sec))
+ {
+ symbolP = symbol_new (name, sec, value, frag);
+ S_CLEAR_EXTERNAL (symbolP);
+ /* symbolP->local = 1; */
+ }
+ else
+ symbolP = symbol_new (name, sec, value, frag);
+
+ return symbolP;
+}
+
+
+/* Return true if the section flags are marked linkonce
+ or the name is .gnu.linkonce*. */
+
+bfd_boolean
+get_is_linkonce_section (abfd, sec)
+ bfd *abfd ATTRIBUTE_UNUSED;
+ segT sec;
+{
+ flagword flags, link_once_flags;
+
+ flags = bfd_get_section_flags (abfd, sec);
+ link_once_flags = (flags & SEC_LINK_ONCE);
+
+ /* Flags might not be set yet. */
+ if (!link_once_flags)
+ {
+ static size_t len = sizeof ".gnu.linkonce.t.";
+
+ if (strncmp (segment_name (sec), ".gnu.linkonce.t.", len - 1) == 0)
+ link_once_flags = SEC_LINK_ONCE;
+ }
+ return (link_once_flags != 0);
+}
+
+
+/* Emit an instruction to the current fragment. If record_fix is true,
+ then this instruction will not change and we can go ahead and record
+ the fixup. If record_fix is false, then the instruction may change
+ and we are going to close out this fragment. Go ahead and set the
+ fr_symbol and fr_offset instead of adding a fixup. */
+
+static bfd_boolean
+xg_emit_insn (t_insn, record_fix)
+ TInsn *t_insn;
+ bfd_boolean record_fix;
+{
+ bfd_boolean ok = TRUE;
+ xtensa_isa isa = xtensa_default_isa;
+ xtensa_opcode opcode = t_insn->opcode;
+ bfd_boolean has_fixup = FALSE;
+ int noperands;
+ int i, byte_count;
+ fragS *oldfrag;
+ size_t old_size;
+ char *f;
+ static xtensa_insnbuf insnbuf = NULL;
+
+ /* Use a static pointer to the insn buffer so we don't have to call
+ malloc each time through. */
+ if (!insnbuf)
+ insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
+
+ has_fixup = tinsn_to_insnbuf (t_insn, insnbuf);
+
+ noperands = xtensa_num_operands (isa, opcode);
+ assert (noperands == t_insn->ntok);
+
+ byte_count = xtensa_insn_length (isa, opcode);
+ oldfrag = frag_now;
+ /* This should NEVER cause us to jump into a new frag;
+ we've already reserved space. */
+ old_size = frag_now_fix ();
+ f = frag_more (byte_count);
+ assert (oldfrag == frag_now);
+
+ /* This needs to generate a record that lists the parts that are
+ instructions. */
+ if (!frag_now->tc_frag_data.is_insn)
+ {
+ /* If we are at the beginning of a fragment, switch this
+ fragment to an instruction fragment. */
+ if (now_seg != absolute_section && old_size != 0)
+ as_warn (_("instruction fragment may contain data"));
+ frag_now->tc_frag_data.is_insn = TRUE;
+ }
+
+ xtensa_insnbuf_to_chars (isa, insnbuf, f);
+
+ /* dwarf2_emit_insn (byte_count); */
+
+ /* Now spit out the opcode fixup.... */
+ if (!has_fixup)
+ return !ok;
+
+ for (i = 0; i < noperands; ++i)
+ {
+ expressionS *expr = &t_insn->tok[i];
+ switch (expr->X_op)
+ {
+ case O_symbol:
+ if (get_relaxable_immed (opcode) == i)
+ {
+ if (record_fix)
+ {
+ if (!xg_add_opcode_fix (opcode, i, expr, frag_now,
+ f - frag_now->fr_literal))
+ ok = FALSE;
+ }
+ else
+ {
+ /* Write it to the fr_offset, fr_symbol. */
+ frag_now->fr_symbol = expr->X_add_symbol;
+ frag_now->fr_offset = expr->X_add_number;
+ }
+ }
+ else
+ {
+ as_bad (_("invalid operand %d on '%s'"),
+ i, xtensa_opcode_name (isa, opcode));
+ ok = FALSE;
+ }
+ break;
+
+ case O_constant:
+ case O_register:
+ break;
+
+ default:
+ as_bad (_("invalid expression for operand %d on '%s'"),
+ i, xtensa_opcode_name (isa, opcode));
+ ok = FALSE;
+ break;
+ }
+ }
+
+ return !ok;
+}
+
+
+static bfd_boolean
+xg_emit_insn_to_buf (t_insn, buf, fragP, offset, build_fix)
+ TInsn *t_insn;
+ char *buf;
+ fragS *fragP;
+ offsetT offset;
+ bfd_boolean build_fix;
+{
+ static xtensa_insnbuf insnbuf = NULL;
+ bfd_boolean has_symbolic_immed = FALSE;
+ bfd_boolean ok = TRUE;
+ if (!insnbuf)
+ insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
+
+ has_symbolic_immed = tinsn_to_insnbuf (t_insn, insnbuf);
+ if (has_symbolic_immed && build_fix)
+ {
+ /* Add a fixup. */
+ int opnum = get_relaxable_immed (t_insn->opcode);
+ expressionS *exp = &t_insn->tok[opnum];
+
+ if (!xg_add_opcode_fix (t_insn->opcode,
+ opnum, exp, fragP, offset))
+ ok = FALSE;
+ }
+ fragP->tc_frag_data.is_insn = TRUE;
+ xtensa_insnbuf_to_chars (xtensa_default_isa, insnbuf, buf);
+ return ok;
+}
+
+
+/* Put in a fixup record based on the opcode.
+ Return true on success. */
+
+bfd_boolean
+xg_add_opcode_fix (opcode, opnum, expr, fragP, offset)
+ xtensa_opcode opcode;
+ int opnum;
+ expressionS *expr;
+ fragS *fragP;
+ offsetT offset;
+{
+ bfd_reloc_code_real_type reloc;
+ reloc_howto_type *howto;
+ int insn_length;
+ fixS *the_fix;
+
+ reloc = opnum_to_reloc (opnum);
+ if (reloc == BFD_RELOC_NONE)
+ {
+ as_bad (_("invalid relocation operand %i on '%s'"),
+ opnum, xtensa_opcode_name (xtensa_default_isa, opcode));
+ return FALSE;
+ }
+
+ howto = bfd_reloc_type_lookup (stdoutput, reloc);
+
+ if (!howto)
+ {
+ as_bad (_("undefined symbol for opcode \"%s\"."),
+ xtensa_opcode_name (xtensa_default_isa, opcode));
+ return FALSE;
+ }
+
+ insn_length = xtensa_insn_length (xtensa_default_isa, opcode);
+ the_fix = fix_new_exp (fragP, offset, insn_length, expr,
+ howto->pc_relative, reloc);
+
+ if (expr->X_add_symbol &&
+ (S_IS_EXTERNAL (expr->X_add_symbol) || S_IS_WEAK (expr->X_add_symbol)))
+ the_fix->fx_plt = TRUE;
+
+ return TRUE;
+}
+
+
+void
+xg_resolve_literals (insn, lit_sym)
+ TInsn *insn;
+ symbolS *lit_sym;
+{
+ symbolS *sym = get_special_literal_symbol ();
+ int i;
+ if (lit_sym == 0)
+ return;
+ assert (insn->insn_type == ITYPE_INSN);
+ for (i = 0; i < insn->ntok; i++)
+ if (insn->tok[i].X_add_symbol == sym)
+ insn->tok[i].X_add_symbol = lit_sym;
+
+}
+
+
+void
+xg_resolve_labels (insn, label_sym)
+ TInsn *insn;
+ symbolS *label_sym;
+{
+ symbolS *sym = get_special_label_symbol ();
+ int i;
+ /* assert(!insn->is_literal); */
+ for (i = 0; i < insn->ntok; i++)
+ if (insn->tok[i].X_add_symbol == sym)
+ insn->tok[i].X_add_symbol = label_sym;
+
+}
+
+
+static void
+xg_assemble_tokens (insn)
+ /*const */ TInsn *insn;
+{
+ /* By the time we get here, there's not too much left to do.
+ 1) Check our assumptions.
+ 2) Check if the current instruction is "narrow".
+ If so, then finish the frag, create another one.
+ We could also go back to change some previous
+ "narrow" frags into no-change ones if we have more than
+ MAX_NARROW_ALIGNMENT of them without alignment restrictions
+ between them.
+
+ Cases:
+ 1) It has constant operands and doesn't fit.
+ Go ahead and assemble it so it will fail.
+ 2) It has constant operands that fit.
+ If narrow and !is_specific_opcode,
+ assemble it and put in a relocation
+ else
+ assemble it.
+ 3) It has a symbolic immediate operand
+ a) Find the worst-case relaxation required
+ b) Find the worst-case literal pool space required.
+ Insert appropriate alignment & space in the literal.
+ Assemble it.
+ Add the relocation. */
+
+ assert (insn->insn_type == ITYPE_INSN);
+
+ if (!tinsn_has_symbolic_operands (insn))
+ {
+ if (xg_is_narrow_insn (insn) && !insn->is_specific_opcode)
+ {
+ /* assemble it but add max required space */
+ int max_size = xg_get_max_narrow_insn_size (insn->opcode);
+ int min_size = xg_get_insn_size (insn);
+ char *last_insn;
+ assert (max_size == 3);
+ /* make sure we have enough space to widen it */
+ xg_force_frag_space (max_size);
+ /* Output the instruction. It may cause an error if some
+ operands do not fit. */
+ last_insn = frag_more (0);
+ if (xg_emit_insn (insn, TRUE))
+ as_warn (_("instruction with constant operands does not fit"));
+ xg_finish_frag (last_insn, RELAX_NARROW, max_size - min_size, TRUE);
+ }
+ else
+ {
+ /* Assemble it. No relocation needed. */
+ int max_size = xg_get_insn_size (insn);
+ xg_force_frag_space (max_size);
+ if (xg_emit_insn (insn, FALSE))
+ as_warn (_("instruction with constant operands does not "
+ "fit without widening"));
+ /* frag_more (max_size); */
+
+ /* Special case for jx. If the jx is the next to last
+ instruction in a loop, we will add a NOP after it. This
+ avoids a hardware issue that could occur if the jx jumped
+ to the next instruction. */
+ if (software_avoid_b_j_loop_end
+ && is_jx_opcode (insn->opcode))
+ {
+ maybe_has_b_j_loop_end = TRUE;
+ /* add 2 of these */
+ frag_now->tc_frag_data.is_insn = TRUE;
+ frag_var (rs_machine_dependent, 4, 4,
+ RELAX_ADD_NOP_IF_PRE_LOOP_END,
+ frag_now->fr_symbol, frag_now->fr_offset, NULL);
+ }
+ }
+ }
+ else
+ {
+ /* Need to assemble it with space for the relocation. */
+ if (!insn->is_specific_opcode)
+ {
+ /* Assemble it but add max required space. */
+ char *last_insn;
+ int min_size = xg_get_insn_size (insn);
+ int max_size = xg_get_max_insn_widen_size (insn->opcode);
+ int max_literal_size =
+ xg_get_max_insn_widen_literal_size (insn->opcode);
+
+#if 0
+ symbolS *immed_sym = xg_get_insn_immed_symbol (insn);
+ set_frag_segment (frag_now, now_seg);
+#endif /* 0 */
+
+ /* Make sure we have enough space to widen the instruction.
+ This may open a new fragment. */
+ xg_force_frag_space (max_size);
+ if (max_literal_size != 0)
+ xg_assemble_literal_space (max_literal_size);
+
+ /* Output the instruction. It may cause an error if some
+ operands do not fit. Emit the incomplete instruction. */
+ last_insn = frag_more (0);
+ xg_emit_insn (insn, FALSE);
+
+ xg_finish_frag (last_insn, RELAX_IMMED, max_size - min_size, TRUE);
+
+ /* Special cases for loops:
+ close_loop_end should be inserted AFTER short_loop.
+ Make sure that CLOSE loops are processed BEFORE short_loops
+ when converting them. */
+
+ /* "short_loop": add a NOP if the loop is < 4 bytes. */
+ if (software_avoid_short_loop
+ && is_loop_opcode (insn->opcode))
+ {
+ maybe_has_short_loop = TRUE;
+ frag_now->tc_frag_data.is_insn = TRUE;
+ frag_var (rs_machine_dependent, 4, 4,
+ RELAX_ADD_NOP_IF_SHORT_LOOP,
+ frag_now->fr_symbol, frag_now->fr_offset, NULL);
+ frag_now->tc_frag_data.is_insn = TRUE;
+ frag_var (rs_machine_dependent, 4, 4,
+ RELAX_ADD_NOP_IF_SHORT_LOOP,
+ frag_now->fr_symbol, frag_now->fr_offset, NULL);
+ }
+
+ /* "close_loop_end": Add up to 12 bytes of NOPs to keep a
+ loop at least 12 bytes away from another loop's loop
+ end. */
+ if (software_avoid_close_loop_end
+ && is_loop_opcode (insn->opcode))
+ {
+ maybe_has_close_loop_end = TRUE;
+ frag_now->tc_frag_data.is_insn = TRUE;
+ frag_var (rs_machine_dependent, 12, 12,
+ RELAX_ADD_NOP_IF_CLOSE_LOOP_END,
+ frag_now->fr_symbol, frag_now->fr_offset, NULL);
+ }
+ }
+ else
+ {
+ /* Assemble it in place. No expansion will be required,
+ but we'll still need a relocation record. */
+ int max_size = xg_get_insn_size (insn);
+ xg_force_frag_space (max_size);
+ if (xg_emit_insn (insn, TRUE))
+ as_warn (_("instruction's constant operands do not fit"));
+ }
+ }
+}
+
+
+/* Return true if the instruction can write to the specified
+ integer register. */
+
+static bfd_boolean
+is_register_writer (insn, regset, regnum)
+ const TInsn *insn;
+ const char *regset;
+ int regnum;
+{
+ int i;
+ int num_ops;
+ xtensa_isa isa = xtensa_default_isa;
+
+ num_ops = xtensa_num_operands (isa, insn->opcode);
+
+ for (i = 0; i < num_ops; i++)
+ {
+ xtensa_operand operand = xtensa_get_operand (isa, insn->opcode, i);
+ char inout = xtensa_operand_inout (operand);
+
+ if (inout == '>' || inout == '=')
+ {
+ if (strcmp (xtensa_operand_kind (operand), regset) == 0)
+ {
+ if ((insn->tok[i].X_op == O_register)
+ && (insn->tok[i].X_add_number == regnum))
+ return TRUE;
+ }
+ }
+ }
+ return FALSE;
+}
+
+
+static bfd_boolean
+is_bad_loopend_opcode (tinsn)
+ const TInsn * tinsn;
+{
+ xtensa_opcode opcode = tinsn->opcode;
+
+ if (opcode == XTENSA_UNDEFINED)
+ return FALSE;
+
+ if (opcode == xtensa_call0_opcode
+ || opcode == xtensa_callx0_opcode
+ || opcode == xtensa_call4_opcode
+ || opcode == xtensa_callx4_opcode
+ || opcode == xtensa_call8_opcode
+ || opcode == xtensa_callx8_opcode
+ || opcode == xtensa_call12_opcode
+ || opcode == xtensa_callx12_opcode
+ || opcode == xtensa_isync_opcode
+ || opcode == xtensa_ret_opcode
+ || opcode == xtensa_ret_n_opcode
+ || opcode == xtensa_retw_opcode
+ || opcode == xtensa_retw_n_opcode
+ || opcode == xtensa_waiti_opcode)
+ return TRUE;
+
+ /* An RSR of LCOUNT is illegal as the last opcode in a loop. */
+ if (opcode == xtensa_rsr_opcode
+ && tinsn->ntok >= 2
+ && tinsn->tok[1].X_op == O_constant
+ && tinsn->tok[1].X_add_number == 2)
+ return TRUE;
+
+ return FALSE;
+}
+
+
+/* Labels that begin with ".Ln" or ".LM" are unaligned.
+ This allows the debugger to add unaligned labels.
+ Also, the assembler generates stabs labels that need
+ not be aligned: FAKE_LABEL_NAME . {"F", "L", "endfunc"}. */
+
+bfd_boolean
+is_unaligned_label (sym)
+ symbolS *sym;
+{
+ const char *name = S_GET_NAME (sym);
+ static size_t fake_size = 0;
+
+ if (name
+ && name[0] == '.'
+ && name[1] == 'L' && (name[2] == 'n' || name[2] == 'M'))
+ return TRUE;
+
+ /* FAKE_LABEL_NAME followed by "F", "L" or "endfunc" */
+ if (fake_size == 0)
+ fake_size = strlen (FAKE_LABEL_NAME);
+
+ if (name
+ && strncmp (FAKE_LABEL_NAME, name, fake_size) == 0
+ && (name[fake_size] == 'F'
+ || name[fake_size] == 'L'
+ || (name[fake_size] == 'e'
+ && strncmp ("endfunc", name+fake_size, 7) == 0)))
+ return TRUE;
+
+ return FALSE;
+}
+
+
+fragS *
+next_non_empty_frag (fragP)
+ const fragS *fragP;
+{
+ fragS *next_fragP = fragP->fr_next;
+
+ /* Sometimes an empty will end up here due storage allocation issues.
+ So we have to skip until we find something legit. */
+ while (next_fragP && next_fragP->fr_fix == 0)
+ next_fragP = next_fragP->fr_next;
+
+ if (next_fragP == NULL || next_fragP->fr_fix == 0)
+ return NULL;
+
+ return next_fragP;
+}
+
+
+xtensa_opcode
+next_frag_opcode (fragP)
+ const fragS * fragP;
+{
+ const fragS *next_fragP = next_non_empty_frag (fragP);
+ static xtensa_insnbuf insnbuf = NULL;
+ xtensa_isa isa = xtensa_default_isa;
+
+ if (!insnbuf)
+ insnbuf = xtensa_insnbuf_alloc (isa);
+
+ if (next_fragP == NULL)
+ return XTENSA_UNDEFINED;
+
+ xtensa_insnbuf_from_chars (isa, insnbuf, next_fragP->fr_literal);
+ return xtensa_decode_insn (isa, insnbuf);
+}
+
+
+/* Return true if the target frag is one of the next non-empty frags. */
+
+bfd_boolean
+is_next_frag_target (fragP, target)
+ const fragS *fragP;
+ const fragS *target;
+{
+ if (fragP == NULL)
+ return FALSE;
+
+ for (; fragP; fragP = fragP->fr_next)
+ {
+ if (fragP == target)
+ return TRUE;
+ if (fragP->fr_fix != 0)
+ return FALSE;
+ if (fragP->fr_type == rs_fill && fragP->fr_offset != 0)
+ return FALSE;
+ if ((fragP->fr_type == rs_align || fragP->fr_type == rs_align_code)
+ && ((fragP->fr_address % (1 << fragP->fr_offset)) != 0))
+ return FALSE;
+ if (fragP->fr_type == rs_space)
+ return FALSE;
+ }
+ return FALSE;
+}
+
+
+/* If the next legit fragment is an end-of-loop marker,
+ switch its state so it will instantiate a NOP. */
+
+static void
+update_next_frag_nop_state (fragP)
+ fragS *fragP;
+{
+ fragS *next_fragP = fragP->fr_next;
+
+ while (next_fragP && next_fragP->fr_fix == 0)
+ {
+ if (next_fragP->fr_type == rs_machine_dependent
+ && next_fragP->fr_subtype == RELAX_LOOP_END)
+ {
+ next_fragP->fr_subtype = RELAX_LOOP_END_ADD_NOP;
+ return;
+ }
+ next_fragP = next_fragP->fr_next;
+ }
+}
+
+
+static bfd_boolean
+next_frag_is_branch_target (fragP)
+ const fragS *fragP;
+{
+ /* Sometimes an empty will end up here due storage allocation issues,
+ so we have to skip until we find something legit. */
+ for (fragP = fragP->fr_next; fragP; fragP = fragP->fr_next)
+ {
+ if (fragP->tc_frag_data.is_branch_target)
+ return TRUE;
+ if (fragP->fr_fix != 0)
+ break;
+ }
+ return FALSE;
+}
+
+
+static bfd_boolean
+next_frag_is_loop_target (fragP)
+ const fragS *fragP;
+{
+ /* Sometimes an empty will end up here due storage allocation issues.
+ So we have to skip until we find something legit. */
+ for (fragP = fragP->fr_next; fragP; fragP = fragP->fr_next)
+ {
+ if (fragP->tc_frag_data.is_loop_target)
+ return TRUE;
+ if (fragP->fr_fix != 0)
+ break;
+ }
+ return FALSE;
+}
+
+
+static addressT
+next_frag_pre_opcode_bytes (fragp)
+ const fragS *fragp;
+{
+ const fragS *next_fragp = fragp->fr_next;
+
+ xtensa_opcode next_opcode = next_frag_opcode (fragp);
+ if (!is_loop_opcode (next_opcode))
+ return 0;
+
+ /* Sometimes an empty will end up here due storage allocation issues.
+ So we have to skip until we find something legit. */
+ while (next_fragp->fr_fix == 0)
+ next_fragp = next_fragp->fr_next;
+
+ if (next_fragp->fr_type != rs_machine_dependent)
+ return 0;
+
+ /* There is some implicit knowledge encoded in here.
+ The LOOP instructions that are NOT RELAX_IMMED have
+ been relaxed. */
+ if (next_fragp->fr_subtype > RELAX_IMMED)
+ return get_expanded_loop_offset (next_opcode);
+
+ return 0;
+}
+
+
+/* Mark a location where we can later insert literal frags. Update
+ the section's literal_pool_loc, so subsequent literals can be
+ placed nearest to their use. */
+
+static void
+xtensa_mark_literal_pool_location (move_labels)
+ bfd_boolean move_labels;
+{
+ /* Any labels pointing to the current location need
+ to be adjusted to after the literal pool. */
+ emit_state s;
+ fragS *label_target = frag_now;
+ fragS *pool_location;
+ offsetT label_offset = frag_now_fix ();
+
+ frag_align (2, 0, 0);
+
+ /* We stash info in the fr_var of these frags
+ so we can later move the literal's fixes into this
+ frchain's fix list. We can use fr_var because fr_var's
+ interpretation depends solely on the fr_type and subtype. */
+ pool_location = frag_now;
+ frag_variant (rs_machine_dependent, 0, (int) frchain_now,
+ RELAX_LITERAL_POOL_BEGIN, NULL, 0, NULL);
+ frag_variant (rs_machine_dependent, 0, (int) now_seg,
+ RELAX_LITERAL_POOL_END, NULL, 0, NULL);
+
+ /* Now put a frag into the literal pool that points to this location. */
+ set_literal_pool_location (now_seg, pool_location);
+ xtensa_switch_to_literal_fragment (&s);
+
+ /* Close whatever frag is there. */
+ frag_variant (rs_fill, 0, 0, 0, NULL, 0, NULL);
+ frag_now->tc_frag_data.literal_frag = pool_location;
+ frag_variant (rs_fill, 0, 0, 0, NULL, 0, NULL);
+ xtensa_restore_emit_state (&s);
+ if (move_labels)
+ xtensa_move_labels (label_target, label_offset, frag_now, 0);
+}
+
+
+static void
+xtensa_move_labels (old_frag, old_offset, new_frag, new_offset)
+ fragS *old_frag;
+ valueT old_offset;
+ fragS *new_frag ATTRIBUTE_UNUSED;
+ valueT new_offset;
+{
+ symbolS *old_sym;
+
+ /* Repeat until there are no more.... */
+ for (old_sym = xtensa_find_label (old_frag, old_offset, TRUE);
+ old_sym;
+ old_sym = xtensa_find_label (old_frag, old_offset, TRUE))
+ {
+ S_SET_VALUE (old_sym, (valueT) new_offset);
+ symbol_set_frag (old_sym, frag_now);
+ }
+}
+
+
+/* Assemble a NOP of the requested size in the buffer. User must have
+ allocated "buf" with at least "size" bytes. */
+
+void
+assemble_nop (size, buf)
+ size_t size;
+ char *buf;
+{
+ static xtensa_insnbuf insnbuf = NULL;
+ TInsn t_insn;
+ if (!insnbuf)
+ insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
+
+ tinsn_init (&t_insn);
+ switch (size)
+ {
+ case 2:
+ t_insn.opcode = xtensa_nop_n_opcode;
+ t_insn.ntok = 0;
+ if (t_insn.opcode == XTENSA_UNDEFINED)
+ as_fatal (_("opcode 'NOP.N' unavailable in this configuration"));
+ tinsn_to_insnbuf (&t_insn, insnbuf);
+ xtensa_insnbuf_to_chars (xtensa_default_isa, insnbuf, buf);
+ break;
+
+ case 3:
+ t_insn.opcode = xtensa_or_opcode;
+ assert (t_insn.opcode != XTENSA_UNDEFINED);
+ if (t_insn.opcode == XTENSA_UNDEFINED)
+ as_fatal (_("opcode 'OR' unavailable in this configuration"));
+ set_expr_const (&t_insn.tok[0], 1);
+ set_expr_const (&t_insn.tok[1], 1);
+ set_expr_const (&t_insn.tok[2], 1);
+ t_insn.ntok = 3;
+ tinsn_to_insnbuf (&t_insn, insnbuf);
+ xtensa_insnbuf_to_chars (xtensa_default_isa, insnbuf, buf);
+ break;
+
+ default:
+ as_fatal (_("invalid %d-byte NOP requested"), size);
+ }
+}
+
+
+/* Return the number of bytes for the offset of the expanded loop
+ instruction. This should be incorporated into the relaxation
+ specification but is hard-coded here. This is used to auto-align
+ the loop instruction. It is invalid to call this function if the
+ configuration does not have loops or if the opcode is not a loop
+ opcode. */
+
+static addressT
+get_expanded_loop_offset (opcode)
+ xtensa_opcode opcode;
+{
+ /* This is the OFFSET of the loop instruction in the expanded loop.
+ This MUST correspond directly to the specification of the loop
+ expansion. It will be validated on fragment conversion. */
+ if (opcode == XTENSA_UNDEFINED)
+ as_fatal (_("get_expanded_loop_offset: undefined opcode"));
+ if (opcode == xtensa_loop_opcode)
+ return 0;
+ if (opcode == xtensa_loopnez_opcode)
+ return 3;
+ if (opcode == xtensa_loopgtz_opcode)
+ return 6;
+ as_fatal (_("get_expanded_loop_offset: invalid opcode"));
+ return 0;
+}
+
+
+fragS *
+get_literal_pool_location (seg)
+ segT seg;
+{
+ return seg_info (seg)->tc_segment_info_data.literal_pool_loc;
+}
+
+
+static void
+set_literal_pool_location (seg, literal_pool_loc)
+ segT seg;
+ fragS *literal_pool_loc;
+{
+ seg_info (seg)->tc_segment_info_data.literal_pool_loc = literal_pool_loc;
+}
+
+
+/* External Functions and Other GAS Hooks. */
+
+const char *
+xtensa_target_format ()
+{
+ return (target_big_endian ? "elf32-xtensa-be" : "elf32-xtensa-le");
+}
+
+
+void
+xtensa_file_arch_init (abfd)
+ bfd *abfd;
+{
+ bfd_set_private_flags (abfd, 0x100 | 0x200);
+}
+
+
+void
+md_number_to_chars (buf, val, n)
+ char *buf;
+ valueT val;
+ int n;
+{
+ if (target_big_endian)
+ number_to_chars_bigendian (buf, val, n);
+ else
+ number_to_chars_littleendian (buf, val, n);
+}
+
+
+/* This function is called once, at assembler startup time. It should
+ set up all the tables, etc. that the MD part of the assembler will
+ need. */
+
+void
+md_begin ()
+{
+ segT current_section = now_seg;
+ int current_subsec = now_subseg;
+ xtensa_isa isa;
+
+#if STATIC_LIBISA
+ isa = xtensa_isa_init ();
+#else
+ /* ISA was already initialized by xtensa_init(). */
+ isa = xtensa_default_isa;
+#endif
+
+ /* Set up the .literal, .fini.literal and .init.literal sections. */
+ memset (&default_lit_sections, 0, sizeof (default_lit_sections));
+ default_lit_sections.init_lit_seg_name = INIT_LITERAL_SECTION_NAME;
+ default_lit_sections.fini_lit_seg_name = FINI_LITERAL_SECTION_NAME;
+ default_lit_sections.lit_seg_name = LITERAL_SECTION_NAME;
+
+ subseg_set (current_section, current_subsec);
+
+ xtensa_addi_opcode = xtensa_opcode_lookup (isa, "addi");
+ xtensa_addmi_opcode = xtensa_opcode_lookup (isa, "addmi");
+ xtensa_call0_opcode = xtensa_opcode_lookup (isa, "call0");
+ xtensa_call4_opcode = xtensa_opcode_lookup (isa, "call4");
+ xtensa_call8_opcode = xtensa_opcode_lookup (isa, "call8");
+ xtensa_call12_opcode = xtensa_opcode_lookup (isa, "call12");
+ xtensa_callx0_opcode = xtensa_opcode_lookup (isa, "callx0");
+ xtensa_callx4_opcode = xtensa_opcode_lookup (isa, "callx4");
+ xtensa_callx8_opcode = xtensa_opcode_lookup (isa, "callx8");
+ xtensa_callx12_opcode = xtensa_opcode_lookup (isa, "callx12");
+ xtensa_entry_opcode = xtensa_opcode_lookup (isa, "entry");
+ xtensa_isync_opcode = xtensa_opcode_lookup (isa, "isync");
+ xtensa_j_opcode = xtensa_opcode_lookup (isa, "j");
+ xtensa_jx_opcode = xtensa_opcode_lookup (isa, "jx");
+ xtensa_loop_opcode = xtensa_opcode_lookup (isa, "loop");
+ xtensa_loopnez_opcode = xtensa_opcode_lookup (isa, "loopnez");
+ xtensa_loopgtz_opcode = xtensa_opcode_lookup (isa, "loopgtz");
+ xtensa_nop_n_opcode = xtensa_opcode_lookup (isa, "nop.n");
+ xtensa_or_opcode = xtensa_opcode_lookup (isa, "or");
+ xtensa_ret_opcode = xtensa_opcode_lookup (isa, "ret");
+ xtensa_ret_n_opcode = xtensa_opcode_lookup (isa, "ret.n");
+ xtensa_retw_opcode = xtensa_opcode_lookup (isa, "retw");
+ xtensa_retw_n_opcode = xtensa_opcode_lookup (isa, "retw.n");
+ xtensa_rsr_opcode = xtensa_opcode_lookup (isa, "rsr");
+ xtensa_waiti_opcode = xtensa_opcode_lookup (isa, "waiti");
+}
+
+
+/* tc_frob_label hook */
+
+void
+xtensa_frob_label (sym)
+ symbolS *sym;
+{
+ xtensa_define_label (sym);
+ if (is_loop_target_label (sym)
+ && (get_last_insn_flags (now_seg, now_subseg)
+ & FLAG_IS_BAD_LOOPEND) != 0)
+ as_bad (_("invalid last instruction for a zero-overhead loop"));
+
+ /* No target aligning in the absolute section. */
+ if (now_seg != absolute_section && align_targets
+ && !is_unaligned_label (sym))
+ {
+ fragS *old_frag = frag_now;
+ offsetT old_offset = frag_now_fix ();
+ if (frag_now->tc_frag_data.is_literal)
+ return;
+ /* frag_now->tc_frag_data.is_insn = TRUE; */
+ frag_var (rs_machine_dependent, 4, 4,
+ RELAX_DESIRE_ALIGN_IF_TARGET,
+ frag_now->fr_symbol, frag_now->fr_offset, NULL);
+ xtensa_move_labels (old_frag, old_offset, frag_now, 0);
+ /* Once we know whether or not the label is a branch target
+ We will suppress some of these alignments. */
+ }
+}
+
+
+/* md_flush_pending_output hook */
+
+void
+xtensa_flush_pending_output ()
+{
+ /* If there is a non-zero instruction fragment, close it. */
+ if (frag_now_fix () != 0 && frag_now->tc_frag_data.is_insn)
+ {
+ frag_wane (frag_now);
+ frag_new (0);
+ }
+ frag_now->tc_frag_data.is_insn = FALSE;
+}
+
+
+void
+md_assemble (str)
+ char *str;
+{
+ xtensa_isa isa = xtensa_default_isa;
+ char *opname;
+ unsigned opnamelen;
+ bfd_boolean has_underbar = FALSE;
+ char *arg_strings[MAX_INSN_ARGS];
+ int num_args;
+ IStack istack; /* Put instructions into here. */
+ TInsn orig_insn; /* Original instruction from the input. */
+ int i;
+ symbolS *lit_sym = NULL;
+
+ if (frag_now->tc_frag_data.is_literal)
+ {
+ static bfd_boolean reported = 0;
+ if (reported < 4)
+ as_bad (_("cannot assemble '%s' into a literal fragment"), str);
+ if (reported == 3)
+ as_bad (_("..."));
+ reported++;
+ return;
+ }
+
+ istack_init (&istack);
+ tinsn_init (&orig_insn);
+
+ /* Split off the opcode. */
+ opnamelen = strspn (str, "abcdefghijklmnopqrstuvwxyz_/0123456789.");
+ opname = xmalloc (opnamelen + 1);
+ memcpy (opname, str, opnamelen);
+ opname[opnamelen] = '\0';
+
+ num_args = tokenize_arguments (arg_strings, str + opnamelen);
+ if (num_args == -1)
+ {
+ as_bad (_("syntax error"));
+ return;
+ }
+
+ if (xg_translate_idioms (&opname, &num_args, arg_strings))
+ return;
+
+ /* Check for an underbar prefix. */
+ if (*opname == '_')
+ {
+ has_underbar = TRUE;
+ opname += 1;
+ }
+
+ orig_insn.insn_type = ITYPE_INSN;
+ orig_insn.ntok = 0;
+ orig_insn.is_specific_opcode = (has_underbar || !use_generics ());
+ specific_opcode = orig_insn.is_specific_opcode;
+
+ orig_insn.opcode = xtensa_opcode_lookup (isa, opname);
+ if (orig_insn.opcode == XTENSA_UNDEFINED)
+ {
+ as_bad (_("unknown opcode %s"), opname);
+ return;
+ }
+
+ if (frag_now_fix () != 0 && !frag_now->tc_frag_data.is_insn)
+ {
+ frag_wane (frag_now);
+ frag_new (0);
+ }
+
+ if (software_a0_b_retw_interlock)
+ {
+ if ((get_last_insn_flags (now_seg, now_subseg) & FLAG_IS_A0_WRITER) != 0
+ && is_conditional_branch_opcode (orig_insn.opcode))
+ {
+ has_a0_b_retw = TRUE;
+
+ /* Mark this fragment with the special RELAX_ADD_NOP_IF_A0_B_RETW.
+ After the first assembly pass we will check all of them and
+ add a nop if needed. */
+ frag_now->tc_frag_data.is_insn = TRUE;
+ frag_var (rs_machine_dependent, 4, 4,
+ RELAX_ADD_NOP_IF_A0_B_RETW,
+ frag_now->fr_symbol, frag_now->fr_offset, NULL);
+ frag_now->tc_frag_data.is_insn = TRUE;
+ frag_var (rs_machine_dependent, 4, 4,
+ RELAX_ADD_NOP_IF_A0_B_RETW,
+ frag_now->fr_symbol, frag_now->fr_offset, NULL);
+ }
+ }
+
+ /* Special case: The call instructions should be marked "specific opcode"
+ to keep them from expanding. */
+ if (!use_longcalls () && is_direct_call_opcode (orig_insn.opcode))
+ orig_insn.is_specific_opcode = TRUE;
+
+ /* Parse the arguments. */
+ if (parse_arguments (&orig_insn, num_args, arg_strings))
+ {
+ as_bad (_("syntax error"));
+ return;
+ }
+
+ /* Free the opcode and argument strings, now that they've been parsed. */
+ free (has_underbar ? opname - 1 : opname);
+ opname = 0;
+ while (num_args-- > 0)
+ free (arg_strings[num_args]);
+
+ /* Check for the right number and type of arguments. */
+ if (tinsn_check_arguments (&orig_insn))
+ return;
+
+ /* See if the instruction implies an aligned section. */
+ if (is_entry_opcode (orig_insn.opcode) || is_loop_opcode (orig_insn.opcode))
+ record_alignment (now_seg, 2);
+
+ xg_add_branch_and_loop_targets (&orig_insn);
+
+ /* Special cases for instructions that force an alignment... */
+ if (!orig_insn.is_specific_opcode && is_loop_opcode (orig_insn.opcode))
+ {
+ fragS *old_frag = frag_now;
+ offsetT old_offset = frag_now_fix ();
+ symbolS *old_sym = NULL;
+ size_t max_fill;
+
+ frag_now->tc_frag_data.is_insn = TRUE;
+ frag_now->tc_frag_data.is_no_density = !code_density_available ();
+ max_fill = get_text_align_max_fill_size
+ (get_text_align_power (XTENSA_FETCH_WIDTH),
+ TRUE, frag_now->tc_frag_data.is_no_density);
+ frag_var (rs_machine_dependent, max_fill, max_fill,
+ RELAX_ALIGN_NEXT_OPCODE, frag_now->fr_symbol,
+ frag_now->fr_offset, NULL);
+
+ /* Repeat until there are no more. */
+ while ((old_sym = xtensa_find_label (old_frag, old_offset, FALSE)))
+ {
+ S_SET_VALUE (old_sym, (valueT) 0);
+ symbol_set_frag (old_sym, frag_now);
+ }
+ }
+
+ /* Special count for "entry" instruction. */
+ if (is_entry_opcode (orig_insn.opcode))
+ {
+ /* Check that the second opcode (#1) is >= 16. */
+ if (orig_insn.ntok >= 2)
+ {
+ expressionS *exp = &orig_insn.tok[1];
+ switch (exp->X_op)
+ {
+ case O_constant:
+ if (exp->X_add_number < 16)
+ as_warn (_("entry instruction with stack decrement < 16"));
+ break;
+
+ default:
+ as_warn (_("entry instruction with non-constant decrement"));
+ }
+ }
+ }
+
+ if (!orig_insn.is_specific_opcode && is_entry_opcode (orig_insn.opcode))
+ {
+ xtensa_mark_literal_pool_location (TRUE);
+
+ /* Automatically align ENTRY instructions. */
+ frag_align (2, 0, 0);
+ }
+
+ if (software_a0_b_retw_interlock)
+ set_last_insn_flags (now_seg, now_subseg, FLAG_IS_A0_WRITER,
+ is_register_writer (&orig_insn, "a", 0));
+
+ set_last_insn_flags (now_seg, now_subseg, FLAG_IS_BAD_LOOPEND,
+ is_bad_loopend_opcode (&orig_insn));
+
+ /* Finish it off:
+ assemble_tokens (opcode, tok, ntok);
+ expand the tokens from the orig_insn into the
+ stack of instructions that will not expand
+ unless required at relaxation time. */
+ if (xg_expand_assembly_insn (&istack, &orig_insn))
+ return;
+
+ for (i = 0; i < istack.ninsn; i++)
+ {
+ TInsn *insn = &istack.insn[i];
+ if (insn->insn_type == ITYPE_LITERAL)
+ {
+ assert (lit_sym == NULL);
+ lit_sym = xg_assemble_literal (insn);
+ }
+ else
+ {
+ if (lit_sym)
+ xg_resolve_literals (insn, lit_sym);
+ xg_assemble_tokens (insn);
+ }
+ }
+
+ /* Now, if the original opcode was a call... */
+ if (align_targets && is_call_opcode (orig_insn.opcode))
+ {
+ frag_now->tc_frag_data.is_insn = TRUE;
+ frag_var (rs_machine_dependent, 4, 4,
+ RELAX_DESIRE_ALIGN,
+ frag_now->fr_symbol,
+ frag_now->fr_offset,
+ NULL);
+ }
+}
+
+
+/* TC_CONS_FIX_NEW hook: Check for "@PLT" suffix on symbol references.
+ If found, use an XTENSA_PLT reloc for 4-byte values. Otherwise, this
+ is the same as the standard code in read.c. */
+
+void
+xtensa_cons_fix_new (frag, where, size, exp)
+ fragS *frag;
+ int where;
+ int size;
+ expressionS *exp;
+{
+ bfd_reloc_code_real_type r;
+ bfd_boolean plt = FALSE;
+
+ if (*input_line_pointer == '@')
+ {
+ if (!strncmp (input_line_pointer, PLT_SUFFIX, strlen (PLT_SUFFIX) - 1)
+ && !strncmp (input_line_pointer, plt_suffix,
+ strlen (plt_suffix) - 1))
+ {
+ as_bad (_("undefined @ suffix '%s', expected '%s'"),
+ input_line_pointer, plt_suffix);
+ ignore_rest_of_line ();
+ return;
+ }
+
+ input_line_pointer += strlen (plt_suffix);
+ plt = TRUE;
+ }
+
+ switch (size)
+ {
+ case 1:
+ r = BFD_RELOC_8;
+ break;
+ case 2:
+ r = BFD_RELOC_16;
+ break;
+ case 4:
+ r = plt ? BFD_RELOC_XTENSA_PLT : BFD_RELOC_32;
+ break;
+ case 8:
+ r = BFD_RELOC_64;
+ break;
+ default:
+ as_bad (_("unsupported BFD relocation size %u"), size);
+ r = BFD_RELOC_32;
+ break;
+ }
+ fix_new_exp (frag, where, size, exp, 0, r);
+}
+
+
+/* TC_FRAG_INIT hook */
+
+void
+xtensa_frag_init (frag)
+ fragS *frag;
+{
+ frag->tc_frag_data.is_no_density = !code_density_available ();
+}
+
+
+symbolS *
+md_undefined_symbol (name)
+ char *name ATTRIBUTE_UNUSED;
+{
+ return NULL;
+}
+
+
+/* Round up a section size to the appropriate boundary. */
+
+valueT
+md_section_align (segment, size)
+ segT segment ATTRIBUTE_UNUSED;
+ valueT size;
+{
+ return size; /* Byte alignment is fine. */
+}
+
+
+long
+md_pcrel_from (fixP)
+ fixS *fixP;
+{
+ char *insn_p;
+ static xtensa_insnbuf insnbuf = NULL;
+ int opnum;
+ xtensa_operand operand;
+ xtensa_opcode opcode;
+ xtensa_isa isa = xtensa_default_isa;
+ valueT addr = fixP->fx_where + fixP->fx_frag->fr_address;
+
+ if (fixP->fx_done)
+ return addr;
+
+ if (fixP->fx_r_type == BFD_RELOC_XTENSA_ASM_EXPAND)
+ return addr;
+
+ if (!insnbuf)
+ insnbuf = xtensa_insnbuf_alloc (isa);
+
+ insn_p = &fixP->fx_frag->fr_literal[fixP->fx_where];
+ xtensa_insnbuf_from_chars (isa, insnbuf, insn_p);
+ opcode = xtensa_decode_insn (isa, insnbuf);
+
+ opnum = reloc_to_opnum (fixP->fx_r_type);
+
+ if (opnum < 0)
+ as_fatal (_("invalid operand relocation for '%s' instruction"),
+ xtensa_opcode_name (isa, opcode));
+ if (opnum >= xtensa_num_operands (isa, opcode))
+ as_fatal (_("invalid relocation for operand %d in '%s' instruction"),
+ opnum, xtensa_opcode_name (isa, opcode));
+ operand = xtensa_get_operand (isa, opcode, opnum);
+ if (!operand)
+ {
+ as_warn_where (fixP->fx_file,
+ fixP->fx_line,
+ _("invalid relocation type %d for %s instruction"),
+ fixP->fx_r_type, xtensa_opcode_name (isa, opcode));
+ return addr;
+ }
+
+ if (!operand_is_pcrel_label (operand))
+ {
+ as_bad_where (fixP->fx_file,
+ fixP->fx_line,
+ _("invalid relocation for operand %d of '%s'"),
+ opnum, xtensa_opcode_name (isa, opcode));
+ return addr;
+ }
+ if (!xtensa_operand_isPCRelative (operand))
+ {
+ as_warn_where (fixP->fx_file,
+ fixP->fx_line,
+ _("non-PCREL relocation operand %d for '%s': %s"),
+ opnum, xtensa_opcode_name (isa, opcode),
+ bfd_get_reloc_code_name (fixP->fx_r_type));
+ return addr;
+ }
+
+ return 0 - xtensa_operand_do_reloc (operand, 0, addr);
+}
+
+
+/* tc_symbol_new_hook */
+
+void
+xtensa_symbol_new_hook (symbolP)
+ symbolS *symbolP;
+{
+ symbolP->sy_tc.plt = 0;
+}
+
+
+/* tc_fix_adjustable hook */
+
+bfd_boolean
+xtensa_fix_adjustable (fixP)
+ fixS *fixP;
+{
+ /* We need the symbol name for the VTABLE entries. */
+ if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
+ || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
+ return 0;
+
+ return 1;
+}
+
+
+void
+md_apply_fix3 (fixP, valP, seg)
+ fixS *fixP;
+ valueT *valP;
+ segT seg ATTRIBUTE_UNUSED;
+{
+ if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
+ {
+ /* This happens when the relocation is within the current section.
+ It seems this implies a PCREL operation. We'll catch it and error
+ if not. */
+
+ char *const fixpos = fixP->fx_frag->fr_literal + fixP->fx_where;
+ static xtensa_insnbuf insnbuf = NULL;
+ xtensa_opcode opcode;
+ xtensa_isa isa;
+
+ switch (fixP->fx_r_type)
+ {
+ case BFD_RELOC_XTENSA_ASM_EXPAND:
+ fixP->fx_done = 1;
+ break;
+
+ case BFD_RELOC_XTENSA_ASM_SIMPLIFY:
+ as_bad (_("unhandled local relocation fix %s"),
+ bfd_get_reloc_code_name (fixP->fx_r_type));
+ break;
+
+ case BFD_RELOC_32:
+ case BFD_RELOC_16:
+ case BFD_RELOC_8:
+ /* The only one we support that isn't an instruction field. */
+ md_number_to_chars (fixpos, *valP, fixP->fx_size);
+ fixP->fx_done = 1;
+ break;
+
+ case BFD_RELOC_XTENSA_OP0:
+ case BFD_RELOC_XTENSA_OP1:
+ case BFD_RELOC_XTENSA_OP2:
+ isa = xtensa_default_isa;
+ if (!insnbuf)
+ insnbuf = xtensa_insnbuf_alloc (isa);
+
+ xtensa_insnbuf_from_chars (isa, insnbuf, fixpos);
+ opcode = xtensa_decode_insn (isa, insnbuf);
+ if (opcode == XTENSA_UNDEFINED)
+ as_fatal (_("undecodable FIX"));
+
+ xtensa_insnbuf_set_immediate_field (opcode, insnbuf, *valP,
+ fixP->fx_file, fixP->fx_line);
+
+ fixP->fx_frag->tc_frag_data.is_insn = TRUE;
+ xtensa_insnbuf_to_chars (isa, insnbuf, fixpos);
+ fixP->fx_done = 1;
+ break;
+
+ case BFD_RELOC_VTABLE_INHERIT:
+ case BFD_RELOC_VTABLE_ENTRY:
+ fixP->fx_done = 0;
+ break;
+
+ default:
+ as_bad (_("unhandled local relocation fix %s"),
+ bfd_get_reloc_code_name (fixP->fx_r_type));
+ }
+ }
+}
+
+
+char *
+md_atof (type, litP, sizeP)
+ int type;
+ char *litP;
+ int *sizeP;
+{
+ int prec;
+ LITTLENUM_TYPE words[4];
+ char *t;
+ int i;
+
+ switch (type)
+ {
+ case 'f':
+ prec = 2;
+ break;
+
+ case 'd':
+ prec = 4;
+ break;
+
+ default:
+ *sizeP = 0;
+ return "bad call to md_atof";
+ }
+
+ t = atof_ieee (input_line_pointer, type, words);
+ if (t)
+ input_line_pointer = t;
+
+ *sizeP = prec * 2;
+
+ for (i = prec - 1; i >= 0; i--)
+ {
+ int idx = i;
+ if (target_big_endian)
+ idx = (prec - 1 - i);
+
+ md_number_to_chars (litP, (valueT) words[idx], 2);
+ litP += 2;
+ }
+
+ return NULL;
+}
+
+
+int
+md_estimate_size_before_relax (fragP, seg)
+ fragS *fragP;
+ segT seg ATTRIBUTE_UNUSED;
+{
+ return fragP->tc_frag_data.text_expansion;
+}
+
+
+/* Translate internal representation of relocation info to BFD target
+ format. */
+
+arelent *
+tc_gen_reloc (section, fixp)
+ asection *section ATTRIBUTE_UNUSED;
+ fixS *fixp;
+{
+ arelent *reloc;
+
+ reloc = (arelent *) xmalloc (sizeof (arelent));
+ reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
+ *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
+ reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
+
+ /* Make sure none of our internal relocations make it this far.
+ They'd better have been fully resolved by this point. */
+ assert ((int) fixp->fx_r_type > 0);
+
+ reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
+ if (reloc->howto == NULL)
+ {
+ as_bad_where (fixp->fx_file, fixp->fx_line,
+ _("cannot represent `%s' relocation in object file"),
+ bfd_get_reloc_code_name (fixp->fx_r_type));
+ return NULL;
+ }
+
+ if (!fixp->fx_pcrel != !reloc->howto->pc_relative)
+ {
+ as_fatal (_("internal error? cannot generate `%s' relocation"),
+ bfd_get_reloc_code_name (fixp->fx_r_type));
+ }
+ assert (!fixp->fx_pcrel == !reloc->howto->pc_relative);
+
+ reloc->addend = fixp->fx_offset;
+
+ switch (fixp->fx_r_type)
+ {
+ case BFD_RELOC_XTENSA_OP0:
+ case BFD_RELOC_XTENSA_OP1:
+ case BFD_RELOC_XTENSA_OP2:
+ case BFD_RELOC_XTENSA_ASM_EXPAND:
+ case BFD_RELOC_32:
+ case BFD_RELOC_XTENSA_PLT:
+ case BFD_RELOC_VTABLE_INHERIT:
+ case BFD_RELOC_VTABLE_ENTRY:
+ break;
+
+ case BFD_RELOC_XTENSA_ASM_SIMPLIFY:
+ as_warn (_("emitting simplification relocation"));
+ break;
+
+ default:
+ as_warn (_("emitting unknown relocation"));
+ }
+
+ return reloc;
+}
+
+
+void
+xtensa_end ()
+{
+ directive_balance ();
+ xtensa_move_literals ();
+
+ xtensa_reorder_segments ();
+ xtensa_mark_target_fragments ();
+ xtensa_cleanup_align_frags ();
+ xtensa_fix_target_frags ();
+ if (software_a0_b_retw_interlock && has_a0_b_retw)
+ xtensa_fix_a0_b_retw_frags ();
+ if (software_avoid_b_j_loop_end && maybe_has_b_j_loop_end)
+ xtensa_fix_b_j_loop_end_frags ();
+
+ /* "close_loop_end" should be processed BEFORE "short_loop". */
+ if (software_avoid_close_loop_end && maybe_has_close_loop_end)
+ xtensa_fix_close_loop_end_frags ();
+
+ if (software_avoid_short_loop && maybe_has_short_loop)
+ xtensa_fix_short_loop_frags ();
+
+ xtensa_sanity_check ();
+}
+
+
+static void
+xtensa_cleanup_align_frags ()
+{
+ frchainS *frchP;
+
+ for (frchP = frchain_root; frchP; frchP = frchP->frch_next)
+ {
+ fragS *fragP;
+
+ /* Walk over all of the fragments in a subsection. */
+ for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next)
+ {
+ if ((fragP->fr_type == rs_align
+ || fragP->fr_type == rs_align_code
+ || (fragP->fr_type == rs_machine_dependent
+ && (fragP->fr_subtype == RELAX_DESIRE_ALIGN
+ || fragP->fr_subtype == RELAX_DESIRE_ALIGN_IF_TARGET)))
+ && fragP->fr_fix == 0)
+ {
+ fragS * next = fragP->fr_next;
+
+ while (next
+ && next->fr_type == rs_machine_dependent
+ && next->fr_subtype == RELAX_DESIRE_ALIGN_IF_TARGET)
+ {
+ frag_wane (next);
+ next = next->fr_next;
+ }
+ }
+ }
+ }
+}
+
+
+/* Re-process all of the fragments looking to convert all of the
+ RELAX_DESIRE_ALIGN_IF_TARGET fragments. If there is a branch
+ target in the next fragment, convert this to RELAX_DESIRE_ALIGN.
+ If the next fragment starts with a loop target, AND the previous
+ fragment can be expanded to negate the branch, convert this to a
+ RELAX_LOOP_END. Otherwise, convert to a .fill 0. */
+
+static void
+xtensa_fix_target_frags ()
+{
+ frchainS *frchP;
+
+ /* When this routine is called, all of the subsections are still intact
+ so we walk over subsections instead of sections. */
+ for (frchP = frchain_root; frchP; frchP = frchP->frch_next)
+ {
+ bfd_boolean prev_frag_can_negate_branch = FALSE;
+ fragS *fragP;
+
+ /* Walk over all of the fragments in a subsection. */
+ for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next)
+ {
+ if (fragP->fr_type == rs_machine_dependent
+ && fragP->fr_subtype == RELAX_DESIRE_ALIGN_IF_TARGET)
+ {
+ if (next_frag_is_loop_target (fragP))
+ {
+ if (prev_frag_can_negate_branch)
+ fragP->fr_subtype = RELAX_LOOP_END;
+ else
+ {
+ if (!align_only_targets ||
+ next_frag_is_branch_target (fragP))
+ fragP->fr_subtype = RELAX_DESIRE_ALIGN;
+ else
+ frag_wane (fragP);
+ }
+ }
+ else if (!align_only_targets
+ || next_frag_is_branch_target (fragP))
+ fragP->fr_subtype = RELAX_DESIRE_ALIGN;
+ else
+ frag_wane (fragP);
+ }
+ if (fragP->fr_fix != 0)
+ prev_frag_can_negate_branch = FALSE;
+ if (frag_can_negate_branch (fragP))
+ prev_frag_can_negate_branch = TRUE;
+ }
+ }
+}
+
+
+static bfd_boolean
+frag_can_negate_branch (fragP)
+ fragS *fragP;
+{
+ if (fragP->fr_type == rs_machine_dependent
+ && fragP->fr_subtype == RELAX_IMMED)
+ {
+ TInsn t_insn;
+ tinsn_from_chars (&t_insn, fragP->fr_opcode);
+ if (is_negatable_branch (&t_insn))
+ return TRUE;
+ }
+ return FALSE;
+}
+
+
+/* Re-process all of the fragments looking to convert all of the
+ RELAX_ADD_NOP_IF_A0_B_RETW. If the next instruction is a
+ conditional branch or a retw/retw.n, convert this frag to one that
+ will generate a NOP. In any case close it off with a .fill 0. */
+
+static void
+xtensa_fix_a0_b_retw_frags ()
+{
+ frchainS *frchP;
+
+ /* When this routine is called, all of the subsections are still intact
+ so we walk over subsections instead of sections. */
+ for (frchP = frchain_root; frchP; frchP = frchP->frch_next)
+ {
+ fragS *fragP;
+
+ /* Walk over all of the fragments in a subsection. */
+ for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next)
+ {
+ if (fragP->fr_type == rs_machine_dependent
+ && fragP->fr_subtype == RELAX_ADD_NOP_IF_A0_B_RETW)
+ {
+ if (next_instrs_are_b_retw (fragP))
+ relax_frag_add_nop (fragP);
+ else
+ frag_wane (fragP);
+ }
+ }
+ }
+}
+
+
+bfd_boolean
+next_instrs_are_b_retw (fragP)
+ fragS * fragP;
+{
+ xtensa_opcode opcode;
+ const fragS *next_fragP = next_non_empty_frag (fragP);
+ static xtensa_insnbuf insnbuf = NULL;
+ xtensa_isa isa = xtensa_default_isa;
+ int offset = 0;
+
+ if (!insnbuf)
+ insnbuf = xtensa_insnbuf_alloc (isa);
+
+ if (next_fragP == NULL)
+ return FALSE;
+
+ /* Check for the conditional branch. */
+ xtensa_insnbuf_from_chars (isa, insnbuf, &next_fragP->fr_literal[offset]);
+ opcode = xtensa_decode_insn (isa, insnbuf);
+
+ if (!is_conditional_branch_opcode (opcode))
+ return FALSE;
+
+ offset += xtensa_insn_length (isa, opcode);
+ if (offset == next_fragP->fr_fix)
+ {
+ next_fragP = next_non_empty_frag (next_fragP);
+ offset = 0;
+ }
+ if (next_fragP == NULL)
+ return FALSE;
+
+ /* Check for the retw/retw.n. */
+ xtensa_insnbuf_from_chars (isa, insnbuf, &next_fragP->fr_literal[offset]);
+ opcode = xtensa_decode_insn (isa, insnbuf);
+
+ if (is_windowed_return_opcode (opcode))
+ return TRUE;
+ return FALSE;
+}
+
+
+/* Re-process all of the fragments looking to convert all of the
+ RELAX_ADD_NOP_IF_PRE_LOOP_END. If there is one instruction and a
+ loop end label, convert this frag to one that will generate a NOP.
+ In any case close it off with a .fill 0. */
+
+static void
+xtensa_fix_b_j_loop_end_frags ()
+{
+ frchainS *frchP;
+
+ /* When this routine is called, all of the subsections are still intact
+ so we walk over subsections instead of sections. */
+ for (frchP = frchain_root; frchP; frchP = frchP->frch_next)
+ {
+ fragS *fragP;
+
+ /* Walk over all of the fragments in a subsection. */
+ for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next)
+ {
+ if (fragP->fr_type == rs_machine_dependent
+ && fragP->fr_subtype == RELAX_ADD_NOP_IF_PRE_LOOP_END)
+ {
+ if (next_instr_is_loop_end (fragP))
+ relax_frag_add_nop (fragP);
+ else
+ frag_wane (fragP);
+ }
+ }
+ }
+}
+
+
+bfd_boolean
+next_instr_is_loop_end (fragP)
+ fragS * fragP;
+{
+ const fragS *next_fragP;
+
+ if (next_frag_is_loop_target (fragP))
+ return FALSE;
+
+ next_fragP = next_non_empty_frag (fragP);
+ if (next_fragP == NULL)
+ return FALSE;
+
+ if (!next_frag_is_loop_target (next_fragP))
+ return FALSE;
+
+ /* If the size is >= 3 then there is more than one instruction here.
+ The hardware bug will not fire. */
+ if (next_fragP->fr_fix > 3)
+ return FALSE;
+
+ return TRUE;
+}
+
+
+/* Re-process all of the fragments looking to convert all of the
+ RELAX_ADD_NOP_IF_CLOSE_LOOP_END. If there is an loop end that is
+ not MY loop's loop end within 12 bytes, add enough nops here to
+ make it at least 12 bytes away. In any case close it off with a
+ .fill 0. */
+
+static void
+xtensa_fix_close_loop_end_frags ()
+{
+ frchainS *frchP;
+
+ /* When this routine is called, all of the subsections are still intact
+ so we walk over subsections instead of sections. */
+ for (frchP = frchain_root; frchP; frchP = frchP->frch_next)
+ {
+ fragS *fragP;
+
+ fragS *current_target = NULL;
+ offsetT current_offset = 0;
+
+ /* Walk over all of the fragments in a subsection. */
+ for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next)
+ {
+ if (fragP->fr_type == rs_machine_dependent
+ && fragP->fr_subtype == RELAX_IMMED)
+ {
+ /* Read it. If the instruction is a loop, get the target. */
+ xtensa_opcode opcode = get_opcode_from_buf (fragP->fr_opcode);
+ if (is_loop_opcode (opcode))
+ {
+ TInsn t_insn;
+
+ tinsn_from_chars (&t_insn, fragP->fr_opcode);
+ tinsn_immed_from_frag (&t_insn, fragP);
+
+ /* Get the current fragment target. */
+ if (fragP->fr_symbol)
+ {
+ current_target = symbol_get_frag (fragP->fr_symbol);
+ current_offset = fragP->fr_offset;
+ }
+ }
+ }
+
+ if (current_target
+ && fragP->fr_type == rs_machine_dependent
+ && fragP->fr_subtype == RELAX_ADD_NOP_IF_CLOSE_LOOP_END)
+ {
+ size_t min_bytes;
+ size_t bytes_added = 0;
+
+#define REQUIRED_LOOP_DIVIDING_BYTES 12
+ /* Max out at 12. */
+ min_bytes = min_bytes_to_other_loop_end
+ (fragP->fr_next, current_target, current_offset,
+ REQUIRED_LOOP_DIVIDING_BYTES);
+
+ if (min_bytes < REQUIRED_LOOP_DIVIDING_BYTES)
+ {
+ while (min_bytes + bytes_added
+ < REQUIRED_LOOP_DIVIDING_BYTES)
+ {
+ int length = 3;
+
+ if (fragP->fr_var < length)
+ as_warn (_("fr_var %lu < length %d; ignoring"),
+ fragP->fr_var, length);
+ else
+ {
+ assemble_nop (length,
+ fragP->fr_literal + fragP->fr_fix);
+ fragP->fr_fix += length;
+ fragP->fr_var -= length;
+ }
+ bytes_added += length;
+ }
+ }
+ frag_wane (fragP);
+ }
+ }
+ }
+}
+
+
+size_t
+min_bytes_to_other_loop_end (fragP, current_target, current_offset, max_size)
+ fragS *fragP;
+ fragS *current_target;
+ offsetT current_offset;
+ size_t max_size;
+{
+ size_t offset = 0;
+ fragS *current_fragP;
+
+ for (current_fragP = fragP;
+ current_fragP;
+ current_fragP = current_fragP->fr_next)
+ {
+ if (current_fragP->tc_frag_data.is_loop_target
+ && current_fragP != current_target)
+ return offset + current_offset;
+
+ offset += unrelaxed_frag_min_size (current_fragP);
+
+ if (offset + current_offset >= max_size)
+ return max_size;
+ }
+ return max_size;
+}
+
+
+size_t
+unrelaxed_frag_min_size (fragP)
+ fragS * fragP;
+{
+ size_t size = fragP->fr_fix;
+
+ /* add fill size */
+ if (fragP->fr_type == rs_fill)
+ size += fragP->fr_offset;
+
+ return size;
+}
+
+
+/* Re-process all of the fragments looking to convert all
+ of the RELAX_ADD_NOP_IF_SHORT_LOOP. If:
+
+ A)
+ 1) the instruction size count to the loop end label
+ is too short (<= 2 instructions),
+ 2) loop has a jump or branch in it
+
+ or B)
+ 1) software_avoid_all_short_loops is true
+ 2) The generating loop was a 'loopgtz' or 'loopnez'
+ 3) the instruction size count to the loop end label is too short
+ (<= 2 instructions)
+ then convert this frag (and maybe the next one) to generate a NOP.
+ In any case close it off with a .fill 0. */
+
+static void
+xtensa_fix_short_loop_frags ()
+{
+ frchainS *frchP;
+
+ /* When this routine is called, all of the subsections are still intact
+ so we walk over subsections instead of sections. */
+ for (frchP = frchain_root; frchP; frchP = frchP->frch_next)
+ {
+ fragS *fragP;
+ fragS *current_target = NULL;
+ offsetT current_offset = 0;
+ xtensa_opcode current_opcode = XTENSA_UNDEFINED;
+
+ /* Walk over all of the fragments in a subsection. */
+ for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next)
+ {
+ /* check on the current loop */
+ if (fragP->fr_type == rs_machine_dependent
+ && fragP->fr_subtype == RELAX_IMMED)
+ {
+ /* Read it. If the instruction is a loop, get the target. */
+ xtensa_opcode opcode = get_opcode_from_buf (fragP->fr_opcode);
+ if (is_loop_opcode (opcode))
+ {
+ TInsn t_insn;
+
+ tinsn_from_chars (&t_insn, fragP->fr_opcode);
+ tinsn_immed_from_frag (&t_insn, fragP);
+
+ /* Get the current fragment target. */
+ if (fragP->fr_symbol)
+ {
+ current_target = symbol_get_frag (fragP->fr_symbol);
+ current_offset = fragP->fr_offset;
+ current_opcode = opcode;
+ }
+ }
+ }
+
+ if (fragP->fr_type == rs_machine_dependent
+ && fragP->fr_subtype == RELAX_ADD_NOP_IF_SHORT_LOOP)
+ {
+ size_t insn_count =
+ count_insns_to_loop_end (fragP->fr_next, TRUE, 3);
+ if (insn_count < 3
+ && (branch_before_loop_end (fragP->fr_next)
+ || (software_avoid_all_short_loops
+ && current_opcode != XTENSA_UNDEFINED
+ && !is_the_loop_opcode (current_opcode))))
+ relax_frag_add_nop (fragP);
+ else
+ frag_wane (fragP);
+ }
+ }
+ }
+}
+
+
+size_t
+count_insns_to_loop_end (base_fragP, count_relax_add, max_count)
+ fragS *base_fragP;
+ bfd_boolean count_relax_add;
+ size_t max_count;
+{
+ fragS *fragP = NULL;
+ size_t insn_count = 0;
+
+ fragP = base_fragP;
+
+ for (; fragP && !fragP->tc_frag_data.is_loop_target; fragP = fragP->fr_next)
+ {
+ insn_count += unrelaxed_frag_min_insn_count (fragP);
+ if (insn_count >= max_count)
+ return max_count;
+
+ if (count_relax_add)
+ {
+ if (fragP->fr_type == rs_machine_dependent
+ && fragP->fr_subtype == RELAX_ADD_NOP_IF_SHORT_LOOP)
+ {
+ /* In order to add the appropriate number of
+ NOPs, we count an instruction for downstream
+ occurrences. */
+ insn_count++;
+ if (insn_count >= max_count)
+ return max_count;
+ }
+ }
+ }
+ return insn_count;
+}
+
+
+size_t
+unrelaxed_frag_min_insn_count (fragP)
+ fragS *fragP;
+{
+ size_t insn_count = 0;
+ int offset = 0;
+
+ if (!fragP->tc_frag_data.is_insn)
+ return insn_count;
+
+ /* Decode the fixed instructions. */
+ while (offset < fragP->fr_fix)
+ {
+ xtensa_opcode opcode = get_opcode_from_buf (fragP->fr_literal + offset);
+ if (opcode == XTENSA_UNDEFINED)
+ {
+ as_fatal (_("undecodable instruction in instruction frag"));
+ return insn_count;
+ }
+ offset += xtensa_insn_length (xtensa_default_isa, opcode);
+ insn_count++;
+ }
+
+ return insn_count;
+}
+
+
+bfd_boolean
+branch_before_loop_end (base_fragP)
+ fragS *base_fragP;
+{
+ fragS *fragP;
+
+ for (fragP = base_fragP;
+ fragP && !fragP->tc_frag_data.is_loop_target;
+ fragP = fragP->fr_next)
+ {
+ if (unrelaxed_frag_has_b_j (fragP))
+ return TRUE;
+ }
+ return FALSE;
+}
+
+
+bfd_boolean
+unrelaxed_frag_has_b_j (fragP)
+ fragS *fragP;
+{
+ size_t insn_count = 0;
+ int offset = 0;
+
+ if (!fragP->tc_frag_data.is_insn)
+ return FALSE;
+
+ /* Decode the fixed instructions. */
+ while (offset < fragP->fr_fix)
+ {
+ xtensa_opcode opcode = get_opcode_from_buf (fragP->fr_literal + offset);
+ if (opcode == XTENSA_UNDEFINED)
+ {
+ as_fatal (_("undecodable instruction in instruction frag"));
+ return insn_count;
+ }
+ if (is_branch_or_jump_opcode (opcode))
+ return TRUE;
+ offset += xtensa_insn_length (xtensa_default_isa, opcode);
+ }
+ return FALSE;
+}
+
+
+/* Checks to be made after initial assembly but before relaxation. */
+
+static void
+xtensa_sanity_check ()
+{
+ char *file_name;
+ int line;
+
+ frchainS *frchP;
+
+ as_where (&file_name, &line);
+ for (frchP = frchain_root; frchP; frchP = frchP->frch_next)
+ {
+ fragS *fragP;
+
+ /* Walk over all of the fragments in a subsection. */
+ for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next)
+ {
+ /* Currently we only check for empty loops here. */
+ if (fragP->fr_type == rs_machine_dependent
+ && fragP->fr_subtype == RELAX_IMMED)
+ {
+ static xtensa_insnbuf insnbuf = NULL;
+ TInsn t_insn;
+
+ if (fragP->fr_opcode != NULL)
+ {
+ if (!insnbuf)
+ insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
+ tinsn_from_chars (&t_insn, fragP->fr_opcode);
+ tinsn_immed_from_frag (&t_insn, fragP);
+
+ if (is_loop_opcode (t_insn.opcode))
+ {
+ if (is_empty_loop (&t_insn, fragP))
+ {
+ new_logical_line (fragP->fr_file, fragP->fr_line);
+ as_bad (_("invalid empty loop"));
+ }
+ if (!is_local_forward_loop (&t_insn, fragP))
+ {
+ new_logical_line (fragP->fr_file, fragP->fr_line);
+ as_bad (_("loop target does not follow "
+ "loop instruction in section"));
+ }
+ }
+ }
+ }
+ }
+ }
+ new_logical_line (file_name, line);
+}
+
+
+#define LOOP_IMMED_OPN 1
+
+/* Return true if the loop target is the next non-zero fragment. */
+
+bfd_boolean
+is_empty_loop (insn, fragP)
+ const TInsn *insn;
+ fragS *fragP;
+{
+ const expressionS *expr;
+ symbolS *symbolP;
+ fragS *next_fragP;
+
+ if (insn->insn_type != ITYPE_INSN)
+ return FALSE;
+
+ if (!is_loop_opcode (insn->opcode))
+ return FALSE;
+
+ if (insn->ntok <= LOOP_IMMED_OPN)
+ return FALSE;
+
+ expr = &insn->tok[LOOP_IMMED_OPN];
+
+ if (expr->X_op != O_symbol)
+ return FALSE;
+
+ symbolP = expr->X_add_symbol;
+ if (!symbolP)
+ return FALSE;
+
+ if (symbol_get_frag (symbolP) == NULL)
+ return FALSE;
+
+ if (S_GET_VALUE (symbolP) != 0)
+ return FALSE;
+
+ /* Walk through the zero-size fragments from this one. If we find
+ the target fragment, then this is a zero-size loop. */
+ for (next_fragP = fragP->fr_next;
+ next_fragP != NULL;
+ next_fragP = next_fragP->fr_next)
+ {
+ if (next_fragP == symbol_get_frag (symbolP))
+ return TRUE;
+ if (next_fragP->fr_fix != 0)
+ return FALSE;
+ }
+ return FALSE;
+}
+
+
+bfd_boolean
+is_local_forward_loop (insn, fragP)
+ const TInsn *insn;
+ fragS *fragP;
+{
+ const expressionS *expr;
+ symbolS *symbolP;
+ fragS *next_fragP;
+
+ if (insn->insn_type != ITYPE_INSN)
+ return FALSE;
+
+ if (!is_loop_opcode (insn->opcode))
+ return FALSE;
+
+ if (insn->ntok <= LOOP_IMMED_OPN)
+ return FALSE;
+
+ expr = &insn->tok[LOOP_IMMED_OPN];
+
+ if (expr->X_op != O_symbol)
+ return FALSE;
+
+ symbolP = expr->X_add_symbol;
+ if (!symbolP)
+ return FALSE;
+
+ if (symbol_get_frag (symbolP) == NULL)
+ return FALSE;
+
+ /* Walk through fragments until we find the target.
+ If we do not find the target, then this is an invalid loop. */
+ for (next_fragP = fragP->fr_next;
+ next_fragP != NULL;
+ next_fragP = next_fragP->fr_next)
+ if (next_fragP == symbol_get_frag (symbolP))
+ return TRUE;
+
+ return FALSE;
+}
+
+
+/* Alignment Functions. */
+
+size_t
+get_text_align_power (target_size)
+ int target_size;
+{
+ size_t i = 0;
+ for (i = 0; i < sizeof (size_t); i++)
+ {
+ if (target_size <= (1 << i))
+ return i;
+ }
+ as_fatal (_("get_text_align_power: argument too large"));
+ return 0;
+}
+
+
+addressT
+get_text_align_max_fill_size (align_pow, use_nops, use_no_density)
+ int align_pow;
+ bfd_boolean use_nops;
+ bfd_boolean use_no_density;
+{
+ if (!use_nops)
+ return (1 << align_pow);
+ if (use_no_density)
+ return 3 * (1 << align_pow);
+
+ return 1 + (1 << align_pow);
+}
+
+
+/* get_text_align_fill_size ()
+
+ Desired alignments:
+ give the address
+ target_size = size of next instruction
+ align_pow = get_text_align_power (target_size).
+ use_nops = 0
+ use_no_density = 0;
+ Loop alignments:
+ address = current address + loop instruction size;
+ target_size = 3 (for 2 or 3 byte target)
+ = 8 (for 8 byte target)
+ align_pow = get_text_align_power (target_size);
+ use_nops = 1
+ use_no_density = set appropriately
+ Text alignments:
+ address = current address + loop instruction size;
+ target_size = 0
+ align_pow = get_text_align_power (target_size);
+ use_nops = 0
+ use_no_density = 0. */
+
+addressT
+get_text_align_fill_size (address, align_pow, target_size,
+ use_nops, use_no_density)
+ addressT address;
+ int align_pow;
+ int target_size;
+ bfd_boolean use_nops;
+ bfd_boolean use_no_density;
+{
+ /* Input arguments:
+
+ align_pow: log2 (required alignment).
+
+ target_size: alignment must allow the new_address and
+ new_address+target_size-1.
+
+ use_nops: if true, then we can only use 2 or 3 byte nops.
+
+ use_no_density: if use_nops and use_no_density, we can only use
+ 3-byte nops.
+
+ Usually, for non-zero target_size, the align_pow is the power of 2
+ that is greater than or equal to the target_size. This handles the
+ 2-byte, 3-byte and 8-byte instructions. */
+
+ size_t alignment = (1 << align_pow);
+ if (!use_nops)
+ {
+ /* This is the easy case. */
+ size_t mod;
+ mod = address % alignment;
+ if (mod != 0)
+ mod = alignment - mod;
+ assert ((address + mod) % alignment == 0);
+ return mod;
+ }
+
+ /* This is the slightly harder case. */
+ assert ((int) alignment >= target_size);
+ assert (target_size > 0);
+ if (!use_no_density)
+ {
+ size_t i;
+ for (i = 0; i < alignment * 2; i++)
+ {
+ if (i == 1)
+ continue;
+ if ((address + i) >> align_pow ==
+ (address + i + target_size - 1) >> align_pow)
+ return i;
+ }
+ }
+ else
+ {
+ size_t i;
+
+ /* Can only fill multiples of 3. */
+ for (i = 0; i <= alignment * 3; i += 3)
+ {
+ if ((address + i) >> align_pow ==
+ (address + i + target_size - 1) >> align_pow)
+ return i;
+ }
+ }
+ assert (0);
+ return 0;
+}
+
+
+/* This will assert if it is not possible. */
+
+size_t
+get_text_align_nop_count (fill_size, use_no_density)
+ size_t fill_size;
+ bfd_boolean use_no_density;
+{
+ size_t count = 0;
+ if (use_no_density)
+ {
+ assert (fill_size % 3 == 0);
+ return (fill_size / 3);
+ }
+
+ assert (fill_size != 1); /* Bad argument. */
+
+ while (fill_size > 1)
+ {
+ size_t insn_size = 3;
+ if (fill_size == 2 || fill_size == 4)
+ insn_size = 2;
+ fill_size -= insn_size;
+ count++;
+ }
+ assert (fill_size != 1); /* Bad algorithm. */
+ return count;
+}
+
+
+size_t
+get_text_align_nth_nop_size (fill_size, n, use_no_density)
+ size_t fill_size;
+ size_t n;
+ bfd_boolean use_no_density;
+{
+ size_t count = 0;
+
+ assert (get_text_align_nop_count (fill_size, use_no_density) > n);
+
+ if (use_no_density)
+ return 3;
+
+ while (fill_size > 1)
+ {
+ size_t insn_size = 3;
+ if (fill_size == 2 || fill_size == 4)
+ insn_size = 2;
+ fill_size -= insn_size;
+ count++;
+ if (n + 1 == count)
+ return insn_size;
+ }
+ assert (0);
+ return 0;
+}
+
+
+/* For the given fragment, find the appropriate address
+ for it to begin at if we are using NOPs to align it. */
+
+static addressT
+get_noop_aligned_address (fragP, address)
+ fragS *fragP;
+ addressT address;
+{
+ static xtensa_insnbuf insnbuf = NULL;
+ size_t fill_size = 0;
+
+ if (!insnbuf)
+ insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
+
+ switch (fragP->fr_type)
+ {
+ case rs_machine_dependent:
+ if (fragP->fr_subtype == RELAX_ALIGN_NEXT_OPCODE)
+ {
+ /* The rule is: get next fragment's FIRST instruction. Find
+ the smallest number of bytes that need to be added to
+ ensure that the next fragment's FIRST instruction will fit
+ in a single word.
+
+ E.G., 2 bytes : 0, 1, 2 mod 4
+ 3 bytes: 0, 1 mod 4
+
+ If the FIRST instruction MIGHT be relaxed,
+ assume that it will become a 3 byte instruction. */
+
+ int target_insn_size;
+ xtensa_opcode opcode = next_frag_opcode (fragP);
+ addressT pre_opcode_bytes;
+
+ if (opcode == XTENSA_UNDEFINED)
+ {
+ as_bad_where (fragP->fr_file, fragP->fr_line,
+ _("invalid opcode for RELAX_ALIGN_NEXT_OPCODE"));
+ as_fatal (_("cannot continue"));
+ }
+
+ target_insn_size = xtensa_insn_length (xtensa_default_isa, opcode);
+
+ pre_opcode_bytes = next_frag_pre_opcode_bytes (fragP);
+
+ if (is_loop_opcode (opcode))
+ {
+ /* next_fragP should be the loop. */
+ const fragS *next_fragP = next_non_empty_frag (fragP);
+ xtensa_opcode next_opcode = next_frag_opcode (next_fragP);
+ size_t alignment;
+
+ pre_opcode_bytes += target_insn_size;
+
+ /* For loops, the alignment depends on the size of the
+ instruction following the loop, not the loop instruction. */
+ if (next_opcode == XTENSA_UNDEFINED)
+ target_insn_size = 3;
+ else
+ {
+ target_insn_size =
+ xtensa_insn_length (xtensa_default_isa, next_opcode);
+
+ if (target_insn_size == 2)
+ target_insn_size = 3; /* ISA specifies this. */
+ }
+
+ /* If it was 8, then we'll need a larger alignment
+ for the section. */
+ alignment = get_text_align_power (target_insn_size);
+
+ /* Is Now_seg valid */
+ record_alignment (now_seg, alignment);
+ }
+ else
+ as_fatal (_("expected loop opcode in relax align next target"));
+
+ fill_size = get_text_align_fill_size
+ (address + pre_opcode_bytes,
+ get_text_align_power (target_insn_size),
+ target_insn_size, TRUE, fragP->tc_frag_data.is_no_density);
+ }
+ break;
+#if 0
+ case rs_align:
+ case rs_align_code:
+ fill_size = get_text_align_fill_size
+ (address, fragP->fr_offset, 1, TRUE,
+ fragP->tc_frag_data.is_no_density);
+ break;
+#endif
+ default:
+ as_fatal (_("expected align_code or RELAX_ALIGN_NEXT_OPCODE"));
+ }
+
+ return address + fill_size;
+}
+
+
+/* 3 mechanisms for relaxing an alignment:
+
+ Align to a power of 2.
+ Align so the next fragment's instruction does not cross a word boundary.
+ Align the current instruction so that if the next instruction
+ were 3 bytes, it would not cross a word boundary.
+
+ We can align with:
+
+ zeros - This is easy; always insert zeros.
+ nops - 3 and 2 byte instructions
+ 2 - 2 byte nop
+ 3 - 3 byte nop
+ 4 - 2, 2-byte nops
+ >=5 : 3 byte instruction + fn(n-3)
+ widening - widen previous instructions. */
+
+static addressT
+get_widen_aligned_address (fragP, address)
+ fragS *fragP;
+ addressT address;
+{
+ addressT align_pow, new_address, loop_insn_offset;
+ fragS *next_frag;
+ int insn_size;
+ xtensa_opcode opcode, next_opcode;
+ static xtensa_insnbuf insnbuf = NULL;
+
+ if (!insnbuf)
+ insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
+
+ if (fragP->fr_type == rs_align || fragP->fr_type == rs_align_code)
+ {
+ align_pow = fragP->fr_offset;
+ new_address = ((address + ((1 << align_pow) - 1))
+ << align_pow) >> align_pow;
+ return new_address;
+ }
+
+ if (fragP->fr_type == rs_machine_dependent)
+ {
+ switch (fragP->fr_subtype)
+ {
+ case RELAX_DESIRE_ALIGN:
+
+ /* The rule is: get the next fragment's FIRST instruction.
+ Find the smallest number of bytes needed to be added
+ in order to ensure that the next fragment is FIRST
+ instruction will fit in a single word.
+ i.e. 2 bytes : 0, 1, 2. mod 4
+ 3 bytes: 0, 1 mod 4
+ If the FIRST instruction MIGHT be relaxed,
+ assume that it will become a 3-byte instruction. */
+
+ insn_size = 3;
+ /* Check to see if it might be 2 bytes. */
+ next_opcode = next_frag_opcode (fragP);
+ if (next_opcode != XTENSA_UNDEFINED
+ && xtensa_insn_length (xtensa_default_isa, next_opcode) == 2)
+ insn_size = 2;
+
+ assert (insn_size <= 4);
+ for (new_address = address; new_address < address + 4; new_address++)
+ {
+ if (new_address >> 2 == (new_address + insn_size - 1) >> 2)
+ return new_address;
+ }
+ as_bad (_("internal error aligning"));
+ return address;
+
+ case RELAX_ALIGN_NEXT_OPCODE:
+ /* The rule is: get next fragment's FIRST instruction.
+ Find the smallest number of bytes needed to be added
+ in order to ensure that the next fragment's FIRST
+ instruction will fit in a single word.
+ i.e. 2 bytes : 0, 1, 2. mod 4
+ 3 bytes: 0, 1 mod 4
+ If the FIRST instruction MIGHT be relaxed,
+ assume that it will become a 3 byte instruction. */
+
+ opcode = next_frag_opcode (fragP);
+ if (opcode == XTENSA_UNDEFINED)
+ {
+ as_bad_where (fragP->fr_file, fragP->fr_line,
+ _("invalid opcode for RELAX_ALIGN_NEXT_OPCODE"));
+ as_fatal (_("cannot continue"));
+ }
+ insn_size = xtensa_insn_length (xtensa_default_isa, opcode);
+ assert (insn_size <= 4);
+ assert (is_loop_opcode (opcode));
+
+ loop_insn_offset = 0;
+ next_frag = next_non_empty_frag (fragP);
+
+ /* If the loop has been expanded then the loop
+ instruction could be at an offset from this fragment. */
+ if (next_frag->fr_subtype != RELAX_IMMED)
+ loop_insn_offset = get_expanded_loop_offset (opcode);
+
+ for (new_address = address; new_address < address + 4; new_address++)
+ {
+ if ((new_address + loop_insn_offset + insn_size) >> 2 ==
+ (new_address + loop_insn_offset + insn_size + 2) >> 2)
+ return new_address;
+ }
+ as_bad (_("internal error aligning"));
+ return address;
+
+ default:
+ as_bad (_("internal error aligning"));
+ return address;
+ }
+ }
+ as_bad (_("internal error aligning"));
+ return address;
+}
+
+
+/* md_relax_frag Hook and Helper Functions. */
+
+/* Return the number of bytes added to this fragment, given that the
+ input has been stretched already by "stretch". */
+
+long
+xtensa_relax_frag (fragP, stretch, stretched_p)
+ fragS *fragP;
+ long stretch;
+ int *stretched_p;
+{
+ int unreported = fragP->tc_frag_data.unreported_expansion;
+ long new_stretch = 0;
+ char *file_name;
+ int line, lit_size;
+
+ as_where (&file_name, &line);
+ new_logical_line (fragP->fr_file, fragP->fr_line);
+
+ fragP->tc_frag_data.unreported_expansion = 0;
+
+ switch (fragP->fr_subtype)
+ {
+ case RELAX_ALIGN_NEXT_OPCODE:
+ /* Always convert. */
+ new_stretch = relax_frag_text_align (fragP, stretch);
+ break;
+
+ case RELAX_LOOP_END:
+ /* Do nothing. */
+ break;
+
+ case RELAX_LOOP_END_ADD_NOP:
+ /* Add a NOP and switch to .fill 0. */
+ new_stretch = relax_frag_add_nop (fragP);
+ break;
+
+ case RELAX_DESIRE_ALIGN:
+ /* We REALLY want to change the relaxation order here. This
+ should do NOTHING. The narrowing before it will either align
+ it or not. */
+ break;
+
+ case RELAX_LITERAL:
+ case RELAX_LITERAL_FINAL:
+ return 0;
+
+ case RELAX_LITERAL_NR:
+ lit_size = 4;
+ fragP->fr_subtype = RELAX_LITERAL_FINAL;
+ assert (unreported == lit_size);
+ memset (&fragP->fr_literal[fragP->fr_fix], 0, 4);
+ fragP->fr_var -= lit_size;
+ fragP->fr_fix += lit_size;
+ new_stretch = 4;
+ break;
+
+ case RELAX_NARROW:
+ new_stretch = relax_frag_narrow (fragP, stretch);
+ break;
+
+ case RELAX_IMMED:
+ case RELAX_IMMED_STEP1:
+ case RELAX_IMMED_STEP2:
+ /* Place the immediate. */
+ new_stretch = relax_frag_immed (now_seg, fragP, stretch,
+ fragP->fr_subtype - RELAX_IMMED,
+ stretched_p);
+ break;
+
+ case RELAX_LITERAL_POOL_BEGIN:
+ case RELAX_LITERAL_POOL_END:
+ /* No relaxation required. */
+ break;
+
+ default:
+ as_bad (_("bad relaxation state"));
+ }
+
+ new_logical_line (file_name, line);
+ return new_stretch;
+}
+
+
+static long
+relax_frag_text_align (fragP, stretch)
+ fragS *fragP;
+ long stretch;
+{
+ addressT old_address, old_next_address, old_size;
+ addressT new_address, new_next_address, new_size;
+ addressT growth;
+
+ /* Overview of the relaxation procedure for alignment
+ inside an executable section:
+
+ The old size is stored in the tc_frag_data.text_expansion field.
+
+ Calculate the new address, fix up the text_expansion and
+ return the growth. */
+
+ /* Calculate the old address of this fragment and the next fragment. */
+ old_address = fragP->fr_address - stretch;
+ old_next_address = (fragP->fr_address - stretch + fragP->fr_fix +
+ fragP->tc_frag_data.text_expansion);
+ old_size = old_next_address - old_address;
+
+ /* Calculate the new address of this fragment and the next fragment. */
+ new_address = fragP->fr_address;
+ new_next_address =
+ get_noop_aligned_address (fragP, fragP->fr_address + fragP->fr_fix);
+ new_size = new_next_address - new_address;
+
+ growth = new_size - old_size;
+
+ /* Fix up the text_expansion field and return the new growth. */
+ fragP->tc_frag_data.text_expansion += growth;
+ return growth;
+}
+
+
+/* Add a NOP (i.e., "or a1, a1, a1"). Use the 3-byte one because we
+ don't know about the availability of density yet. TODO: When the
+ flags are stored per fragment, use NOP.N when possible. */
+
+static long
+relax_frag_add_nop (fragP)
+ fragS *fragP;
+{
+ static xtensa_insnbuf insnbuf = NULL;
+ TInsn t_insn;
+ char *nop_buf = fragP->fr_literal + fragP->fr_fix;
+ int length;
+ if (!insnbuf)
+ insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
+
+ tinsn_init (&t_insn);
+ t_insn.opcode = xtensa_or_opcode;
+ assert (t_insn.opcode != XTENSA_UNDEFINED);
+
+ t_insn.ntok = 3;
+ set_expr_const (&t_insn.tok[0], 1);
+ set_expr_const (&t_insn.tok[1], 1);
+ set_expr_const (&t_insn.tok[2], 1);
+
+ tinsn_to_insnbuf (&t_insn, insnbuf);
+ fragP->tc_frag_data.is_insn = TRUE;
+ xtensa_insnbuf_to_chars (xtensa_default_isa, insnbuf, nop_buf);
+
+ length = xtensa_insn_length (xtensa_default_isa, t_insn.opcode);
+ if (fragP->fr_var < length)
+ {
+ as_warn (_("fr_var (%ld) < length (%d); ignoring"),
+ fragP->fr_var, length);
+ frag_wane (fragP);
+ return 0;
+ }
+
+ fragP->fr_fix += length;
+ fragP->fr_var -= length;
+ frag_wane (fragP);
+ return length;
+}
+
+
+static long
+relax_frag_narrow (fragP, stretch)
+ fragS *fragP;
+ long stretch;
+{
+ /* Overview of the relaxation procedure for alignment inside an
+ executable section: Find the number of widenings required and the
+ number of nop bytes required. Store the number of bytes ALREADY
+ widened. If there are enough instructions to widen (must go back
+ ONLY through NARROW fragments), mark each of the fragments as TO BE
+ widened, recalculate the fragment addresses. */
+
+ assert (fragP->fr_type == rs_machine_dependent
+ && fragP->fr_subtype == RELAX_NARROW);
+
+ if (!future_alignment_required (fragP, 0))
+ {
+ /* If already expanded but no longer needed because of a prior
+ stretch, it is SAFE to unexpand because the next fragment will
+ NEVER start at an address > the previous time through the
+ relaxation. */
+ if (fragP->tc_frag_data.text_expansion)
+ {
+ if (stretch > 0)
+ {
+ fragP->tc_frag_data.text_expansion = 0;
+ return -1;
+ }
+ /* Otherwise we have to live with this bad choice. */
+ return 0;
+ }
+ return 0;
+ }
+
+ if (fragP->tc_frag_data.text_expansion == 0)
+ {
+ fragP->tc_frag_data.text_expansion = 1;
+ return 1;
+ }
+
+ return 0;
+}
+
+
+static bfd_boolean
+future_alignment_required (fragP, stretch)
+ fragS *fragP;
+ long stretch;
+{
+ long address = fragP->fr_address + stretch;
+ int num_widens = 0;
+ addressT aligned_address;
+ offsetT desired_diff;
+
+ while (fragP)
+ {
+ /* Limit this to a small search. */
+ if (num_widens > 8)
+ return FALSE;
+ address += fragP->fr_fix;
+
+ switch (fragP->fr_type)
+ {
+ case rs_fill:
+ address += fragP->fr_offset * fragP->fr_var;
+ break;
+
+ case rs_machine_dependent:
+ switch (fragP->fr_subtype)
+ {
+ case RELAX_NARROW:
+ /* address += fragP->fr_fix; */
+ num_widens++;
+ break;
+
+ case RELAX_IMMED:
+ address += (/* fragP->fr_fix + */
+ fragP->tc_frag_data.text_expansion);
+ break;
+
+ case RELAX_ALIGN_NEXT_OPCODE:
+ case RELAX_DESIRE_ALIGN:
+ /* address += fragP->fr_fix; */
+ aligned_address = get_widen_aligned_address (fragP, address);
+ desired_diff = aligned_address - address;
+ assert (desired_diff >= 0);
+ /* If there are enough wideners in between do it. */
+ /* return (num_widens == desired_diff); */
+ if (num_widens == desired_diff)
+ return TRUE;
+ if (fragP->fr_subtype == RELAX_ALIGN_NEXT_OPCODE)
+ return FALSE;
+ break;
+
+ default:
+ return FALSE;
+ }
+ break;
+
+ default:
+ return FALSE;
+ }
+ fragP = fragP->fr_next;
+ }
+
+ return FALSE;
+}
+
+
+static long
+relax_frag_immed (segP, fragP, stretch, min_steps, stretched_p)
+ segT segP;
+ fragS *fragP;
+ long stretch;
+ int min_steps;
+ int *stretched_p;
+{
+ static xtensa_insnbuf insnbuf = NULL;
+ TInsn t_insn;
+ int old_size;
+ bfd_boolean negatable_branch = FALSE;
+ bfd_boolean branch_jmp_to_next = FALSE;
+ IStack istack;
+ offsetT frag_offset;
+ int num_steps;
+ fragS *lit_fragP;
+ int num_text_bytes, num_literal_bytes;
+ int literal_diff, text_diff;
+
+ assert (fragP->fr_opcode != NULL);
+
+ if (!insnbuf)
+ insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
+
+ tinsn_from_chars (&t_insn, fragP->fr_opcode);
+ tinsn_immed_from_frag (&t_insn, fragP);
+
+ negatable_branch = is_negatable_branch (&t_insn);
+
+ old_size = xtensa_insn_length (xtensa_default_isa, t_insn.opcode);
+
+ if (software_avoid_b_j_loop_end)
+ branch_jmp_to_next = is_branch_jmp_to_next (&t_insn, fragP);
+
+ /* Special case: replace a branch to the next instruction with a NOP.
+ This is required to work around a hardware bug in T1040.0 and also
+ serves as an optimization. */
+
+ if (branch_jmp_to_next
+ && ((old_size == 2) || (old_size == 3))
+ && !next_frag_is_loop_target (fragP))
+ return 0;
+
+ /* Here is the fun stuff: Get the immediate field from this
+ instruction. If it fits, we are done. If not, find the next
+ instruction sequence that fits. */
+
+ frag_offset = fragP->fr_opcode - fragP->fr_literal;
+ istack_init (&istack);
+ num_steps = xg_assembly_relax (&istack, &t_insn, segP, fragP, frag_offset,
+ min_steps, stretch);
+ if (num_steps < min_steps)
+ {
+ as_fatal (_("internal error: relaxation failed"));
+ return 0;
+ }
+
+ if (num_steps > RELAX_IMMED_MAXSTEPS)
+ {
+ as_fatal (_("internal error: relaxation requires too many steps"));
+ return 0;
+ }
+
+ fragP->fr_subtype = (int) RELAX_IMMED + num_steps;
+
+ /* Figure out the number of bytes needed. */
+ lit_fragP = 0;
+ num_text_bytes = get_num_stack_text_bytes (&istack) - old_size;
+ num_literal_bytes = get_num_stack_literal_bytes (&istack);
+ literal_diff = num_literal_bytes - fragP->tc_frag_data.literal_expansion;
+ text_diff = num_text_bytes - fragP->tc_frag_data.text_expansion;
+
+ /* It MUST get larger. If not, we could get an infinite loop. */
+ know (num_text_bytes >= 0);
+ know (literal_diff >= 0 && text_diff >= 0);
+
+ fragP->tc_frag_data.text_expansion = num_text_bytes;
+ fragP->tc_frag_data.literal_expansion = num_literal_bytes;
+
+ /* Find the associated expandable literal for this. */
+ if (literal_diff != 0)
+ {
+ lit_fragP = fragP->tc_frag_data.literal_frag;
+ if (lit_fragP)
+ {
+ assert (literal_diff == 4);
+ lit_fragP->tc_frag_data.unreported_expansion += literal_diff;
+
+ /* We expect that the literal section state has NOT been
+ modified yet. */
+ assert (lit_fragP->fr_type == rs_machine_dependent
+ && lit_fragP->fr_subtype == RELAX_LITERAL);
+ lit_fragP->fr_subtype = RELAX_LITERAL_NR;
+
+ /* We need to mark this section for another iteration
+ of relaxation. */
+ (*stretched_p)++;
+ }
+ }
+
+ /* This implicitly uses the assumption that a branch is negated
+ when the size of the output increases by at least 2 bytes. */
+
+ if (negatable_branch && num_text_bytes >= 2)
+ {
+ /* If next frag is a loop end, then switch it to add a NOP. */
+ update_next_frag_nop_state (fragP);
+ }
+
+ return text_diff;
+}
+
+
+/* md_convert_frag Hook and Helper Functions. */
+
+void
+md_convert_frag (abfd, sec, fragp)
+ bfd *abfd ATTRIBUTE_UNUSED;
+ segT sec;
+ fragS *fragp;
+{
+ char *file_name;
+ int line;
+
+ as_where (&file_name, &line);
+ new_logical_line (fragp->fr_file, fragp->fr_line);
+
+ switch (fragp->fr_subtype)
+ {
+ case RELAX_ALIGN_NEXT_OPCODE:
+ /* Always convert. */
+ convert_frag_align_next_opcode (fragp);
+ break;
+
+ case RELAX_DESIRE_ALIGN:
+ /* Do nothing. If not aligned already, too bad. */
+ break;
+
+ case RELAX_LITERAL:
+ case RELAX_LITERAL_FINAL:
+ break;
+
+ case RELAX_NARROW:
+ /* No conversion. */
+ convert_frag_narrow (fragp);
+ break;
+
+ case RELAX_IMMED:
+ case RELAX_IMMED_STEP1:
+ case RELAX_IMMED_STEP2:
+ /* Place the immediate. */
+ convert_frag_immed (sec, fragp, fragp->fr_subtype - RELAX_IMMED);
+ break;
+
+ case RELAX_LITERAL_NR:
+ if (use_literal_section)
+ {
+ /* This should have been handled during relaxation. When
+ relaxing a code segment, literals sometimes need to be
+ added to the corresponding literal segment. If that
+ literal segment has already been relaxed, then we end up
+ in this situation. Marking the literal segments as data
+ would make this happen less often (since GAS always relaxes
+ code before data), but we could still get into trouble if
+ there are instructions in a segment that is not marked as
+ containing code. Until we can implement a better solution,
+ cheat and adjust the addresses of all the following frags.
+ This could break subsequent alignments, but the linker's
+ literal coalescing will do that anyway. */
+
+ fragS *f;
+ fragp->fr_subtype = RELAX_LITERAL_FINAL;
+ assert (fragp->tc_frag_data.unreported_expansion == 4);
+ memset (&fragp->fr_literal[fragp->fr_fix], 0, 4);
+ fragp->fr_var -= 4;
+ fragp->fr_fix += 4;
+ for (f = fragp->fr_next; f; f = f->fr_next)
+ f->fr_address += 4;
+ }
+ else
+ as_bad (_("invalid relaxation fragment result"));
+ break;
+ }
+
+ fragp->fr_var = 0;
+ new_logical_line (file_name, line);
+}
+
+
+void
+convert_frag_align_next_opcode (fragp)
+ fragS *fragp;
+{
+ char *nop_buf; /* Location for Writing. */
+ size_t i;
+
+ bfd_boolean use_no_density = fragp->tc_frag_data.is_no_density;
+ addressT aligned_address;
+ size_t fill_size, nop_count;
+
+ aligned_address = get_noop_aligned_address (fragp, fragp->fr_address +
+ fragp->fr_fix);
+ fill_size = aligned_address - (fragp->fr_address + fragp->fr_fix);
+ nop_count = get_text_align_nop_count (fill_size, use_no_density);
+ nop_buf = fragp->fr_literal + fragp->fr_fix;
+
+ for (i = 0; i < nop_count; i++)
+ {
+ size_t nop_size;
+ nop_size = get_text_align_nth_nop_size (fill_size, i, use_no_density);
+
+ assemble_nop (nop_size, nop_buf);
+ nop_buf += nop_size;
+ }
+
+ fragp->fr_fix += fill_size;
+ fragp->fr_var -= fill_size;
+}
+
+
+static void
+convert_frag_narrow (fragP)
+ fragS *fragP;
+{
+ static xtensa_insnbuf insnbuf = NULL;
+ TInsn t_insn, single_target;
+ int size, old_size, diff, error_val;
+ offsetT frag_offset;
+
+ if (fragP->tc_frag_data.text_expansion == 0)
+ {
+ /* No conversion. */
+ fragP->fr_var = 0;
+ return;
+ }
+
+ assert (fragP->fr_opcode != NULL);
+
+ if (!insnbuf)
+ insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
+
+ tinsn_from_chars (&t_insn, fragP->fr_opcode);
+ tinsn_immed_from_frag (&t_insn, fragP);
+
+ /* Just convert it to a wide form.... */
+ size = 0;
+ old_size = xtensa_insn_length (xtensa_default_isa, t_insn.opcode);
+
+ tinsn_init (&single_target);
+ frag_offset = fragP->fr_opcode - fragP->fr_literal;
+
+ error_val = xg_expand_narrow (&single_target, &t_insn);
+ if (error_val)
+ as_bad (_("unable to widen instruction"));
+
+ size = xtensa_insn_length (xtensa_default_isa, single_target.opcode);
+ xg_emit_insn_to_buf (&single_target, fragP->fr_opcode,
+ fragP, frag_offset, TRUE);
+
+ diff = size - old_size;
+ assert (diff >= 0);
+ assert (diff <= fragP->fr_var);
+ fragP->fr_var -= diff;
+ fragP->fr_fix += diff;
+
+ /* clean it up */
+ fragP->fr_var = 0;
+}
+
+
+static void
+convert_frag_immed (segP, fragP, min_steps)
+ segT segP;
+ fragS *fragP;
+ int min_steps;
+{
+ char *immed_instr = fragP->fr_opcode;
+ static xtensa_insnbuf insnbuf = NULL;
+ TInsn orig_t_insn;
+ bfd_boolean expanded = FALSE;
+ char *fr_opcode = fragP->fr_opcode;
+ bfd_boolean branch_jmp_to_next = FALSE;
+ int size;
+
+ assert (fragP->fr_opcode != NULL);
+
+ if (!insnbuf)
+ insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
+
+ tinsn_from_chars (&orig_t_insn, fragP->fr_opcode);
+ tinsn_immed_from_frag (&orig_t_insn, fragP);
+
+ /* Here is the fun stuff: Get the immediate field from this
+ instruction. If it fits, we're done. If not, find the next
+ instruction sequence that fits. */
+
+ if (software_avoid_b_j_loop_end)
+ branch_jmp_to_next = is_branch_jmp_to_next (&orig_t_insn, fragP);
+
+ if (branch_jmp_to_next && !next_frag_is_loop_target (fragP))
+ {
+ /* Conversion just inserts a NOP and marks the fix as completed. */
+ size = xtensa_insn_length (xtensa_default_isa, orig_t_insn.opcode);
+ assemble_nop (size, fragP->fr_opcode);
+ fragP->fr_var = 0;
+ }
+ else
+ {
+ IStack istack;
+ int i;
+ symbolS *lit_sym = NULL;
+ int total_size = 0;
+ int old_size;
+ int diff;
+ symbolS *gen_label = NULL;
+ offsetT frag_offset;
+
+ /* It does not fit. Find something that does and
+ convert immediately. */
+ frag_offset = fragP->fr_opcode - fragP->fr_literal;
+ istack_init (&istack);
+ xg_assembly_relax (&istack, &orig_t_insn,
+ segP, fragP, frag_offset, min_steps, 0);
+
+ old_size = xtensa_insn_length (xtensa_default_isa, orig_t_insn.opcode);
+
+ /* Assemble this right inline. */
+
+ /* First, create the mapping from a label name to the REAL label. */
+ total_size = 0;
+ for (i = 0; i < istack.ninsn; i++)
+ {
+ TInsn *t_insn = &istack.insn[i];
+ int size = 0;
+ fragS *lit_frag;
+
+ switch (t_insn->insn_type)
+ {
+ case ITYPE_LITERAL:
+ if (lit_sym != NULL)
+ as_bad (_("multiple literals in expansion"));
+ /* First find the appropriate space in the literal pool. */
+ lit_frag = fragP->tc_frag_data.literal_frag;
+ if (lit_frag == NULL)
+ as_bad (_("no registered fragment for literal"));
+ if (t_insn->ntok != 1)
+ as_bad (_("number of literal tokens != 1"));
+
+ /* Set the literal symbol and add a fixup. */
+ lit_sym = lit_frag->fr_symbol;
+ break;
+
+ case ITYPE_LABEL:
+ assert (gen_label == NULL);
+ gen_label = symbol_new (FAKE_LABEL_NAME, now_seg,
+ fragP->fr_opcode - fragP->fr_literal +
+ total_size, fragP);
+ break;
+
+ case ITYPE_INSN:
+ size = xtensa_insn_length (xtensa_default_isa, t_insn->opcode);
+ total_size += size;
+ break;
+ }
+ }
+
+ total_size = 0;
+ for (i = 0; i < istack.ninsn; i++)
+ {
+ TInsn *t_insn = &istack.insn[i];
+ fragS *lit_frag;
+ int size;
+ segT target_seg;
+
+ switch (t_insn->insn_type)
+ {
+ case ITYPE_LITERAL:
+ lit_frag = fragP->tc_frag_data.literal_frag;
+ /* already checked */
+ assert (lit_frag != NULL);
+ assert (lit_sym != NULL);
+ assert (t_insn->ntok == 1);
+ /* add a fixup */
+ target_seg = S_GET_SEGMENT (lit_sym);
+ assert (target_seg);
+ fix_new_exp_in_seg (target_seg, 0, lit_frag, 0, 4,
+ &t_insn->tok[0], FALSE, BFD_RELOC_32);
+ break;
+
+ case ITYPE_LABEL:
+ break;
+
+ case ITYPE_INSN:
+ xg_resolve_labels (t_insn, gen_label);
+ xg_resolve_literals (t_insn, lit_sym);
+ size = xtensa_insn_length (xtensa_default_isa, t_insn->opcode);
+ total_size += size;
+ xg_emit_insn_to_buf (t_insn, immed_instr, fragP,
+ immed_instr - fragP->fr_literal, TRUE);
+ immed_instr += size;
+ break;
+ }
+ }
+
+ diff = total_size - old_size;
+ assert (diff >= 0);
+ if (diff != 0)
+ expanded = TRUE;
+ assert (diff <= fragP->fr_var);
+ fragP->fr_var -= diff;
+ fragP->fr_fix += diff;
+ }
+
+ /* Clean it up. */
+ fragP->fr_var = 0;
+
+ /* Check for undefined immediates in LOOP instructions. */
+ if (is_loop_opcode (orig_t_insn.opcode))
+ {
+ symbolS *sym;
+ sym = orig_t_insn.tok[1].X_add_symbol;
+ if (sym != NULL && !S_IS_DEFINED (sym))
+ {
+ as_bad (_("unresolved loop target symbol: %s"), S_GET_NAME (sym));
+ return;
+ }
+ sym = orig_t_insn.tok[1].X_op_symbol;
+ if (sym != NULL && !S_IS_DEFINED (sym))
+ {
+ as_bad (_("unresolved loop target symbol: %s"), S_GET_NAME (sym));
+ return;
+ }
+ }
+
+ if (expanded && is_loop_opcode (orig_t_insn.opcode))
+ convert_frag_immed_finish_loop (segP, fragP, &orig_t_insn);
+
+ if (expanded && is_direct_call_opcode (orig_t_insn.opcode))
+ {
+ /* Add an expansion note on the expanded instruction. */
+ fix_new_exp_in_seg (now_seg, 0, fragP, fr_opcode - fragP->fr_literal, 4,
+ &orig_t_insn.tok[0], TRUE,
+ BFD_RELOC_XTENSA_ASM_EXPAND);
+
+ }
+}
+
+
+/* Add a new fix expression into the desired segment. We have to
+ switch to that segment to do this. */
+
+static fixS *
+fix_new_exp_in_seg (new_seg, new_subseg,
+ frag, where, size, exp, pcrel, r_type)
+ segT new_seg;
+ subsegT new_subseg;
+ fragS *frag;
+ int where;
+ int size;
+ expressionS *exp;
+ int pcrel;
+ bfd_reloc_code_real_type r_type;
+{
+ fixS *new_fix;
+ segT seg = now_seg;
+ subsegT subseg = now_subseg;
+ assert (new_seg != 0);
+ subseg_set (new_seg, new_subseg);
+
+ if (r_type == BFD_RELOC_32
+ && exp->X_add_symbol
+ && exp->X_add_symbol->sy_tc.plt == 1)
+ {
+ r_type = BFD_RELOC_XTENSA_PLT;
+ }
+
+ new_fix = fix_new_exp (frag, where, size, exp, pcrel, r_type);
+ subseg_set (seg, subseg);
+ return new_fix;
+}
+
+
+/* Relax a loop instruction so that it can span loop >256 bytes. */
+/*
+ loop as, .L1
+ .L0:
+ rsr as, LEND
+ wsr as, LBEG
+ addi as, as, lo8(label-.L1)
+ addmi as, as, mid8(label-.L1)
+ wsr as, LEND
+ isync
+ rsr as, LCOUNT
+ addi as, as, 1
+ .L1:
+ <<body>>
+ label: */
+
+static void
+convert_frag_immed_finish_loop (segP, fragP, t_insn)
+ segT segP;
+ fragS *fragP;
+ TInsn *t_insn;
+{
+ TInsn loop_insn;
+ TInsn addi_insn;
+ TInsn addmi_insn;
+ unsigned long target;
+ static xtensa_insnbuf insnbuf = NULL;
+ unsigned int loop_length, loop_length_hi, loop_length_lo;
+ xtensa_isa isa = xtensa_default_isa;
+ addressT loop_offset;
+ addressT addi_offset = 9;
+ addressT addmi_offset = 12;
+
+ if (!insnbuf)
+ insnbuf = xtensa_insnbuf_alloc (isa);
+
+ /* Get the loop offset. */
+ loop_offset = get_expanded_loop_offset (t_insn->opcode);
+ /* Validate that there really is a LOOP at the loop_offset. */
+ tinsn_from_chars (&loop_insn, fragP->fr_opcode + loop_offset);
+
+ if (!is_loop_opcode (loop_insn.opcode))
+ {
+ as_bad_where (fragP->fr_file, fragP->fr_line,
+ _("loop relaxation specification does not correspond"));
+ assert (0);
+ }
+ addi_offset += loop_offset;
+ addmi_offset += loop_offset;
+
+ assert (t_insn->ntok == 2);
+ target = get_expression_value (segP, &t_insn->tok[1]);
+
+ know (symbolP);
+ know (symbolP->sy_frag);
+ know (!(S_GET_SEGMENT (symbolP) == absolute_section)
+ || symbol_get_frag (symbolP) == &zero_address_frag);
+
+ loop_length = target - (fragP->fr_address + fragP->fr_fix);
+ loop_length_hi = loop_length & ~0x0ff;
+ loop_length_lo = loop_length & 0x0ff;
+ if (loop_length_lo >= 128)
+ {
+ loop_length_lo -= 256;
+ loop_length_hi += 256;
+ }
+
+ /* Because addmi sign-extends the immediate, 'loop_length_hi' can be at most
+ 32512. If the loop is larger than that, then we just fail. */
+ if (loop_length_hi > 32512)
+ as_bad_where (fragP->fr_file, fragP->fr_line,
+ _("loop too long for LOOP instruction"));
+
+ tinsn_from_chars (&addi_insn, fragP->fr_opcode + addi_offset);
+ assert (addi_insn.opcode == xtensa_addi_opcode);
+
+ tinsn_from_chars (&addmi_insn, fragP->fr_opcode + addmi_offset);
+ assert (addmi_insn.opcode == xtensa_addmi_opcode);
+
+ set_expr_const (&addi_insn.tok[2], loop_length_lo);
+ tinsn_to_insnbuf (&addi_insn, insnbuf);
+
+ fragP->tc_frag_data.is_insn = TRUE;
+ xtensa_insnbuf_to_chars (isa, insnbuf, fragP->fr_opcode + addi_offset);
+
+ set_expr_const (&addmi_insn.tok[2], loop_length_hi);
+ tinsn_to_insnbuf (&addmi_insn, insnbuf);
+ xtensa_insnbuf_to_chars (isa, insnbuf, fragP->fr_opcode + addmi_offset);
+}
+
+
+static offsetT
+get_expression_value (segP, exp)
+ segT segP;
+ expressionS *exp;
+{
+ if (exp->X_op == O_constant)
+ return exp->X_add_number;
+ if (exp->X_op == O_symbol)
+ {
+ /* Find the fragment. */
+ symbolS *sym = exp->X_add_symbol;
+
+ assert (S_GET_SEGMENT (sym) == segP
+ || S_GET_SEGMENT (sym) == absolute_section);
+
+ return (S_GET_VALUE (sym) + exp->X_add_number);
+ }
+ as_bad (_("invalid expression evaluation type %d"), exp->X_op);
+ return 0;
+}
+
+
+/* A map that keeps information on a per-subsegment basis. This is
+ maintained during initial assembly, but is invalid once the
+ subsegments are smashed together. I.E., it cannot be used during
+ the relaxation. */
+
+typedef struct subseg_map_struct
+{
+ /* the key */
+ segT seg;
+ subsegT subseg;
+
+ /* the data */
+ unsigned flags;
+
+ struct subseg_map_struct *next;
+} subseg_map;
+
+static subseg_map *sseg_map = NULL;
+
+
+static unsigned
+get_last_insn_flags (seg, subseg)
+ segT seg;
+ subsegT subseg;
+{
+ subseg_map *subseg_e;
+
+ for (subseg_e = sseg_map; subseg_e != NULL; subseg_e = subseg_e->next)
+ if (seg == subseg_e->seg && subseg == subseg_e->subseg)
+ return subseg_e->flags;
+
+ return 0;
+}
+
+
+static void
+set_last_insn_flags (seg, subseg, fl, val)
+ segT seg;
+ subsegT subseg;
+ unsigned fl;
+ bfd_boolean val;
+{
+ subseg_map *subseg_e;
+
+ for (subseg_e = sseg_map; subseg_e; subseg_e = subseg_e->next)
+ if (seg == subseg_e->seg && subseg == subseg_e->subseg)
+ break;
+
+ if (!subseg_e)
+ {
+ subseg_e = (subseg_map *) xmalloc (sizeof (subseg_map));
+ memset (subseg_e, 0, sizeof (subseg_map));
+ subseg_e->seg = seg;
+ subseg_e->subseg = subseg;
+ subseg_e->flags = 0;
+ subseg_e->next = sseg_map;
+ sseg_map = subseg_e;
+ }
+
+ if (val)
+ subseg_e->flags |= fl;
+ else
+ subseg_e->flags &= ~fl;
+}
+
+
+/* Segment Lists and emit_state Stuff. */
+
+/* Remove the segment from the global sections list. */
+
+static void
+xtensa_remove_section (sec)
+ segT sec;
+{
+ /* Handle brain-dead bfd_section_list_remove macro, which
+ expect the address of the prior section's "next" field, not
+ just the address of the section to remove. */
+
+ segT *ps_next_ptr = &stdoutput->sections;
+ while (*ps_next_ptr != sec && *ps_next_ptr != NULL)
+ ps_next_ptr = &(*ps_next_ptr)->next;
+
+ assert (*ps_next_ptr != NULL);
+
+ bfd_section_list_remove (stdoutput, ps_next_ptr);
+}
+
+
+static void
+xtensa_insert_section (after_sec, sec)
+ segT after_sec;
+ segT sec;
+{
+ segT *after_sec_next;
+ if (after_sec == NULL)
+ after_sec_next = &stdoutput->sections;
+ else
+ after_sec_next = &after_sec->next;
+
+ bfd_section_list_insert (stdoutput, after_sec_next, sec);
+}
+
+
+static void
+xtensa_move_seg_list_to_beginning (head)
+ seg_list *head;
+{
+ head = head->next;
+ while (head)
+ {
+ segT literal_section = head->seg;
+
+ /* Move the literal section to the front of the section list. */
+ assert (literal_section);
+ xtensa_remove_section (literal_section);
+ xtensa_insert_section (NULL, literal_section);
+
+ head = head->next;
+ }
+}
+
+
+void
+xtensa_move_literals ()
+{
+ seg_list *segment;
+ frchainS *frchain_from, *frchain_to;
+ fragS *search_frag, *next_frag, *last_frag, *literal_pool, *insert_after;
+ fragS **frag_splice;
+ emit_state state;
+ segT dest_seg;
+ fixS *fix, *next_fix, **fix_splice;
+
+ /* As clunky as this is, we can't rely on frag_var
+ and frag_variant to get called in all situations. */
+
+ segment = literal_head->next;
+ while (segment)
+ {
+ frchain_from = seg_info (segment->seg)->frchainP;
+ search_frag = frchain_from->frch_root;
+ while (search_frag)
+ {
+ search_frag->tc_frag_data.is_literal = TRUE;
+ search_frag = search_frag->fr_next;
+ }
+ segment = segment->next;
+ }
+
+ if (use_literal_section)
+ return;
+
+ segment = literal_head->next;
+ while (segment)
+ {
+ frchain_from = seg_info (segment->seg)->frchainP;
+ search_frag = frchain_from->frch_root;
+ literal_pool = NULL;
+ frchain_to = NULL;
+ frag_splice = &(frchain_from->frch_root);
+
+ while (!search_frag->tc_frag_data.literal_frag)
+ {
+ assert (search_frag->fr_fix == 0
+ || search_frag->fr_type == rs_align);
+ search_frag = search_frag->fr_next;
+ }
+
+ assert (search_frag->tc_frag_data.literal_frag->fr_subtype
+ == RELAX_LITERAL_POOL_BEGIN);
+ xtensa_switch_section_emit_state (&state, segment->seg, 0);
+
+ /* Make sure that all the frags in this series are closed, and
+ that there is at least one left over of zero-size. This
+ prevents us from making a segment with an frchain without any
+ frags in it. */
+ frag_variant (rs_fill, 0, 0, 0, NULL, 0, NULL);
+ last_frag = frag_now;
+ frag_variant (rs_fill, 0, 0, 0, NULL, 0, NULL);
+
+ while (search_frag != frag_now)
+ {
+ next_frag = search_frag->fr_next;
+
+ /* First, move the frag out of the literal section and
+ to the appropriate place. */
+ if (search_frag->tc_frag_data.literal_frag)
+ {
+ literal_pool = search_frag->tc_frag_data.literal_frag;
+ assert (literal_pool->fr_subtype == RELAX_LITERAL_POOL_BEGIN);
+ /* Note that we set this fr_var to be a fix
+ chain when we created the literal pool location
+ as RELAX_LITERAL_POOL_BEGIN. */
+ frchain_to = (frchainS *) literal_pool->fr_var;
+ }
+ insert_after = literal_pool;
+
+ while (insert_after->fr_next->fr_subtype != RELAX_LITERAL_POOL_END)
+ insert_after = insert_after->fr_next;
+
+ dest_seg = (segT) insert_after->fr_next->fr_var;
+
+ *frag_splice = next_frag;
+ search_frag->fr_next = insert_after->fr_next;
+ insert_after->fr_next = search_frag;
+ search_frag->tc_frag_data.lit_seg = dest_seg;
+
+ /* Now move any fixups associated with this frag to the
+ right section. */
+ fix = frchain_from->fix_root;
+ fix_splice = &(frchain_from->fix_root);
+ while (fix)
+ {
+ next_fix = fix->fx_next;
+ if (fix->fx_frag == search_frag)
+ {
+ *fix_splice = next_fix;
+ fix->fx_next = frchain_to->fix_root;
+ frchain_to->fix_root = fix;
+ if (frchain_to->fix_tail == NULL)
+ frchain_to->fix_tail = fix;
+ }
+ else
+ fix_splice = &(fix->fx_next);
+ fix = next_fix;
+ }
+ search_frag = next_frag;
+ }
+
+ if (frchain_from->fix_root != NULL)
+ {
+ frchain_from = seg_info (segment->seg)->frchainP;
+ as_warn (_("fixes not all moved from %s"), segment->seg->name);
+
+ assert (frchain_from->fix_root == NULL);
+ }
+ frchain_from->fix_tail = NULL;
+ xtensa_restore_emit_state (&state);
+ segment = segment->next;
+ }
+
+ xtensa_move_frag_symbols ();
+}
+
+
+static void
+xtensa_move_frag_symbol (sym)
+ symbolS *sym;
+{
+ fragS *frag = symbol_get_frag (sym);
+
+ if (frag->tc_frag_data.lit_seg != (segT) 0)
+ S_SET_SEGMENT (sym, frag->tc_frag_data.lit_seg);
+}
+
+
+static void
+xtensa_move_frag_symbols ()
+{
+ symbolS *symbolP;
+
+ /* Although you might think that only one of these lists should be
+ searched, it turns out that the difference of the two sets
+ (either way) is not empty. They do overlap quite a bit,
+ however. */
+
+ for (symbolP = symbol_rootP; symbolP; symbolP = symbolP->sy_next)
+ xtensa_move_frag_symbol (symbolP);
+
+ map_over_defined_symbols (xtensa_move_frag_symbol);
+}
+
+
+static void
+xtensa_reorder_seg_list (head, after)
+ seg_list *head;
+ segT after;
+{
+ /* Move all of the sections in the section list to come
+ after "after" in the gnu segment list. */
+
+ head = head->next;
+ while (head)
+ {
+ segT literal_section = head->seg;
+
+ /* Move the literal section after "after". */
+ assert (literal_section);
+ if (literal_section != after)
+ {
+ xtensa_remove_section (literal_section);
+ xtensa_insert_section (after, literal_section);
+ }
+
+ head = head->next;
+ }
+}
+
+
+/* Push all the literal segments to the end of the gnu list. */
+
+void
+xtensa_reorder_segments ()
+{
+ segT sec;
+ segT last_sec;
+ int old_count = 0;
+ int new_count = 0;
+
+ for (sec = stdoutput->sections; sec != NULL; sec = sec->next)
+ old_count++;
+
+ /* Now that we have the last section, push all the literal
+ sections to the end. */
+ last_sec = get_last_sec ();
+ xtensa_reorder_seg_list (literal_head, last_sec);
+ xtensa_reorder_seg_list (init_literal_head, last_sec);
+ xtensa_reorder_seg_list (fini_literal_head, last_sec);
+
+ /* Now perform the final error check. */
+ for (sec = stdoutput->sections; sec != NULL; sec = sec->next)
+ new_count++;
+ assert (new_count == old_count);
+}
+
+
+segT
+get_last_sec ()
+{
+ segT last_sec = stdoutput->sections;
+ while (last_sec->next != NULL)
+ last_sec = last_sec->next;
+
+ return last_sec;
+}
+
+
+/* Change the emit state (seg, subseg, and frag related stuff) to the
+ correct location. Return a emit_state which can be passed to
+ xtensa_restore_emit_state to return to current fragment. */
+
+void
+xtensa_switch_to_literal_fragment (result)
+ emit_state *result;
+{
+ /* When we mark a literal pool location, we want to put a frag in
+ the literal pool that points to it. But to do that, we want to
+ switch_to_literal_fragment. But literal sections don't have
+ literal pools, so their location is always null, so we would
+ recurse forever. This is kind of hacky, but it works. */
+
+ static bfd_boolean recursive = FALSE;
+ fragS *pool_location = get_literal_pool_location (now_seg);
+ bfd_boolean is_init =
+ (now_seg && !strcmp (segment_name (now_seg), INIT_SECTION_NAME));
+
+ bfd_boolean is_fini =
+ (now_seg && !strcmp (segment_name (now_seg), FINI_SECTION_NAME));
+
+
+ if (pool_location == NULL
+ && !use_literal_section
+ && !recursive
+ && !is_init && ! is_fini)
+ {
+ as_warn (_("inlining literal pool; "
+ "specify location with .literal_position."));
+ recursive = TRUE;
+ xtensa_mark_literal_pool_location (FALSE);
+ recursive = FALSE;
+ }
+
+ /* Special case: If we are in the ".fini" or ".init" section, then
+ we will ALWAYS be generating to the ".fini.literal" and
+ ".init.literal" sections. */
+
+ if (is_init)
+ {
+ cache_literal_section (init_literal_head,
+ default_lit_sections.init_lit_seg_name,
+ &default_lit_sections.init_lit_seg);
+ xtensa_switch_section_emit_state (result,
+ default_lit_sections.init_lit_seg, 0);
+ }
+ else if (is_fini)
+ {
+ cache_literal_section (fini_literal_head,
+ default_lit_sections.fini_lit_seg_name,
+ &default_lit_sections.fini_lit_seg);
+ xtensa_switch_section_emit_state (result,
+ default_lit_sections.fini_lit_seg, 0);
+ }
+ else
+ {
+ cache_literal_section (literal_head,
+ default_lit_sections.lit_seg_name,
+ &default_lit_sections.lit_seg);
+ xtensa_switch_section_emit_state (result,
+ default_lit_sections.lit_seg, 0);
+ }
+
+ if (!use_literal_section &&
+ !is_init && !is_fini &&
+ get_literal_pool_location (now_seg) != pool_location)
+ {
+ /* Close whatever frag is there. */
+ frag_variant (rs_fill, 0, 0, 0, NULL, 0, NULL);
+ frag_now->tc_frag_data.literal_frag = pool_location;
+ frag_variant (rs_fill, 0, 0, 0, NULL, 0, NULL);
+ }
+
+ /* Do a 4 byte align here. */
+ frag_align (2, 0, 0);
+}
+
+
+/* Call this function before emitting data into the literal section.
+ This is a helper function for xtensa_switch_to_literal_fragment.
+ This is similar to a .section new_now_seg subseg. */
+
+void
+xtensa_switch_section_emit_state (state, new_now_seg, new_now_subseg)
+ emit_state *state;
+ segT new_now_seg;
+ subsegT new_now_subseg;
+{
+ state->name = now_seg->name;
+ state->now_seg = now_seg;
+ state->now_subseg = now_subseg;
+ state->generating_literals = generating_literals;
+ generating_literals++;
+ subseg_new (segment_name (new_now_seg), new_now_subseg);
+}
+
+
+/* Use to restore the emitting into the normal place. */
+
+void
+xtensa_restore_emit_state (state)
+ emit_state *state;
+{
+ generating_literals = state->generating_literals;
+ subseg_new (state->name, state->now_subseg);
+}
+
+
+/* Get a segment of a given name. If the segment is already
+ present, return it; otherwise, create a new one. */
+
+static void
+cache_literal_section (head, name, seg)
+ seg_list *head;
+ const char *name;
+ segT *seg;
+{
+ segT current_section = now_seg;
+ int current_subsec = now_subseg;
+
+ if (*seg != 0)
+ return;
+ *seg = retrieve_literal_seg (head, name);
+ subseg_set (current_section, current_subsec);
+}
+
+
+/* Get a segment of a given name. If the segment is already
+ present, return it; otherwise, create a new one. */
+
+static segT
+retrieve_literal_seg (head, name)
+ seg_list *head;
+ const char *name;
+{
+ segT ret = 0;
+
+ assert (head);
+
+ ret = seg_present (name);
+ if (!ret)
+ {
+ ret = subseg_new (name, (subsegT) 0);
+ add_seg_list (head, ret);
+ bfd_set_section_flags (stdoutput, ret, SEC_HAS_CONTENTS |
+ SEC_READONLY | SEC_ALLOC | SEC_LOAD | SEC_CODE);
+ bfd_set_section_alignment (stdoutput, ret, 2);
+ }
+
+ return ret;
+}
+
+
+/* Return a segment of a given name if it is present. */
+
+static segT
+seg_present (name)
+ const char *name;
+{
+ segT seg;
+ seg = stdoutput->sections;
+
+ while (seg)
+ {
+ if (!strcmp (segment_name (seg), name))
+ return seg;
+ seg = seg->next;
+ }
+
+ return 0;
+}
+
+
+/* Add a segment to a segment list. */
+
+static void
+add_seg_list (head, seg)
+ seg_list *head;
+ segT seg;
+{
+ seg_list *n;
+ n = (seg_list *) xmalloc (sizeof (seg_list));
+ assert (n);
+
+ n->seg = seg;
+ n->next = head->next;
+ head->next = n;
+}
+
+
+/* Set up Property Tables after Relaxation. */
+
+#define XTENSA_INSN_SEC_NAME ".xt.insn"
+#define XTENSA_LIT_SEC_NAME ".xt.lit"
+
+void
+xtensa_post_relax_hook ()
+{
+ xtensa_move_seg_list_to_beginning (literal_head);
+ xtensa_move_seg_list_to_beginning (init_literal_head);
+ xtensa_move_seg_list_to_beginning (fini_literal_head);
+
+ xtensa_create_property_segments (get_frag_is_insn,
+ XTENSA_INSN_SEC_NAME,
+ xt_literal_sec);
+ if (use_literal_section)
+ xtensa_create_property_segments (get_frag_is_literal,
+ XTENSA_LIT_SEC_NAME,
+ xt_insn_sec);
+}
+
+
+static bfd_boolean
+get_frag_is_literal (fragP)
+ const fragS *fragP;
+{
+ assert (fragP != NULL);
+ return (fragP->tc_frag_data.is_literal);
+}
+
+
+static bfd_boolean
+get_frag_is_insn (fragP)
+ const fragS *fragP;
+{
+ assert (fragP != NULL);
+ return (fragP->tc_frag_data.is_insn);
+}
+
+
+static void
+xtensa_create_property_segments (property_function, section_name_base,
+ sec_type)
+ frag_predicate property_function;
+ const char * section_name_base;
+ xt_section_type sec_type;
+{
+ segT *seclist;
+
+ /* Walk over all of the current segments.
+ Walk over each fragment
+ For each fragment that has instructions
+ Build an instruction record (append where possible). */
+
+ for (seclist = &stdoutput->sections;
+ seclist && *seclist;
+ seclist = &(*seclist)->next)
+ {
+ segT sec = *seclist;
+ if (section_has_property (sec, property_function))
+ {
+ char * property_section_name =
+ xtensa_get_property_section_name (stdoutput, sec,
+ section_name_base);
+ segT insn_sec = retrieve_xtensa_section (property_section_name);
+ segment_info_type *xt_seg_info = retrieve_segment_info (insn_sec);
+ xtensa_block_info ** xt_blocks =
+ &xt_seg_info->tc_segment_info_data.blocks[sec_type];
+ /* Walk over all of the frchains here and add new sections. */
+ add_xt_block_frags (sec, insn_sec, xt_blocks, property_function);
+ }
+ }
+
+ /* Now we fill them out.... */
+
+ for (seclist = &stdoutput->sections;
+ seclist && *seclist;
+ seclist = &(*seclist)->next)
+ {
+ segment_info_type *seginfo;
+ xtensa_block_info *block;
+ segT sec = *seclist;
+ seginfo = seg_info (sec);
+ block = seginfo->tc_segment_info_data.blocks[sec_type];
+
+ if (block)
+ {
+ xtensa_block_info *cur_block;
+ /* This is a section with some data. */
+ size_t num_recs = 0;
+ size_t rec_size;
+
+ for (cur_block = block; cur_block; cur_block = cur_block->next)
+ num_recs++;
+
+ rec_size = num_recs * 8;
+ bfd_set_section_size (stdoutput, sec, rec_size);
+
+ /* In order to make this work with the assembler, we have to
+ build some frags and then build the "fixups" for it. It
+ would be easier to just set the contents then set the
+ arlents. */
+
+ if (num_recs)
+ {
+ /* Allocate a fragment and leak it. */
+ fragS *fragP;
+ size_t frag_size;
+ fixS *fixes;
+ frchainS *frchainP;
+ size_t i;
+ char *frag_data;
+
+ frag_size = sizeof (fragS) + rec_size;
+ fragP = (fragS *) xmalloc (frag_size);
+
+ memset (fragP, 0, frag_size);
+ fragP->fr_address = 0;
+ fragP->fr_next = NULL;
+ fragP->fr_fix = rec_size;
+ fragP->fr_var = 0;
+ fragP->fr_type = rs_fill;
+ /* the rest are zeros */
+
+ frchainP = seginfo->frchainP;
+ frchainP->frch_root = fragP;
+ frchainP->frch_last = fragP;
+
+ fixes = (fixS *) xmalloc (sizeof (fixS) * num_recs);
+ memset (fixes, 0, sizeof (fixS) * num_recs);
+
+ seginfo->fix_root = fixes;
+ seginfo->fix_tail = &fixes[num_recs - 1];
+ cur_block = block;
+ frag_data = &fragP->fr_literal[0];
+ for (i = 0; i < num_recs; i++)
+ {
+ fixS *fix = &fixes[i];
+ assert (cur_block);
+
+ /* Write the fixup. */
+ if (i != num_recs - 1)
+ fix->fx_next = &fixes[i + 1];
+ else
+ fix->fx_next = NULL;
+ fix->fx_size = 4;
+ fix->fx_done = 0;
+ fix->fx_frag = fragP;
+ fix->fx_where = i * 8;
+ fix->fx_addsy = section_symbol (cur_block->sec);
+ fix->fx_offset = cur_block->offset;
+ fix->fx_r_type = BFD_RELOC_32;
+ fix->fx_file = "Internal Assembly";
+ fix->fx_line = 0;
+
+ /* Write the length. */
+ md_number_to_chars (&frag_data[4 + 8 * i],
+ cur_block->size, 4);
+ cur_block = cur_block->next;
+ }
+ }
+ }
+ }
+}
+
+
+segment_info_type *
+retrieve_segment_info (seg)
+ segT seg;
+{
+ segment_info_type *seginfo;
+ seginfo = (segment_info_type *) bfd_get_section_userdata (stdoutput, seg);
+ if (!seginfo)
+ {
+ frchainS *frchainP;
+
+ seginfo = (segment_info_type *) xmalloc (sizeof (*seginfo));
+ memset ((PTR) seginfo, 0, sizeof (*seginfo));
+ seginfo->fix_root = NULL;
+ seginfo->fix_tail = NULL;
+ seginfo->bfd_section = seg;
+ seginfo->sym = 0;
+ /* We will not be dealing with these, only our special ones. */
+#if 0
+ if (seg == bfd_abs_section_ptr)
+ abs_seg_info = seginfo;
+ else if (seg == bfd_und_section_ptr)
+ und_seg_info = seginfo;
+ else
+#endif
+ bfd_set_section_userdata (stdoutput, seg, (PTR) seginfo);
+#if 0
+ seg_fix_rootP = &segment_info[seg].fix_root;
+ seg_fix_tailP = &segment_info[seg].fix_tail;
+#endif
+
+ frchainP = (frchainS *) xmalloc (sizeof (frchainS));
+ frchainP->frch_root = NULL;
+ frchainP->frch_last = NULL;
+ frchainP->frch_next = NULL;
+ frchainP->frch_seg = seg;
+ frchainP->frch_subseg = 0;
+ frchainP->fix_root = NULL;
+ frchainP->fix_tail = NULL;
+ /* Do not init the objstack. */
+ /* obstack_begin (&frchainP->frch_obstack, chunksize); */
+ /* frchainP->frch_frag_now = fragP; */
+ frchainP->frch_frag_now = NULL;
+
+ seginfo->frchainP = frchainP;
+ }
+
+ return seginfo;
+}
+
+
+segT
+retrieve_xtensa_section (sec_name)
+ char *sec_name;
+{
+ bfd *abfd = stdoutput;
+ flagword flags, out_flags, link_once_flags;
+ segT s;
+
+ flags = bfd_get_section_flags (abfd, now_seg);
+ link_once_flags = (flags & SEC_LINK_ONCE);
+ if (link_once_flags)
+ link_once_flags |= (flags & SEC_LINK_DUPLICATES);
+ out_flags = (SEC_RELOC | SEC_HAS_CONTENTS | SEC_READONLY | link_once_flags);
+
+ s = bfd_make_section_old_way (abfd, sec_name);
+ if (s == NULL)
+ as_bad (_("could not create section %s"), sec_name);
+ if (!bfd_set_section_flags (abfd, s, out_flags))
+ as_bad (_("invalid flag combination on section %s"), sec_name);
+
+ return s;
+}
+
+
+bfd_boolean
+section_has_property (sec, property_function)
+ segT sec;
+ frag_predicate property_function;
+{
+ segment_info_type *seginfo = seg_info (sec);
+ fragS *fragP;
+
+ if (seginfo && seginfo->frchainP)
+ {
+ for (fragP = seginfo->frchainP->frch_root; fragP; fragP = fragP->fr_next)
+ {
+ if (property_function (fragP)
+ && (fragP->fr_type != rs_fill || fragP->fr_fix != 0))
+ return TRUE;
+ }
+ }
+ return FALSE;
+}
+
+
+/* Two types of block sections exist right now: literal and insns. */
+
+void
+add_xt_block_frags (sec, xt_block_sec, xt_block, property_function)
+ segT sec;
+ segT xt_block_sec;
+ xtensa_block_info **xt_block;
+ frag_predicate property_function;
+{
+ segment_info_type *seg_info;
+ segment_info_type *xt_seg_info;
+ bfd_vma seg_offset;
+ fragS *fragP;
+
+ xt_seg_info = retrieve_segment_info (xt_block_sec);
+ seg_info = retrieve_segment_info (sec);
+
+ /* Build it if needed. */
+ while (*xt_block != NULL)
+ xt_block = &(*xt_block)->next;
+ /* We are either at NULL at the beginning or at the end. */
+
+ /* Walk through the frags. */
+ seg_offset = 0;
+
+ if (seg_info->frchainP)
+ {
+ for (fragP = seg_info->frchainP->frch_root;
+ fragP;
+ fragP = fragP->fr_next)
+ {
+ if (property_function (fragP)
+ && (fragP->fr_type != rs_fill || fragP->fr_fix != 0))
+ {
+ if (*xt_block != NULL)
+ {
+ if ((*xt_block)->offset + (*xt_block)->size
+ == fragP->fr_address)
+ (*xt_block)->size += fragP->fr_fix;
+ else
+ xt_block = &((*xt_block)->next);
+ }
+ if (*xt_block == NULL)
+ {
+ xtensa_block_info *new_block = (xtensa_block_info *)
+ xmalloc (sizeof (xtensa_block_info));
+ new_block->sec = sec;
+ new_block->offset = fragP->fr_address;
+ new_block->size = fragP->fr_fix;
+ new_block->next = NULL;
+ *xt_block = new_block;
+ }
+ }
+ }
+ }
+}
+
+
+/* Instruction Stack Functions (from "xtensa-istack.h"). */
+
+void
+istack_init (stack)
+ IStack *stack;
+{
+ memset (stack, 0, sizeof (IStack));
+ stack->ninsn = 0;
+}
+
+
+bfd_boolean
+istack_empty (stack)
+ IStack *stack;
+{
+ return (stack->ninsn == 0);
+}
+
+
+bfd_boolean
+istack_full (stack)
+ IStack *stack;
+{
+ return (stack->ninsn == MAX_ISTACK);
+}
+
+
+/* Return a pointer to the top IStack entry.
+ It is an error to call this if istack_empty () is true. */
+
+TInsn *
+istack_top (stack)
+ IStack *stack;
+{
+ int rec = stack->ninsn - 1;
+ assert (!istack_empty (stack));
+ return &stack->insn[rec];
+}
+
+
+/* Add a new TInsn to an IStack.
+ It is an error to call this if istack_full () is true. */
+
+void
+istack_push (stack, insn)
+ IStack *stack;
+ TInsn *insn;
+{
+ int rec = stack->ninsn;
+ assert (!istack_full (stack));
+ tinsn_copy (&stack->insn[rec], insn);
+ stack->ninsn++;
+}
+
+
+/* Clear space for the next TInsn on the IStack and return a pointer
+ to it. It is an error to call this if istack_full () is true. */
+
+TInsn *
+istack_push_space (stack)
+ IStack *stack;
+{
+ int rec = stack->ninsn;
+ TInsn *insn;
+ assert (!istack_full (stack));
+ insn = &stack->insn[rec];
+ memset (insn, 0, sizeof (TInsn));
+ stack->ninsn++;
+ return insn;
+}
+
+
+/* Remove the last pushed instruction. It is an error to call this if
+ istack_empty () returns true. */
+
+void
+istack_pop (stack)
+ IStack *stack;
+{
+ int rec = stack->ninsn - 1;
+ assert (!istack_empty (stack));
+ stack->ninsn--;
+ memset (&stack->insn[rec], 0, sizeof (TInsn));
+}
+
+
+/* TInsn functions. */
+
+void
+tinsn_init (dst)
+ TInsn *dst;
+{
+ memset (dst, 0, sizeof (TInsn));
+}
+
+
+void
+tinsn_copy (dst, src)
+ TInsn *dst;
+ const TInsn *src;
+{
+ tinsn_init (dst);
+ memcpy (dst, src, sizeof (TInsn));
+}
+
+
+/* Get the ``num''th token of the TInsn.
+ It is illegal to call this if num > insn->ntoks. */
+
+expressionS *
+tinsn_get_tok (insn, num)
+ TInsn *insn;
+ int num;
+{
+ assert (num < insn->ntok);
+ return &insn->tok[num];
+}
+
+
+/* Return true if ANY of the operands in the insn are symbolic. */
+
+static bfd_boolean
+tinsn_has_symbolic_operands (insn)
+ const TInsn *insn;
+{
+ int i;
+ int n = insn->ntok;
+
+ assert (insn->insn_type == ITYPE_INSN);
+
+ for (i = 0; i < n; ++i)
+ {
+ switch (insn->tok[i].X_op)
+ {
+ case O_register:
+ case O_constant:
+ break;
+ default:
+ return TRUE;
+ }
+ }
+ return FALSE;
+}
+
+
+bfd_boolean
+tinsn_has_invalid_symbolic_operands (insn)
+ const TInsn *insn;
+{
+ int i;
+ int n = insn->ntok;
+
+ assert (insn->insn_type == ITYPE_INSN);
+
+ for (i = 0; i < n; ++i)
+ {
+ switch (insn->tok[i].X_op)
+ {
+ case O_register:
+ case O_constant:
+ break;
+ default:
+ if (i == get_relaxable_immed (insn->opcode))
+ break;
+ as_bad (_("invalid symbolic operand %d on '%s'"),
+ i, xtensa_opcode_name (xtensa_default_isa, insn->opcode));
+ return TRUE;
+ }
+ }
+ return FALSE;
+}
+
+
+/* For assembly code with complex expressions (e.g. subtraction),
+ we have to build them in the literal pool so that
+ their results are calculated correctly after relaxation.
+ The relaxation only handles expressions that
+ boil down to SYMBOL + OFFSET. */
+
+static bfd_boolean
+tinsn_has_complex_operands (insn)
+ const TInsn *insn;
+{
+ int i;
+ int n = insn->ntok;
+ assert (insn->insn_type == ITYPE_INSN);
+ for (i = 0; i < n; ++i)
+ {
+ switch (insn->tok[i].X_op)
+ {
+ case O_register:
+ case O_constant:
+ case O_symbol:
+ break;
+ default:
+ return TRUE;
+ }
+ }
+ return FALSE;
+}
+
+
+/* Convert the constant operands in the t_insn to insnbuf.
+ Return true if there is a symbol in the immediate field.
+
+ Before this is called,
+ 1) the number of operands are correct
+ 2) the t_insn is a ITYPE_INSN
+ 3) ONLY the relaxable_ is built
+ 4) All operands are O_constant, O_symbol. All constants fit
+ The return value tells whether there are any remaining O_symbols. */
+
+static bfd_boolean
+tinsn_to_insnbuf (t_insn, insnbuf)
+ TInsn *t_insn;
+ xtensa_insnbuf insnbuf;
+{
+ xtensa_isa isa = xtensa_default_isa;
+ xtensa_opcode opcode = t_insn->opcode;
+ bfd_boolean has_fixup = FALSE;
+ int noperands = xtensa_num_operands (isa, opcode);
+ int i;
+ uint32 opnd_value;
+ char *file_name;
+ int line;
+
+ assert (t_insn->insn_type == ITYPE_INSN);
+ if (noperands != t_insn->ntok)
+ as_fatal (_("operand number mismatch"));
+
+ xtensa_encode_insn (isa, opcode, insnbuf);
+
+ for (i = 0; i < noperands; ++i)
+ {
+ expressionS *expr = &t_insn->tok[i];
+ xtensa_operand operand = xtensa_get_operand (isa, opcode, i);
+ switch (expr->X_op)
+ {
+ case O_register:
+ /* The register number has already been checked in
+ expression_maybe_register, so we don't need to check here. */
+ opnd_value = expr->X_add_number;
+ (void) xtensa_operand_encode (operand, &opnd_value);
+ xtensa_operand_set_field (operand, insnbuf, opnd_value);
+ break;
+
+ case O_constant:
+ as_where (&file_name, &line);
+ /* It is a constant and we called this function,
+ then we have to try to fit it. */
+ xtensa_insnbuf_set_operand (insnbuf, opcode, operand,
+ expr->X_add_number, file_name, line);
+ break;
+
+ case O_symbol:
+ default:
+ has_fixup = TRUE;
+ break;
+ }
+ }
+ return has_fixup;
+}
+
+
+/* Check the instruction arguments. Return true on failure. */
+
+bfd_boolean
+tinsn_check_arguments (insn)
+ const TInsn *insn;
+{
+ xtensa_isa isa = xtensa_default_isa;
+ xtensa_opcode opcode = insn->opcode;
+
+ if (opcode == XTENSA_UNDEFINED)
+ {
+ as_bad (_("invalid opcode"));
+ return TRUE;
+ }
+
+ if (xtensa_num_operands (isa, opcode) > insn->ntok)
+ {
+ as_bad (_("too few operands"));
+ return TRUE;
+ }
+
+ if (xtensa_num_operands (isa, opcode) < insn->ntok)
+ {
+ as_bad (_("too many operands"));
+ return TRUE;
+ }
+ return FALSE;
+}
+
+
+/* Load an instruction from its encoded form. */
+
+static void
+tinsn_from_chars (t_insn, f)
+ TInsn *t_insn;
+ char *f;
+{
+ static xtensa_insnbuf insnbuf = NULL;
+ int i;
+ xtensa_opcode opcode;
+ xtensa_isa isa = xtensa_default_isa;
+
+ if (!insnbuf)
+ insnbuf = xtensa_insnbuf_alloc (isa);
+
+ xtensa_insnbuf_from_chars (isa, insnbuf, f);
+ opcode = xtensa_decode_insn (isa, insnbuf);
+
+ /* Find the immed. */
+ tinsn_init (t_insn);
+ t_insn->insn_type = ITYPE_INSN;
+ t_insn->is_specific_opcode = FALSE; /* Must not be specific. */
+ t_insn->opcode = opcode;
+ t_insn->ntok = xtensa_num_operands (isa, opcode);
+ for (i = 0; i < t_insn->ntok; i++)
+ {
+ set_expr_const (&t_insn->tok[i],
+ xtensa_insnbuf_get_operand (insnbuf, opcode, i));
+ }
+}
+
+
+/* Read the value of the relaxable immed from the fr_symbol and fr_offset. */
+
+static void
+tinsn_immed_from_frag (t_insn, fragP)
+ TInsn *t_insn;
+ fragS *fragP;
+{
+ xtensa_opcode opcode = t_insn->opcode;
+ int opnum;
+
+ if (fragP->fr_symbol)
+ {
+ opnum = get_relaxable_immed (opcode);
+ set_expr_symbol_offset (&t_insn->tok[opnum],
+ fragP->fr_symbol, fragP->fr_offset);
+ }
+}
+
+
+static int
+get_num_stack_text_bytes (istack)
+ IStack *istack;
+{
+ int i;
+ int text_bytes = 0;
+
+ for (i = 0; i < istack->ninsn; i++)
+ {
+ TInsn *t_insn = &istack->insn[i];
+ if (t_insn->insn_type == ITYPE_INSN)
+ text_bytes += xg_get_insn_size (t_insn);
+ }
+ return text_bytes;
+}
+
+
+static int
+get_num_stack_literal_bytes (istack)
+ IStack *istack;
+{
+ int i;
+ int lit_bytes = 0;
+
+ for (i = 0; i < istack->ninsn; i++)
+ {
+ TInsn *t_insn = &istack->insn[i];
+
+ if (t_insn->insn_type == ITYPE_LITERAL && t_insn->ntok == 1)
+ lit_bytes += 4;
+ }
+ return lit_bytes;
+}
+
+
+/* Expression utilities. */
+
+/* Return true if the expression is an integer constant. */
+
+bfd_boolean
+expr_is_const (s)
+ const expressionS *s;
+{
+ return (s->X_op == O_constant);
+}
+
+
+/* Get the expression constant.
+ Calling this is illegal if expr_is_const () returns true. */
+
+offsetT
+get_expr_const (s)
+ const expressionS *s;
+{
+ assert (expr_is_const (s));
+ return s->X_add_number;
+}
+
+
+/* Set the expression to a constant value. */
+
+void
+set_expr_const (s, val)
+ expressionS *s;
+ offsetT val;
+{
+ s->X_op = O_constant;
+ s->X_add_number = val;
+ s->X_add_symbol = NULL;
+ s->X_op_symbol = NULL;
+}
+
+
+/* Set the expression to a symbol + constant offset. */
+
+void
+set_expr_symbol_offset (s, sym, offset)
+ expressionS *s;
+ symbolS *sym;
+ offsetT offset;
+{
+ s->X_op = O_symbol;
+ s->X_add_symbol = sym;
+ s->X_op_symbol = NULL; /* unused */
+ s->X_add_number = offset;
+}
+
+
+bfd_boolean
+expr_is_equal (s1, s2)
+ expressionS *s1;
+ expressionS *s2;
+{
+ if (s1->X_op != s2->X_op)
+ return FALSE;
+ if (s1->X_add_symbol != s2->X_add_symbol)
+ return FALSE;
+ if (s1->X_op_symbol != s2->X_op_symbol)
+ return FALSE;
+ if (s1->X_add_number != s2->X_add_number)
+ return FALSE;
+ return TRUE;
+}
+
+
+static void
+copy_expr (dst, src)
+ expressionS *dst;
+ const expressionS *src;
+{
+ memcpy (dst, src, sizeof (expressionS));
+}
+
+
+/* Support for Tensilica's "--rename-section" option. */
+
+#ifdef XTENSA_SECTION_RENAME
+
+struct rename_section_struct
+{
+ char *old_name;
+ char *new_name;
+ struct rename_section_struct *next;
+};
+
+static struct rename_section_struct *section_rename;
+
+
+/* Parse the string oldname=new_name:oldname2=new_name2
+ and call add_section_rename. */
+
+void
+build_section_rename (arg)
+ const char *arg;
+{
+ char *this_arg = NULL;
+ char *next_arg = NULL;
+
+ for (this_arg = strdup (arg); this_arg != NULL; this_arg = next_arg)
+ {
+ if (this_arg)
+ {
+ next_arg = strchr (this_arg, ':');
+ if (next_arg)
+ {
+ *next_arg = '\0';
+ next_arg++;
+ }
+ }
+ {
+ char *old_name = this_arg;
+ char *new_name = strchr (this_arg, '=');
+
+ if (*old_name == '\0')
+ {
+ as_warn (_("ignoring extra '-rename-section' delimiter ':'"));
+ continue;
+ }
+ if (!new_name || new_name[1] == '\0')
+ {
+ as_warn (_("ignoring invalid '-rename-section' "
+ "specification: '%s'"), old_name);
+ continue;
+ }
+ *new_name = '\0';
+ new_name++;
+ add_section_rename (old_name, new_name);
+ }
+ }
+}
+
+
+static void
+add_section_rename (old_name, new_name)
+ char *old_name;
+ char *new_name;
+{
+ struct rename_section_struct *r = section_rename;
+
+ /* Check for invalid section renaming. */
+ for (r = section_rename; r != NULL; r = r->next)
+ {
+ if (strcmp (r->old_name, old_name) == 0)
+ as_bad (_("section %s renamed multiple times"), old_name);
+ if (strcmp (r->new_name, new_name) == 0)
+ as_bad (_("multiple sections remapped to output section %s"),
+ new_name);
+ }
+
+ /* Now add it. */
+ r = (struct rename_section_struct *)
+ xmalloc (sizeof (struct rename_section_struct));
+ r->old_name = strdup (old_name);
+ r->new_name = strdup (new_name);
+ r->next = section_rename;
+ section_rename = r;
+}
+
+
+const char *
+xtensa_section_rename (name)
+ const char *name;
+{
+ struct rename_section_struct *r = section_rename;
+
+ for (r = section_rename; r != NULL; r = r->next)
+ if (strcmp (r->old_name, name) == 0)
+ return r->new_name;
+
+ return name;
+}
+
+#endif /* XTENSA_SECTION_RENAME */
+
+
+/* Combining identical literals. */
+
+#ifdef XTENSA_COMBINE_LITERALS
+
+/* This code records all the .literal values that are ever seen and
+ detects duplicates so that identical values can be combined. This
+ is currently disabled because it's only half-baked. */
+
+#define XTENSA_LIT_PLUS_OFFSET ".xtensa_litsym_offset_"
+
+/* TODO: make this into a more efficient data structure. */
+typedef struct literal_list_elem
+{
+ symbolS *sym; /* The symbol that points to this literal. */
+ expressionS expr; /* The expression. */
+ segT seg;
+ struct literal_list_elem *next; /* Next in the list. */
+} literal_list_elem;
+
+literal_list_elem *lit_cache = NULL;
+
+typedef struct lit_sym_translation
+{
+ char *name; /* This name. */
+ offsetT offset; /* Plus this offset. */
+ symbolS *sym; /* Should really mean this symbol. */
+ struct lit_sym_translation *next;
+} lit_sym_translation;
+
+lit_sym_translation *translations = NULL;
+
+static bfd_boolean is_duplicate_expression
+ PARAMS ((expressionS *, expressionS *));
+static void cache_literal
+ PARAMS ((char *sym_name, expressionS *, segT));
+static symbolS *is_duplicate_literal
+ PARAMS ((expressionS *, segT));
+
+
+static bfd_boolean
+is_duplicate_expression (e1, e2)
+ expressionS *e1;
+ expressionS *e2;
+{
+ if (e1->X_op != e2->X_op)
+ return FALSE;
+ if (e1->X_add_symbol != e2->X_add_symbol)
+ return FALSE;
+ if (e1->X_op_symbol != e2->X_op_symbol)
+ return FALSE;
+ if (e1->X_add_number != e2->X_add_number)
+ return FALSE;
+ if (e1->X_unsigned != e2->X_unsigned)
+ return FALSE;
+ if (e1->X_md != e2->X_md)
+ return FALSE;
+ return TRUE;
+}
+
+
+static void
+cache_literal (sym_name, expP, seg)
+ char *sym_name;
+ expressionS *expP;
+ segT seg;
+{
+ literal_list_elem *lit = xmalloc (sizeof (literal_list_elem));
+
+ lit->sym = symbol_find (sym_name);
+ lit->expr = *expP;
+ lit->seg = seg;
+ lit->next = lit_cache;
+ lit_cache = lit;
+}
+
+
+static symbolS *
+is_duplicate_literal (expr, seg)
+ expressionS *expr;
+ segT seg;
+{
+ literal_list_elem *lit = lit_cache;
+
+ while (lit != NULL)
+ {
+ if (is_duplicate_expression (&lit->expr, expr) && seg == lit->seg)
+ return lit->sym;
+ lit = lit->next;
+ }
+
+ return NULL;
+}
+
+
+static void
+add_lit_sym_translation (name, offset, target)
+ char * name;
+ offsetT offset;
+ symbolS * target;
+{
+ lit_sym_translation *lit_trans = xmalloc (sizeof (lit_sym_translation));
+
+ lit_trans->name = name;
+ lit_trans->offset = offset;
+ lit_trans->sym = target;
+ lit_trans->next = translations;
+ translations = lit_trans;
+}
+
+
+static void
+find_lit_sym_translation (expr)
+ expressionS *expr;
+{
+ lit_sym_translation *lit_trans = translations;
+
+ if (expr->X_op != O_symbol)
+ return;
+
+ while (lit_trans != NULL)
+ {
+ if (lit_trans->offset == expr->X_add_number
+ && strcmp (lit_trans->name, S_GET_NAME (expr->X_add_symbol)) == 0)
+ {
+ expr->X_add_symbol = lit_trans->sym;
+ expr->X_add_number = 0;
+ return;
+ }
+ lit_trans = lit_trans->next;
+ }
+}
+
+#endif /* XTENSA_COMBINE_LITERALS */
diff --git a/gas/config/tc-xtensa.h b/gas/config/tc-xtensa.h
new file mode 100644
index 0000000000..c6bc09dc23
--- /dev/null
+++ b/gas/config/tc-xtensa.h
@@ -0,0 +1,200 @@
+/* tc-xtensa.h -- Header file for tc-xtensa.c.
+ Copyright (C) 2003 Free Software Foundation, Inc.
+
+ This file is part of GAS, the GNU Assembler.
+
+ GAS is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2, or (at your option)
+ any later version.
+
+ GAS is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GAS; see the file COPYING. If not, write to the Free
+ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
+ 02111-1307, USA. */
+
+#ifndef TC_XTENSA
+#define TC_XTENSA 1
+
+#ifdef ANSI_PROTOTYPES
+struct fix;
+#endif
+
+#ifndef BFD_ASSEMBLER
+#error Xtensa support requires BFD_ASSEMBLER
+#endif
+
+#ifndef OBJ_ELF
+#error Xtensa support requires ELF object format
+#endif
+
+#include "xtensa-config.h"
+
+#define TARGET_BYTES_BIG_ENDIAN XCHAL_HAVE_BE
+
+
+struct xtensa_frag_type
+{
+ unsigned is_literal:1;
+ unsigned is_text:1;
+ unsigned is_loop_target:1;
+ unsigned is_branch_target:1;
+ unsigned is_insn:1;
+
+ /* Info about the current state of assembly, i.e., density, relax,
+ generics, freeregs, longcalls. These need to be passed to the
+ backend and then to the linking file. */
+
+ unsigned is_no_density:1;
+ unsigned is_relax:1;
+ unsigned is_generics:1;
+ unsigned is_longcalls:1;
+
+ /* For text fragments that can generate literals at relax time, this
+ variable points to the frag where the literal will be stored. For
+ literal frags, this variable points to the nearest literal pool
+ location frag. This literal frag will be moved to after this
+ location. */
+
+ fragS *literal_frag;
+
+ /* The destination segment for literal frags. (Note that this is only
+ valid after xtensa_move_literals. */
+
+ segT lit_seg;
+
+ /* For the relaxation scheme, some literal fragments can have their
+ expansions modified by an instruction that relaxes. */
+
+ unsigned text_expansion;
+ unsigned literal_expansion;
+ unsigned unreported_expansion;
+};
+
+typedef struct xtensa_block_info_struct
+{
+ segT sec;
+ bfd_vma offset;
+ size_t size;
+ struct xtensa_block_info_struct *next;
+} xtensa_block_info;
+
+typedef enum
+{
+ xt_insn_sec,
+ xt_literal_sec,
+ max_xt_sec
+} xt_section_type;
+
+typedef struct xtensa_segment_info_struct
+{
+ fragS *literal_pool_loc;
+ xtensa_block_info *blocks[max_xt_sec];
+} xtensa_segment_info;
+
+typedef struct xtensa_symfield_type_struct
+{
+ unsigned int plt : 1;
+} xtensa_symfield_type;
+
+
+/* Section renaming is only supported in Tensilica's version of GAS. */
+#define XTENSA_SECTION_RENAME 1
+#ifdef XTENSA_SECTION_RENAME
+extern const char *xtensa_section_rename
+ PARAMS ((const char *));
+#else
+/* Tensilica's section renaming feature is not included here. */
+#define xtensa_section_rename(name) (name)
+#endif /* XTENSA_SECTION_RENAME */
+
+
+extern const char *xtensa_target_format
+ PARAMS ((void));
+extern void xtensa_frag_init
+ PARAMS ((fragS *));
+extern void xtensa_cons_fix_new
+ PARAMS ((fragS *, int, int, expressionS *));
+extern void xtensa_frob_label
+ PARAMS ((struct symbol *));
+extern void xtensa_end
+ PARAMS ((void));
+extern void xtensa_post_relax_hook
+ PARAMS ((void));
+extern void xtensa_file_arch_init
+ PARAMS ((bfd *));
+extern void xtensa_flush_pending_output
+ PARAMS ((void));
+extern bfd_boolean xtensa_fix_adjustable
+ PARAMS ((struct fix *));
+extern void xtensa_symbol_new_hook
+ PARAMS ((symbolS *));
+extern long xtensa_relax_frag
+ PARAMS ((fragS *, long, int *));
+
+#define TARGET_FORMAT xtensa_target_format ()
+#define TARGET_ARCH bfd_arch_xtensa
+#define TC_SEGMENT_INFO_TYPE xtensa_segment_info
+#define TC_SYMFIELD_TYPE xtensa_symfield_type
+#define TC_FRAG_TYPE struct xtensa_frag_type
+#define TC_FRAG_INIT(frag) xtensa_frag_init (frag)
+#define TC_CONS_FIX_NEW xtensa_cons_fix_new
+#define tc_canonicalize_symbol_name(s) xtensa_section_rename (s)
+#define tc_init_after_args() xtensa_file_arch_init (stdoutput)
+#define tc_fix_adjustable(fix) xtensa_fix_adjustable (fix)
+#define tc_frob_label(sym) xtensa_frob_label (sym)
+#define tc_symbol_new_hook(s) xtensa_symbol_new_hook (s)
+#define md_elf_section_rename(name) xtensa_section_rename (name)
+#define md_end xtensa_end
+#define md_flush_pending_output() xtensa_flush_pending_output ()
+#define md_operand(x)
+#define TEXT_SECTION_NAME xtensa_section_rename (".text")
+#define DATA_SECTION_NAME xtensa_section_rename (".data")
+#define BSS_SECTION_NAME xtensa_section_rename (".bss")
+
+
+/* The renumber_section function must be mapped over all the sections
+ after calling xtensa_post_relax_hook. That function is static in
+ write.c so it cannot be called from xtensa_post_relax_hook itself. */
+
+#define md_post_relax_hook \
+ do \
+ { \
+ int i = 0; \
+ xtensa_post_relax_hook (); \
+ bfd_map_over_sections (stdoutput, renumber_sections, &i); \
+ } \
+ while (0)
+
+
+/* Because xtensa relaxation can insert a new literal into the middle of
+ fragment and thus require re-running the relaxation pass on the
+ section, we need an explicit flag here. We explicitly use the name
+ "stretched" here to avoid changing the source code in write.c. */
+
+#define md_relax_frag(segment, fragP, stretch) \
+ xtensa_relax_frag (fragP, stretch, &stretched)
+
+
+#define LOCAL_LABELS_FB 1
+#define WORKING_DOT_WORD 1
+#define DOUBLESLASH_LINE_COMMENTS
+#define TC_HANDLES_FX_DONE
+#define TC_FINALIZE_SYMS_BEFORE_SIZE_SEG 0
+
+#define MD_APPLY_SYM_VALUE(FIX) 0
+
+/* The default literal sections should always be marked as "code" (i.e.,
+ SHF_EXECINSTR). This is particularly important for the Linux kernel
+ module loader so that the literals are not placed after the text. */
+#define ELF_TC_SPECIAL_SECTIONS \
+ { ".literal", SHT_PROGBITS, SHF_ALLOC + SHF_EXECINSTR }, \
+ { ".init.literal", SHT_PROGBITS, SHF_ALLOC + SHF_EXECINSTR }, \
+ { ".fini.literal", SHT_PROGBITS, SHF_ALLOC + SHF_EXECINSTR },
+
+#endif /* TC_XTENSA */
diff --git a/gas/config/xtensa-relax.c b/gas/config/xtensa-relax.c
new file mode 100644
index 0000000000..47aa03c60a
--- /dev/null
+++ b/gas/config/xtensa-relax.c
@@ -0,0 +1,1766 @@
+/* Table of relaxations for Xtensa assembly.
+ Copyright 2003 Free Software Foundation, Inc.
+
+ This file is part of GAS, the GNU Assembler.
+
+ GAS is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2, or (at your option)
+ any later version.
+
+ GAS is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GAS; see the file COPYING. If not, write to
+ the Free Software Foundation, 59 Temple Place - Suite 330, Boston,
+ MA 02111-1307, USA. */
+
+/* This file contains the code for generating runtime data structures
+ for relaxation pattern matching from statically specified strings.
+ Each action contains an instruction pattern to match and
+ preconditions for the match as well as an expansion if the pattern
+ matches. The preconditions can specify that two operands are the
+ same or an operand is a specific constant. The expansion uses the
+ bound variables from the pattern to specify that specific operands
+ from the pattern should be used in the result.
+
+ The patterns match a language like:
+
+ INSN_PATTERN ::= INSN_TEMPL ( '|' PRECOND )*
+ INSN_TEMPL ::= OPCODE ' ' [ OPERAND (',' OPERAND)* ]
+ OPCODE ::= id
+ OPERAND ::= CONSTANT | VARIABLE | SPECIALFN '(' VARIABLE ')'
+ SPECIALFN ::= 'HI24S' | 'F32MINUS' | 'LOW8'
+ VARIABLE ::= '%' id
+ PRECOND ::= OPERAND CMPOP OPERAND
+ CMPOP ::= '==' | '!='
+
+ The replacement language
+ INSN_REPL ::= INSN_LABEL_LIT ( ';' INSN_LABEL_LIT )*
+ INSN_LABEL_LIT ::= INSN_TEMPL
+ | 'LABEL' num
+ | 'LITERAL' num ' ' VARIABLE
+
+ The operands in a PRECOND must be constants or variables bound by
+ the INSN_PATTERN.
+
+ The operands in the INSN_REPL must be constants, variables bound in
+ the associated INSN_PATTERN, special variables that are bound in
+ the INSN_REPL by LABEL or LITERAL definitions, or special value
+ manipulation functions.
+
+ A simple example of a replacement pattern:
+ {"movi.n %as,%imm", "movi %as,%imm"} would convert the narrow
+ movi.n instruction to the wide movi instruction.
+
+ A more complex example of a branch around:
+ {"beqz %as,%label", "bnez %as,%LABEL0;j %label;LABEL0"}
+ would convert a branch to a negated branch to the following instruction
+ with a jump to the original label.
+
+ An Xtensa-specific example that generates a literal:
+ {"movi %at,%imm", "LITERAL0 %imm; l32r %at,%LITERAL0"}
+ will convert a movi instruction to an l32r of a literal
+ literal defined in the literal pool.
+
+ Even more complex is a conversion of a load with immediate offset
+ to a load of a freshly generated literal, an explicit add and
+ a load with 0 offset. This transformation is only valid, though
+ when the first and second operands are not the same as specified
+ by the "| %at!=%as" precondition clause.
+ {"l32i %at,%as,%imm | %at!=%as",
+ "LITERAL0 %imm; l32r %at,%LITERAL0; add %at,%at,%as; l32i %at,%at,0"}
+
+ There is special case for loop instructions here, but because we do
+ not currently have the ability to represent the difference of two
+ symbols, the conversion requires special code in the assembler to
+ write the operands of the addi/addmi pair representing the
+ difference of the old and new loop end label. */
+
+#include "as.h"
+#include "xtensa-isa.h"
+#include "xtensa-relax.h"
+#include <stddef.h>
+
+/* Imported from bfd. */
+extern xtensa_isa xtensa_default_isa;
+
+
+/* The opname_list is a small list of names that we use for opcode and
+ operand variable names to simplify ownership of these commonly used
+ strings. Strings entered in the table can be compared by pointer
+ equality. */
+
+typedef struct opname_list_struct opname_list;
+typedef opname_list opname_e;
+
+struct opname_list_struct
+{
+ char *opname;
+ opname_list *next;
+};
+
+static opname_list *local_opnames = NULL;
+
+
+/* The "opname_map" and its element structure "opname_map_e" are used
+ for binding an operand number to a name or a constant. */
+
+typedef struct opname_map_e_struct opname_map_e;
+typedef struct opname_map_struct opname_map;
+
+struct opname_map_e_struct
+{
+ const char *operand_name; /* If null, then use constant_value. */
+ size_t operand_num;
+ unsigned constant_value;
+ opname_map_e *next;
+};
+
+struct opname_map_struct
+{
+ opname_map_e *head;
+ opname_map_e **tail;
+};
+
+/* The "precond_list" and its element structure "precond_e" represents
+ explicit preconditions comparing operand variables and constants.
+ In the "precond_e" structure, a variable is identified by the name
+ in the "opname" field. If that field is NULL, then the operand
+ is the constant in field "opval". */
+
+typedef struct precond_e_struct precond_e;
+typedef struct precond_list_struct precond_list;
+
+struct precond_e_struct
+{
+ const char *opname1;
+ unsigned opval1;
+ CmpOp cmpop;
+ const char *opname2;
+ unsigned opval2;
+ precond_e *next;
+};
+
+struct precond_list_struct
+{
+ precond_e *head;
+ precond_e **tail;
+};
+
+
+/* The insn_templ represents the INSN_TEMPL instruction template. It
+ is an opcode name with a list of operands. These are used for
+ instruction patterns and replacement patterns. */
+
+typedef struct insn_templ_struct insn_templ;
+struct insn_templ_struct
+{
+ const char *opcode_name;
+ opname_map operand_map;
+};
+
+
+/* The insn_pattern represents an INSN_PATTERN instruction pattern.
+ It is an instruction template with preconditions that specify when
+ it actually matches a given instruction. */
+
+typedef struct insn_pattern_struct insn_pattern;
+struct insn_pattern_struct
+{
+ insn_templ t;
+ precond_list preconds;
+};
+
+
+/* The "insn_repl" and associated element structure "insn_repl_e"
+ instruction replacement list is a list of
+ instructions/LITERALS/LABELS with constant operands or operands
+ with names bound to the operand names in the associated pattern. */
+
+typedef struct insn_repl_e_struct insn_repl_e;
+struct insn_repl_e_struct
+{
+ insn_templ t;
+ insn_repl_e *next;
+};
+
+typedef struct insn_repl_struct insn_repl;
+struct insn_repl_struct
+{
+ insn_repl_e *head;
+ insn_repl_e **tail;
+};
+
+
+/* The split_rec is a vector of allocated char * pointers. */
+
+typedef struct split_rec_struct split_rec;
+struct split_rec_struct
+{
+ char **vec;
+ size_t count;
+};
+
+/* The "string_pattern_pair" is a set of pairs containing instruction
+ patterns and replacement strings. */
+
+typedef struct string_pattern_pair_struct string_pattern_pair;
+struct string_pattern_pair_struct
+{
+ const char *pattern;
+ const char *replacement;
+};
+
+
+/* The widen_spec_list is a list of valid substitutions that generate
+ wider representations. These are generally used to specify
+ replacements for instructions whose immediates do not fit their
+ encodings. A valid transition may require mutiple steps of
+ one-to-one instruction replacements with a final multiple
+ instruction replacement. As an example, here are the transitions
+ required to replace an 'addi.n' with an 'addi', 'addmi'.
+
+ addi.n a4, 0x1010
+ => addi a4, 0x1010
+ => addmi a4, 0x1010
+ => addmi a4, 0x1000, addi a4, 0x10. */
+
+static string_pattern_pair widen_spec_list[] =
+{
+ {"add.n %ar,%as,%at", "add %ar,%as,%at"},
+ {"addi.n %ar,%as,%imm", "addi %ar,%as,%imm"},
+ {"beqz.n %as,%label", "beqz %as,%label"},
+ {"bnez.n %as,%label", "bnez %as,%label"},
+ {"l32i.n %at,%as,%imm", "l32i %at,%as,%imm"},
+ {"mov.n %at,%as", "or %at,%as,%as"},
+ {"movi.n %as,%imm", "movi %as,%imm"},
+ {"nop.n", "or 1,1,1"},
+ {"ret.n", "ret"},
+ {"retw.n", "retw"},
+ {"s32i.n %at,%as,%imm", "s32i %at,%as,%imm"},
+ {"srli %at,%as,%imm", "extui %at,%as,%imm,F32MINUS(%imm)"},
+ {"slli %ar,%as,0", "or %ar,%as,%as"},
+ /* Widening with literals */
+ {"movi %at,%imm", "LITERAL0 %imm; l32r %at,%LITERAL0"},
+ {"addi %ar,%as,%imm", "addmi %ar,%as,%imm"},
+ /* LOW8 is the low 8 bits of the Immed
+ MID8S is the middle 8 bits of the Immed */
+ {"addmi %ar,%as,%imm", "addmi %ar,%as,HI24S(%imm); addi %ar,%ar,LOW8(%imm)"},
+ {"addmi %ar,%as,%imm | %ar!=%as",
+ "LITERAL0 %imm; l32r %ar,%LITERAL0; add %ar,%as,%ar"},
+
+ /* Widening the load instructions with too-large immediates */
+ {"l8ui %at,%as,%imm | %at!=%as",
+ "LITERAL0 %imm; l32r %at,%LITERAL0; add %at,%at,%as; l8ui %at,%at,0"},
+ {"l16si %at,%as,%imm | %at!=%as",
+ "LITERAL0 %imm; l32r %at,%LITERAL0; add %at,%at,%as; l16si %at,%at,0"},
+ {"l16ui %at,%as,%imm | %at!=%as",
+ "LITERAL0 %imm; l32r %at,%LITERAL0; add %at,%at,%as; l16ui %at,%at,0"},
+#if 0 /* Xtensa Synchronization Option not yet available */
+ {"l32ai %at,%as,%imm",
+ "LITERAL0 %imm; l32r %at,%LITERAL0; add.n %at,%at,%as; l32ai %at,%at,0"},
+#endif
+#if 0 /* Xtensa Speculation Option not yet available */
+ {"l32is %at,%as,%imm",
+ "LITERAL0 %imm; l32r %at,%LITERAL0; add.n %at,%at,%as; l32is %at,%at,0"},
+#endif
+ {"l32i %at,%as,%imm | %at!=%as",
+ "LITERAL0 %imm; l32r %at,%LITERAL0; add %at,%at,%as; l32i %at,%at,0"},
+
+ /* This is only PART of the loop instruction. In addition, hard
+ coded into it's use is a modification of the final operand in the
+ instruction in bytes 9 and 12. */
+ {"loop %as,%label",
+ "loop %as,%LABEL0;"
+ "rsr %as, 1;" /* LEND */
+ "wsr %as, 0;" /* LBEG */
+ "addi %as, %as, 0;" /* lo8(%label-%LABEL1) */
+ "addmi %as, %as, 0;" /* mid8(%label-%LABEL1) */
+ "wsr %as, 1;"
+ "isync;"
+ "rsr %as, 2;" /* LCOUNT */
+ "addi %as, %as, 1;" /* density -> addi.n %as, %as, 1 */
+ "LABEL0"},
+ {"loopgtz %as,%label",
+ "beqz %as,%label;"
+ "bltz %as,%label;"
+ "loopgtz %as,%LABEL0;"
+ "rsr %as, 1;" /* LEND */
+ "wsr %as, 0;" /* LBEG */
+ "addi %as, %as, 0;" /* lo8(%label-%LABEL1) */
+ "addmi %as, %as, 0;" /* mid8(%label-%LABEL1) */
+ "wsr %as, 1;"
+ "isync;"
+ "rsr %as, 2;" /* LCOUNT */
+ "addi %as, %as, 1;" /* density -> addi.n %as, %as, 1 */
+ "LABEL0"},
+ {"loopnez %as,%label",
+ "beqz %as,%label;"
+ "loopnez %as,%LABEL0;"
+ "rsr %as, 1;" /* LEND */
+ "wsr %as, 0;" /* LBEG */
+ "addi %as, %as, 0;" /* lo8(%label-%LABEL1) */
+ "addmi %as, %as, 0;" /* mid8(%label-%LABEL1) */
+ "wsr %as, 1;"
+ "isync;"
+ "rsr %as, 2;" /* LCOUNT */
+ "addi %as, %as, 1;" /* density -> addi.n %as, %as, 1 */
+ "LABEL0"},
+
+#if 0 /* no mechanism here to determine if Density Option is available */
+ {"beqz %as,%label", "bnez.n %as,%LABEL0;j %label;LABEL0"},
+ {"bnez %as,%label", "beqz.n %as,%LABEL0;j %label;LABEL0"},
+#else
+ {"beqz %as,%label", "bnez %as,%LABEL0;j %label;LABEL0"},
+ {"bnez %as,%label", "beqz %as,%LABEL0;j %label;LABEL0"},
+#endif
+
+ {"bgez %as,%label", "bltz %as,%LABEL0;j %label;LABEL0"},
+ {"bltz %as,%label", "bgez %as,%LABEL0;j %label;LABEL0"},
+ {"beqi %as,%imm,%label", "bnei %as,%imm,%LABEL0;j %label;LABEL0"},
+ {"bnei %as,%imm,%label", "beqi %as,%imm,%LABEL0;j %label;LABEL0"},
+ {"bgei %as,%imm,%label", "blti %as,%imm,%LABEL0;j %label;LABEL0"},
+ {"blti %as,%imm,%label", "bgei %as,%imm,%LABEL0;j %label;LABEL0"},
+ {"bgeui %as,%imm,%label", "bltui %as,%imm,%LABEL0;j %label;LABEL0"},
+ {"bltui %as,%imm,%label", "bgeui %as,%imm,%LABEL0;j %label;LABEL0"},
+ {"bbci %as,%imm,%label", "bbsi %as,%imm,%LABEL0;j %label;LABEL0"},
+ {"bbsi %as,%imm,%label", "bbci %as,%imm,%LABEL0;j %label;LABEL0"},
+ {"beq %as,%at,%label", "bne %as,%at,%LABEL0;j %label;LABEL0"},
+ {"bne %as,%at,%label", "beq %as,%at,%LABEL0;j %label;LABEL0"},
+ {"bge %as,%at,%label", "blt %as,%at,%LABEL0;j %label;LABEL0"},
+ {"blt %as,%at,%label", "bge %as,%at,%LABEL0;j %label;LABEL0"},
+ {"bgeu %as,%at,%label", "bltu %as,%at,%LABEL0;j %label;LABEL0"},
+ {"bltu %as,%at,%label", "bgeu %as,%at,%LABEL0;j %label;LABEL0"},
+ {"bany %as,%at,%label", "bnone %as,%at,%LABEL0;j %label;LABEL0"},
+#if 1 /* provide relaxations for Boolean Option */
+ {"bt %bs,%label", "bf %bs,%LABEL0;j %label;LABEL0"},
+ {"bf %bs,%label", "bt %bs,%LABEL0;j %label;LABEL0"},
+#endif
+ {"bnone %as,%at,%label", "bany %as,%at,%LABEL0;j %label;LABEL0"},
+ {"ball %as,%at,%label", "bnall %as,%at,%LABEL0;j %label;LABEL0"},
+ {"bnall %as,%at,%label", "ball %as,%at,%LABEL0;j %label;LABEL0"},
+ {"bbc %as,%at,%label", "bbs %as,%at,%LABEL0;j %label;LABEL0"},
+ {"bbs %as,%at,%label", "bbc %as,%at,%LABEL0;j %label;LABEL0"},
+ {"call0 %label", "LITERAL0 %label; l32r a0,%LITERAL0; callx0 a0"},
+ {"call4 %label", "LITERAL0 %label; l32r a4,%LITERAL0; callx4 a4"},
+ {"call8 %label", "LITERAL0 %label; l32r a8,%LITERAL0; callx8 a8"},
+ {"call12 %label", "LITERAL0 %label; l32r a12,%LITERAL0; callx12 a12"}
+};
+
+#define WIDEN_COUNT (sizeof (widen_spec_list) / sizeof (string_pattern_pair))
+
+
+/* The simplify_spec_list specifies simplifying transformations that
+ will reduce the instruction width or otherwise simplify an
+ instruction. These are usually applied before relaxation in the
+ assembler. It is always legal to simplify. Even for "addi as, 0",
+ the "addi.n as, 0" will eventually be widened back to an "addi 0"
+ after the widening table is applied. Note: The usage of this table
+ has changed somewhat so that it is entirely specific to "narrowing"
+ instructions to use the density option. This table is not used at
+ all when the density option is not available. */
+
+string_pattern_pair simplify_spec_list[] =
+{
+ {"add %ar,%as,%at", "add.n %ar,%as,%at"},
+ {"addi.n %ar,%as,0", "mov.n %ar,%as"},
+ {"addi %ar,%as,0", "mov.n %ar,%as"},
+ {"addi %ar,%as,%imm", "addi.n %ar,%as,%imm"},
+ {"addmi %ar,%as,%imm", "addi.n %ar,%as,%imm"},
+ {"beqz %as,%label", "beqz.n %as,%label"},
+ {"bnez %as,%label", "bnez.n %as,%label"},
+ {"l32i %at,%as,%imm", "l32i.n %at,%as,%imm"},
+ {"movi %as,%imm", "movi.n %as,%imm"},
+ {"or %ar,%as,%at | %as==%at", "mov.n %ar,%as"},
+ {"ret", "ret.n"},
+ {"retw", "retw.n"},
+ {"s32i %at,%as,%imm", "s32i.n %at,%as,%imm"},
+ {"slli %ar,%as,0", "mov.n %ar,%as"}
+};
+
+#define SIMPLIFY_COUNT \
+ (sizeof (simplify_spec_list) / sizeof (string_pattern_pair))
+
+
+/* Transition generation helpers. */
+
+static void append_transition
+ PARAMS ((TransitionTable *, xtensa_opcode, TransitionRule *));
+static void append_condition
+ PARAMS ((TransitionRule *, Precondition *));
+static void append_value_condition
+ PARAMS ((TransitionRule *, CmpOp, unsigned, unsigned));
+static void append_constant_value_condition
+ PARAMS ((TransitionRule *, CmpOp, unsigned, unsigned));
+static void append_build_insn
+ PARAMS ((TransitionRule *, BuildInstr *));
+static void append_op
+ PARAMS ((BuildInstr *, BuildOp *));
+static void append_literal_op
+ PARAMS ((BuildInstr *, unsigned, unsigned));
+static void append_label_op
+ PARAMS ((BuildInstr *, unsigned, unsigned));
+static void append_constant_op
+ PARAMS ((BuildInstr *, unsigned, unsigned));
+static void append_field_op
+ PARAMS ((BuildInstr *, unsigned, unsigned));
+static void append_user_fn_field_op
+ PARAMS ((BuildInstr *, unsigned, OpType, unsigned));
+static long operand_function_HI24S
+ PARAMS ((long));
+static long operand_function_F32MINUS
+ PARAMS ((long));
+static long operand_function_LOW8
+ PARAMS ((long));
+
+/* Externally visible functions. */
+
+extern bfd_boolean xg_has_userdef_op_fn
+ PARAMS ((OpType));
+extern long xg_apply_userdef_op_fn
+ PARAMS ((OpType, long));
+
+/* Parsing helpers. */
+
+static const char *enter_opname_n
+ PARAMS ((const char *, size_t));
+static const char *enter_opname
+ PARAMS ((const char *));
+
+/* Construction and destruction. */
+
+static void init_opname_map
+ PARAMS ((opname_map *));
+static void clear_opname_map
+ PARAMS ((opname_map *));
+static void init_precond_list
+ PARAMS ((precond_list *));
+static void clear_precond_list
+ PARAMS ((precond_list *));
+static void init_insn_templ
+ PARAMS ((insn_templ *));
+static void clear_insn_templ
+ PARAMS ((insn_templ *));
+static void init_insn_pattern
+ PARAMS ((insn_pattern *));
+static void clear_insn_pattern
+ PARAMS ((insn_pattern *));
+static void init_insn_repl
+ PARAMS ((insn_repl *));
+static void clear_insn_repl
+ PARAMS ((insn_repl *));
+static void init_split_rec
+ PARAMS ((split_rec *));
+static void clear_split_rec
+ PARAMS ((split_rec *));
+
+/* Operand and insn_templ helpers. */
+
+static bfd_boolean same_operand_name
+ PARAMS ((const opname_map_e *, const opname_map_e *));
+static opname_map_e *get_opmatch
+ PARAMS ((opname_map *, const char *));
+static bfd_boolean op_is_constant
+ PARAMS ((const opname_map_e *));
+static unsigned op_get_constant
+ PARAMS ((const opname_map_e *));
+static size_t insn_templ_operand_count
+ PARAMS ((const insn_templ *));
+
+/* parsing helpers. */
+
+static const char *skip_white
+ PARAMS ((const char *));
+static void trim_whitespace
+ PARAMS ((char *));
+static void split_string
+ PARAMS ((split_rec *, const char *, char, bfd_boolean));
+
+/* Language parsing. */
+
+static bfd_boolean parse_insn_pattern
+ PARAMS ((const char *, insn_pattern *));
+static bfd_boolean parse_insn_repl
+ PARAMS ((const char *, insn_repl *));
+static bfd_boolean parse_insn_templ
+ PARAMS ((const char *, insn_templ *));
+static bfd_boolean parse_special_fn
+ PARAMS ((const char *, const char **, const char **));
+static bfd_boolean parse_precond
+ PARAMS ((const char *, precond_e *));
+static bfd_boolean parse_constant
+ PARAMS ((const char *, unsigned *));
+static bfd_boolean parse_id_constant
+ PARAMS ((const char *, const char *, unsigned *));
+
+/* Transition table building code. */
+
+static TransitionRule *build_transition
+ PARAMS ((insn_pattern *, insn_repl *, const char *, const char *));
+static TransitionTable *build_transition_table
+ PARAMS ((const string_pattern_pair *, size_t));
+
+
+void
+append_transition (tt, opcode, t)
+ TransitionTable *tt;
+ xtensa_opcode opcode;
+ TransitionRule *t;
+{
+ TransitionList *tl = (TransitionList *) xmalloc (sizeof (TransitionList));
+ TransitionList *prev;
+ TransitionList *nxt;
+ assert (tt != NULL);
+ assert (opcode < tt->num_opcodes);
+
+ prev = tt->table[opcode];
+ tl->rule = t;
+ tl->next = NULL;
+ if (prev == NULL)
+ {
+ tt->table[opcode] = tl;
+ return;
+ }
+ nxt = prev->next;
+ while (nxt != NULL)
+ {
+ prev = nxt;
+ nxt = nxt->next;
+ }
+ prev->next = tl;
+ return;
+}
+
+
+void
+append_condition (tr, cond)
+ TransitionRule *tr;
+ Precondition *cond;
+{
+ PreconditionList *pl =
+ (PreconditionList *) xmalloc (sizeof (PreconditionList));
+ PreconditionList *prev = tr->conditions;
+ PreconditionList *nxt;
+
+ pl->precond = cond;
+ pl->next = NULL;
+ if (prev == NULL)
+ {
+ tr->conditions = pl;
+ return;
+ }
+ nxt = prev->next;
+ while (nxt != NULL)
+ {
+ prev = nxt;
+ nxt = nxt->next;
+ }
+ prev->next = pl;
+}
+
+
+void
+append_value_condition (tr, cmp, op1, op2)
+ TransitionRule *tr;
+ CmpOp cmp;
+ unsigned op1;
+ unsigned op2;
+{
+ Precondition *cond = (Precondition *) xmalloc (sizeof (Precondition));
+
+ cond->cmp = cmp;
+ cond->op_num = op1;
+ cond->typ = OP_OPERAND;
+ cond->op_data = op2;
+ append_condition (tr, cond);
+}
+
+
+void
+append_constant_value_condition (tr, cmp, op1, cnst)
+ TransitionRule *tr;
+ CmpOp cmp;
+ unsigned op1;
+ unsigned cnst;
+{
+ Precondition *cond = (Precondition *) xmalloc (sizeof (Precondition));
+
+ cond->cmp = cmp;
+ cond->op_num = op1;
+ cond->typ = OP_CONSTANT;
+ cond->op_data = cnst;
+ append_condition (tr, cond);
+}
+
+
+void
+append_build_insn (tr, bi)
+ TransitionRule *tr;
+ BuildInstr *bi;
+{
+ BuildInstr *prev = tr->to_instr;
+ BuildInstr *nxt;
+
+ bi->next = NULL;
+ if (prev == NULL)
+ {
+ tr->to_instr = bi;
+ return;
+ }
+ nxt = prev->next;
+ while (nxt != 0)
+ {
+ prev = nxt;
+ nxt = prev->next;
+ }
+ prev->next = bi;
+}
+
+
+void
+append_op (bi, b_op)
+ BuildInstr *bi;
+ BuildOp *b_op;
+{
+ BuildOp *prev = bi->ops;
+ BuildOp *nxt;
+
+ if (prev == NULL)
+ {
+ bi->ops = b_op;
+ return;
+ }
+ nxt = prev->next;
+ while (nxt != NULL)
+ {
+ prev = nxt;
+ nxt = nxt->next;
+ }
+ prev->next = b_op;
+}
+
+
+void
+append_literal_op (bi, op1, litnum)
+ BuildInstr *bi;
+ unsigned op1;
+ unsigned litnum;
+{
+ BuildOp *b_op = (BuildOp *) xmalloc (sizeof (BuildOp));
+
+ b_op->op_num = op1;
+ b_op->typ = OP_LITERAL;
+ b_op->op_data = litnum;
+ b_op->next = NULL;
+ append_op (bi, b_op);
+}
+
+
+void
+append_label_op (bi, op1, labnum)
+ BuildInstr *bi;
+ unsigned op1;
+ unsigned labnum;
+{
+ BuildOp *b_op = (BuildOp *) xmalloc (sizeof (BuildOp));
+
+ b_op->op_num = op1;
+ b_op->typ = OP_LABEL;
+ b_op->op_data = labnum;
+ b_op->next = NULL;
+ append_op (bi, b_op);
+}
+
+
+void
+append_constant_op (bi, op1, cnst)
+ BuildInstr *bi;
+ unsigned op1;
+ unsigned cnst;
+{
+ BuildOp *b_op = (BuildOp *) xmalloc (sizeof (BuildOp));
+
+ b_op->op_num = op1;
+ b_op->typ = OP_CONSTANT;
+ b_op->op_data = cnst;
+ b_op->next = NULL;
+ append_op (bi, b_op);
+}
+
+
+void
+append_field_op (bi, op1, src_op)
+ BuildInstr *bi;
+ unsigned op1;
+ unsigned src_op;
+{
+ BuildOp *b_op = (BuildOp *) xmalloc (sizeof (BuildOp));
+
+ b_op->op_num = op1;
+ b_op->typ = OP_OPERAND;
+ b_op->op_data = src_op;
+ b_op->next = NULL;
+ append_op (bi, b_op);
+}
+
+
+/* These could be generated but are not currently. */
+
+void
+append_user_fn_field_op (bi, op1, typ, src_op)
+ BuildInstr *bi;
+ unsigned op1;
+ OpType typ;
+ unsigned src_op;
+{
+ BuildOp *b_op = (BuildOp *) xmalloc (sizeof (BuildOp));
+
+ b_op->op_num = op1;
+ b_op->typ = typ;
+ b_op->op_data = src_op;
+ b_op->next = NULL;
+ append_op (bi, b_op);
+}
+
+
+/* These operand functions are the semantics of user-defined
+ operand functions. */
+
+long
+operand_function_HI24S (a)
+ long a;
+{
+ if (a & 0x80)
+ return (a & (~0xff)) + 0x100;
+ else
+ return (a & (~0xff));
+}
+
+
+long
+operand_function_F32MINUS (a)
+ long a;
+{
+ return (32 - a);
+}
+
+
+long
+operand_function_LOW8 (a)
+ long a;
+{
+ if (a & 0x80)
+ return (a & 0xff) | ~0xff;
+ else
+ return (a & 0xff);
+}
+
+
+bfd_boolean
+xg_has_userdef_op_fn (op)
+ OpType op;
+{
+ switch (op)
+ {
+ case OP_OPERAND_F32MINUS:
+ case OP_OPERAND_LOW8:
+ case OP_OPERAND_HI24S:
+ return TRUE;
+ default:
+ break;
+ }
+ return FALSE;
+}
+
+
+long
+xg_apply_userdef_op_fn (op, a)
+ OpType op;
+ long a;
+{
+ switch (op)
+ {
+ case OP_OPERAND_F32MINUS:
+ return operand_function_F32MINUS (a);
+ case OP_OPERAND_LOW8:
+ return operand_function_LOW8 (a);
+ case OP_OPERAND_HI24S:
+ return operand_function_HI24S (a);
+ default:
+ break;
+ }
+ return FALSE;
+}
+
+
+/* Generate a transition table. */
+
+const char *
+enter_opname_n (name, len)
+ const char *name;
+ size_t len;
+{
+ opname_e *op;
+
+ for (op = local_opnames; op != NULL; op = op->next)
+ {
+ if (strlen (op->opname) == len && strncmp (op->opname, name, len) == 0)
+ return op->opname;
+ }
+ op = (opname_e *) xmalloc (sizeof (opname_e));
+ op->opname = (char *) xmalloc (len + 1);
+ strncpy (op->opname, name, len);
+ op->opname[len] = '\0';
+ return op->opname;
+}
+
+
+static const char *
+enter_opname (name)
+ const char *name;
+{
+ opname_e *op;
+
+ for (op = local_opnames; op != NULL; op = op->next)
+ {
+ if (strcmp (op->opname, name) == 0)
+ return op->opname;
+ }
+ op = (opname_e *) xmalloc (sizeof (opname_e));
+ op->opname = strdup (name);
+ return op->opname;
+}
+
+
+void
+init_opname_map (m)
+ opname_map *m;
+{
+ m->head = NULL;
+ m->tail = &m->head;
+}
+
+
+void
+clear_opname_map (m)
+ opname_map *m;
+{
+ opname_map_e *e;
+
+ while (m->head != NULL)
+ {
+ e = m->head;
+ m->head = e->next;
+ free (e);
+ }
+ m->tail = &m->head;
+}
+
+
+static bfd_boolean
+same_operand_name (m1, m2)
+ const opname_map_e *m1;
+ const opname_map_e *m2;
+{
+ if (m1->operand_name == NULL || m1->operand_name == NULL)
+ return FALSE;
+ return (m1->operand_name == m2->operand_name);
+}
+
+
+opname_map_e *
+get_opmatch (map, operand_name)
+ opname_map *map;
+ const char *operand_name;
+{
+ opname_map_e *m;
+
+ for (m = map->head; m != NULL; m = m->next)
+ {
+ if (strcmp (m->operand_name, operand_name) == 0)
+ return m;
+ }
+ return NULL;
+}
+
+
+bfd_boolean
+op_is_constant (m1)
+ const opname_map_e *m1;
+{
+ return (m1->operand_name == NULL);
+}
+
+
+static unsigned
+op_get_constant (m1)
+ const opname_map_e *m1;
+{
+ assert (m1->operand_name == NULL);
+ return m1->constant_value;
+}
+
+
+void
+init_precond_list (l)
+ precond_list *l;
+{
+ l->head = NULL;
+ l->tail = &l->head;
+}
+
+
+void
+clear_precond_list (l)
+ precond_list *l;
+{
+ precond_e *e;
+
+ while (l->head != NULL)
+ {
+ e = l->head;
+ l->head = e->next;
+ free (e);
+ }
+ l->tail = &l->head;
+}
+
+
+void
+init_insn_templ (t)
+ insn_templ *t;
+{
+ t->opcode_name = NULL;
+ init_opname_map (&t->operand_map);
+}
+
+
+void
+clear_insn_templ (t)
+ insn_templ *t;
+{
+ clear_opname_map (&t->operand_map);
+}
+
+
+void
+init_insn_pattern (p)
+ insn_pattern *p;
+{
+ init_insn_templ (&p->t);
+ init_precond_list (&p->preconds);
+}
+
+
+void
+clear_insn_pattern (p)
+ insn_pattern *p;
+{
+ clear_insn_templ (&p->t);
+ clear_precond_list (&p->preconds);
+}
+
+
+void
+init_insn_repl (r)
+ insn_repl *r;
+{
+ r->head = NULL;
+ r->tail = &r->head;
+}
+
+
+void
+clear_insn_repl (r)
+ insn_repl *r;
+{
+ insn_repl_e *e;
+
+ while (r->head != NULL)
+ {
+ e = r->head;
+ r->head = e->next;
+ clear_insn_templ (&e->t);
+ }
+ r->tail = &r->head;
+}
+
+
+static size_t
+insn_templ_operand_count (t)
+ const insn_templ *t;
+{
+ size_t i = 0;
+ const opname_map_e *op;
+
+ for (op = t->operand_map.head; op != NULL; op = op->next, ++i)
+ ;
+ return i;
+}
+
+
+/* Convert a string to a number. E.G.: parse_constant("10", &num) */
+
+bfd_boolean
+parse_constant (in, val_p)
+ const char *in;
+ unsigned *val_p;
+{
+ unsigned val = 0;
+ const char *p;
+
+ if (in == NULL)
+ return FALSE;
+ p = in;
+
+ while (*p != '\0')
+ {
+ if (*p >= '0' && *p <= '9')
+ val = val * 10 + (*p - '0');
+ else
+ return FALSE;
+ ++p;
+ }
+ *val_p = val;
+ return TRUE;
+}
+
+
+/* Match a pattern like "foo1" with
+ parse_id_constant("foo1", "foo", &num).
+ This may also be used to just match a number. */
+
+bfd_boolean
+parse_id_constant (in, name, val_p)
+ const char *in;
+ const char *name;
+ unsigned *val_p;
+{
+ unsigned namelen = 0;
+ const char *p;
+
+ if (in == NULL)
+ return FALSE;
+
+ if (name != NULL)
+ namelen = strlen (name);
+
+ if (name != NULL && strncmp (in, name, namelen) != 0)
+ return FALSE;
+
+ p = &in[namelen];
+ return parse_constant (p, val_p);
+}
+
+
+static bfd_boolean
+parse_special_fn (name, fn_name_p, arg_name_p)
+ const char *name;
+ const char **fn_name_p;
+ const char **arg_name_p;
+{
+ char *p_start;
+ const char *p_end;
+
+ p_start = strchr (name, '(');
+ if (p_start == NULL)
+ return FALSE;
+
+ p_end = strchr (p_start, ')');
+
+ if (p_end == NULL)
+ return FALSE;
+
+ if (p_end[1] != '\0')
+ return FALSE;
+
+ *fn_name_p = enter_opname_n (name, p_start - name);
+ *arg_name_p = enter_opname_n (p_start + 1, p_end - p_start - 1);
+ return TRUE;
+}
+
+
+const char *
+skip_white (p)
+ const char *p;
+{
+ if (p == NULL)
+ return p;
+ while (*p == ' ')
+ ++p;
+ return p;
+}
+
+
+void
+trim_whitespace (in)
+ char *in;
+{
+ char *last_white = NULL;
+ char *p = in;
+
+ while (p && *p != '\0')
+ {
+ while (*p == ' ')
+ {
+ if (last_white == NULL)
+ last_white = p;
+ p++;
+ }
+ if (*p != '\0')
+ {
+ last_white = NULL;
+ p++;
+ }
+ }
+ if (last_white)
+ *last_white = '\0';
+}
+
+
+/* Split a string into component strings where "c" is the
+ delimiter. Place the result in the split_rec. */
+
+void
+split_string (rec, in, c, elide_whitespace)
+ split_rec *rec;
+ const char *in;
+ char c;
+ bfd_boolean elide_whitespace;
+{
+ size_t cnt = 0;
+ size_t i;
+ const char *p = in;
+
+ while (p != NULL && *p != '\0')
+ {
+ cnt++;
+ p = strchr (p, c);
+ if (p)
+ p++;
+ }
+ rec->count = cnt;
+ rec->vec = NULL;
+
+ if (rec->count == 0)
+ return;
+
+ rec->vec = (char **) xmalloc (sizeof (char *) * cnt);
+ for (i = 0; i < cnt; i++)
+ rec->vec[i] = 0;
+
+ p = in;
+ for (i = 0; i < cnt; i++)
+ {
+ const char *q;
+ size_t len;
+
+ q = p;
+ if (elide_whitespace)
+ q = skip_white (q);
+
+ p = strchr (q, c);
+ if (p == NULL)
+ rec->vec[i] = strdup (q);
+ else
+ {
+ len = p - q;
+ rec->vec[i] = (char *) xmalloc (sizeof (char) * (len + 1));
+ strncpy (rec->vec[i], q, len);
+ rec->vec[i][len] = '\0';
+ p++;
+ }
+
+ if (elide_whitespace)
+ trim_whitespace (rec->vec[i]);
+ }
+}
+
+
+void
+clear_split_rec (rec)
+ split_rec *rec;
+{
+ size_t i;
+
+ for (i = 0; i < rec->count; ++i)
+ free (rec->vec[i]);
+
+ if (rec->count > 0)
+ free (rec->vec);
+}
+
+
+void
+init_split_rec (rec)
+ split_rec *rec;
+{
+ rec->vec = NULL;
+ rec->count = 0;
+}
+
+
+/* Parse an instruction template like "insn op1, op2, op3". */
+
+bfd_boolean
+parse_insn_templ (s, t)
+ const char *s;
+ insn_templ *t;
+{
+ const char *p = s;
+ /* First find the first whitespace. */
+ size_t insn_name_len;
+ split_rec oprec;
+ size_t i;
+
+ init_split_rec (&oprec);
+
+ p = skip_white (p);
+ insn_name_len = strcspn (s, " ");
+ if (insn_name_len == 0)
+ return FALSE;
+
+ init_insn_templ (t);
+ t->opcode_name = enter_opname_n (p, insn_name_len);
+
+ p = p + insn_name_len;
+
+ /* Split by ',' and skip beginning and trailing whitespace. */
+ split_string (&oprec, p, ',', TRUE);
+
+ for (i = 0; i < oprec.count; i++)
+ {
+ const char *opname = oprec.vec[i];
+ opname_map_e *e = (opname_map_e *) xmalloc (sizeof (opname_map_e));
+ e->next = NULL;
+ e->operand_name = NULL;
+ e->constant_value = 0;
+ e->operand_num = i;
+
+ /* If it begins with a number, assume that it is a number. */
+ if (opname && opname[0] >= '0' && opname[0] <= '9')
+ {
+ unsigned val;
+
+ if (parse_constant (opname, &val))
+ e->constant_value = val;
+ else
+ {
+ free (e);
+ clear_split_rec (&oprec);
+ clear_insn_templ (t);
+ return FALSE;
+ }
+ }
+ else
+ e->operand_name = enter_opname (oprec.vec[i]);
+
+ *t->operand_map.tail = e;
+ t->operand_map.tail = &e->next;
+ }
+ clear_split_rec (&oprec);
+ return TRUE;
+}
+
+
+bfd_boolean
+parse_precond (s, precond)
+ const char *s;
+ precond_e *precond;
+{
+ /* All preconditions are currently of the form:
+ a == b or a != b or a == k (where k is a constant).
+ Later we may use some special functions like DENSITY == 1
+ to identify when density is available. */
+
+ const char *p = s;
+ size_t len;
+ precond->opname1 = NULL;
+ precond->opval1 = 0;
+ precond->cmpop = OP_EQUAL;
+ precond->opname2 = NULL;
+ precond->opval2 = 0;
+ precond->next = NULL;
+
+ p = skip_white (p);
+
+ len = strcspn (p, " !=");
+
+ if (len == 0)
+ return FALSE;
+
+ precond->opname1 = enter_opname_n (p, len);
+ p = p + len;
+ p = skip_white (p);
+
+ /* Check for "==" and "!=". */
+ if (strncmp (p, "==", 2) == 0)
+ precond->cmpop = OP_EQUAL;
+ else if (strncmp (p, "!=", 2) == 0)
+ precond->cmpop = OP_NOTEQUAL;
+ else
+ return FALSE;
+
+ p = p + 2;
+ p = skip_white (p);
+
+ /* No trailing whitespace from earlier parsing. */
+ if (p[0] >= '0' && p[0] <= '9')
+ {
+ unsigned val;
+ if (parse_constant (p, &val))
+ precond->opval2 = val;
+ else
+ return FALSE;
+ }
+ else
+ precond->opname2 = enter_opname (p);
+ return TRUE;
+}
+
+
+/* Parse a string like:
+ "insn op1, op2, op3, op4 | op1 != op2 | op2 == op3 | op4 == 1".
+ I.E., instruction "insn" with 4 operands where operand 1 and 2 are not
+ the same and operand 2 and 3 are the same and operand 4 is 1. */
+
+bfd_boolean
+parse_insn_pattern (in, insn)
+ const char *in;
+ insn_pattern *insn;
+{
+
+ split_rec rec;
+ size_t i;
+
+ init_split_rec (&rec);
+ init_insn_pattern (insn);
+
+ split_string (&rec, in, '|', TRUE);
+
+ if (rec.count == 0)
+ {
+ clear_split_rec (&rec);
+ return FALSE;
+ }
+
+ if (!parse_insn_templ (rec.vec[0], &insn->t))
+ {
+ clear_split_rec (&rec);
+ return FALSE;
+ }
+
+ for (i = 1; i < rec.count; i++)
+ {
+ precond_e *cond = (precond_e *) xmalloc (sizeof (precond_e));
+
+ if (!parse_precond (rec.vec[i], cond))
+ {
+ clear_split_rec (&rec);
+ clear_insn_pattern (insn);
+ return FALSE;
+ }
+
+ /* Append the condition. */
+ *insn->preconds.tail = cond;
+ insn->preconds.tail = &cond->next;
+ }
+
+ clear_split_rec (&rec);
+ return TRUE;
+}
+
+
+bfd_boolean
+parse_insn_repl (in, r_p)
+ const char *in;
+ insn_repl *r_p;
+{
+ /* This is a list of instruction templates separated by ';'. */
+ split_rec rec;
+ size_t i;
+
+ split_string (&rec, in, ';', TRUE);
+
+ for (i = 0; i < rec.count; i++)
+ {
+ insn_repl_e *e = (insn_repl_e *) xmalloc (sizeof (insn_repl_e));
+
+ e->next = NULL;
+
+ if (!parse_insn_templ (rec.vec[i], &e->t))
+ {
+ free (e);
+ clear_insn_repl (r_p);
+ return FALSE;
+ }
+ *r_p->tail = e;
+ r_p->tail = &e->next;
+ }
+ return TRUE;
+}
+
+
+TransitionRule *
+build_transition (initial_insn, replace_insns, from_string, to_string)
+ insn_pattern *initial_insn;
+ insn_repl *replace_insns;
+ const char *from_string;
+ const char *to_string;
+{
+ TransitionRule *tr = NULL;
+ xtensa_opcode opcode;
+ xtensa_isa isa = xtensa_default_isa;
+
+ opname_map_e *op1;
+ opname_map_e *op2;
+
+ precond_e *precond;
+ insn_repl_e *r;
+ unsigned label_count = 0;
+ unsigned max_label_count = 0;
+ bfd_boolean has_label = FALSE;
+ unsigned literal_count = 0;
+
+ opcode = xtensa_opcode_lookup (isa, initial_insn->t.opcode_name);
+ if (opcode == XTENSA_UNDEFINED)
+ {
+ /* It is OK to not be able to translate some of these opcodes. */
+#if 0
+ as_warn (_("Invalid opcode '%s' in transition rule '%s'\n"),
+ initial_insn->t.opcode_name, to_string);
+#endif
+ return NULL;
+ }
+
+
+ if (xtensa_num_operands (isa, opcode)
+ != (int) insn_templ_operand_count (&initial_insn->t))
+ {
+ /* This is also OK because there are opcodes that
+ have different numbers of operands on different
+ architecture variations. */
+#if 0
+ as_fatal (_("opcode %s mismatched operand count %d != expected %d"),
+ xtensa_opcode_name (isa, opcode),
+ xtensa_num_operands (isa, opcode),
+ insn_templ_operand_count (&initial_insn->t));
+#endif
+ return NULL;
+ }
+
+ tr = (TransitionRule *) xmalloc (sizeof (TransitionRule));
+ tr->opcode = opcode;
+ tr->conditions = NULL;
+ tr->to_instr = NULL;
+
+ /* Build the conditions. First, equivalent operand condition.... */
+ for (op1 = initial_insn->t.operand_map.head; op1 != NULL; op1 = op1->next)
+ {
+ for (op2 = op1->next; op2 != NULL; op2 = op2->next)
+ {
+ if (same_operand_name (op1, op2))
+ {
+ append_value_condition (tr, OP_EQUAL,
+ op1->operand_num, op2->operand_num);
+ }
+ }
+ }
+
+ /* Now the condition that an operand value must be a constant.... */
+ for (op1 = initial_insn->t.operand_map.head; op1 != NULL; op1 = op1->next)
+ {
+ if (op_is_constant (op1))
+ {
+ append_constant_value_condition (tr,
+ OP_EQUAL,
+ op1->operand_num,
+ op_get_constant (op1));
+ }
+ }
+
+
+ /* Now add the explicit preconditions listed after the "|" in the spec.
+ These are currently very limited, so we do a special case
+ parse for them. We expect spaces, opname != opname. */
+ for (precond = initial_insn->preconds.head;
+ precond != NULL;
+ precond = precond->next)
+ {
+ op1 = NULL;
+ op2 = NULL;
+
+ if (precond->opname1)
+ {
+ op1 = get_opmatch (&initial_insn->t.operand_map, precond->opname1);
+ if (op1 == NULL)
+ {
+ as_fatal (_("opcode '%s': no bound opname '%s' "
+ "for precondition in '%s'"),
+ xtensa_opcode_name (isa, opcode),
+ precond->opname1, from_string);
+ return NULL;
+ }
+ }
+
+ if (precond->opname2)
+ {
+ op2 = get_opmatch (&initial_insn->t.operand_map, precond->opname2);
+ if (op2 == NULL)
+ {
+ as_fatal (_("opcode '%s': no bound opname '%s' "
+ "for precondition in %s"),
+ xtensa_opcode_name (isa, opcode),
+ precond->opname2, from_string);
+ return NULL;
+ }
+ }
+
+ if (op1 == NULL && op2 == NULL)
+ {
+ as_fatal (_("opcode '%s': precondition only contains "
+ "constants in '%s'"),
+ xtensa_opcode_name (isa, opcode), from_string);
+ return NULL;
+ }
+ else if (op1 != NULL && op2 != NULL)
+ append_value_condition (tr, precond->cmpop,
+ op1->operand_num, op2->operand_num);
+ else if (op2 == NULL)
+ append_constant_value_condition (tr, precond->cmpop,
+ op1->operand_num, precond->opval1);
+ else
+ append_constant_value_condition (tr, precond->cmpop,
+ op2->operand_num, precond->opval2);
+ }
+
+ /* Generate the replacement instructions. Some of these
+ "instructions" are actually labels and literals. The literals
+ must be defined in order 0..n and a literal must be defined
+ (e.g., "LITERAL0 %imm") before use (e.g., "%LITERAL0"). The
+ labels must be defined in order, but they can be used before they
+ are defined. Also there are a number of special operands (e.g.,
+ HI24S). */
+
+ for (r = replace_insns->head; r != NULL; r = r->next)
+ {
+ BuildInstr *bi;
+ const char *opcode_name;
+ size_t operand_count;
+ opname_map_e *op;
+ unsigned idnum = 0;
+ const char *fn_name;
+ const char *operand_arg_name;
+
+ bi = (BuildInstr *) xmalloc (sizeof (BuildInstr));
+ append_build_insn (tr, bi);
+
+ bi->id = 0;
+ bi->opcode = XTENSA_UNDEFINED;
+ bi->ops = NULL;
+ bi->next = NULL;
+
+ opcode_name = r->t.opcode_name;
+ operand_count = insn_templ_operand_count (&r->t);
+
+ if (parse_id_constant (opcode_name, "LITERAL", &idnum))
+ {
+ bi->typ = INSTR_LITERAL_DEF;
+ bi->id = idnum;
+ if (idnum != literal_count)
+ as_fatal (_("generated literals must be numbered consecutively"));
+ ++literal_count;
+ if (operand_count != 1)
+ as_fatal (_("expected one operand for generated literal"));
+
+ }
+ else if (parse_id_constant (opcode_name, "LABEL", &idnum))
+ {
+ bi->typ = INSTR_LABEL_DEF;
+ bi->id = idnum;
+ if (idnum != label_count)
+ as_fatal (_("generated labels must be numbered consecutively"));
+ ++label_count;
+ if (operand_count != 0)
+ as_fatal (_("expected 0 operands for generated label"));
+ }
+ else
+ {
+ bi->typ = INSTR_INSTR;
+ bi->opcode = xtensa_opcode_lookup (isa, r->t.opcode_name);
+ if (bi->opcode == XTENSA_UNDEFINED)
+ return NULL;
+ /* Check for the right number of ops. */
+ if (xtensa_num_operands (isa, bi->opcode)
+ != (int) operand_count)
+ as_fatal (_("opcode '%s': replacement does not have %d ops"),
+ opcode_name, xtensa_num_operands (isa, bi->opcode));
+ }
+
+ for (op = r->t.operand_map.head; op != NULL; op = op->next)
+ {
+ unsigned idnum;
+
+ if (op_is_constant (op))
+ append_constant_op (bi, op->operand_num, op_get_constant (op));
+ else if (parse_id_constant (op->operand_name, "%LITERAL", &idnum))
+ {
+ if (idnum >= literal_count)
+ as_fatal (_("opcode %s: replacement "
+ "literal %d >= literal_count(%d)"),
+ opcode_name, idnum, literal_count);
+ append_literal_op (bi, op->operand_num, idnum);
+ }
+ else if (parse_id_constant (op->operand_name, "%LABEL", &idnum))
+ {
+ has_label = TRUE;
+ if (idnum > max_label_count)
+ max_label_count = idnum;
+ append_label_op (bi, op->operand_num, idnum);
+ }
+ else if (parse_id_constant (op->operand_name, "a", &idnum))
+ append_constant_op (bi, op->operand_num, idnum);
+ else if (op->operand_name[0] == '%')
+ {
+ opname_map_e *orig_op;
+ orig_op = get_opmatch (&initial_insn->t.operand_map,
+ op->operand_name);
+ if (orig_op == NULL)
+ {
+ as_fatal (_("opcode %s: unidentified operand '%s' in '%s'"),
+ opcode_name, op->operand_name, to_string);
+
+ append_constant_op (bi, op->operand_num, 0);
+ }
+ else
+ append_field_op (bi, op->operand_num, orig_op->operand_num);
+ }
+ else if (parse_special_fn (op->operand_name,
+ &fn_name, &operand_arg_name))
+ {
+ opname_map_e *orig_op;
+ OpType typ = OP_CONSTANT;
+
+ if (strcmp (fn_name, "LOW8") == 0)
+ typ = OP_OPERAND_LOW8;
+ else if (strcmp (fn_name, "HI24S") == 0)
+ typ = OP_OPERAND_HI24S;
+ else if (strcmp (fn_name, "F32MINUS") == 0)
+ typ = OP_OPERAND_F32MINUS;
+ else
+ as_fatal (_("unknown user defined function %s"), fn_name);
+
+ orig_op = get_opmatch (&initial_insn->t.operand_map,
+ operand_arg_name);
+ if (orig_op == NULL)
+ {
+ as_fatal (_("opcode %s: unidentified operand '%s' in '%s'"),
+ opcode_name, op->operand_name, to_string);
+ append_constant_op (bi, op->operand_num, 0);
+ }
+ else
+ append_user_fn_field_op (bi, op->operand_num,
+ typ, orig_op->operand_num);
+ }
+ else
+ {
+ as_fatal (_("opcode %s: could not parse operand '%s' in '%s'"),
+ opcode_name, op->operand_name, to_string);
+ append_constant_op (bi, op->operand_num, 0);
+ }
+ }
+ }
+ if (has_label && max_label_count >= label_count)
+ {
+ as_fatal (_("opcode %s: replacement label %d >= label_count(%d)"),
+ xtensa_opcode_name (isa, opcode),
+ max_label_count, label_count);
+ return NULL;
+ }
+
+ return tr;
+}
+
+
+TransitionTable *
+build_transition_table (transitions, transition_count)
+ const string_pattern_pair *transitions;
+ size_t transition_count;
+{
+ TransitionTable *table = NULL;
+ int num_opcodes = xtensa_num_opcodes (xtensa_default_isa);
+ int i;
+ size_t tnum;
+
+ if (table != NULL)
+ return table;
+
+ /* Otherwise, build it now. */
+ table = (TransitionTable *) xmalloc (sizeof (TransitionTable));
+ table->num_opcodes = num_opcodes;
+ table->table =
+ (TransitionList **) xmalloc (sizeof (TransitionTable *) * num_opcodes);
+
+ for (i = 0; i < num_opcodes; i++)
+ table->table[i] = NULL;
+
+ for (tnum = 0; tnum < transition_count; tnum++)
+ {
+ const char *from_string = transitions[tnum].pattern;
+ const char *to_string = transitions[tnum].replacement;
+
+ insn_pattern initial_insn;
+ insn_repl replace_insns;
+ TransitionRule *tr;
+
+ init_insn_pattern (&initial_insn);
+ if (!parse_insn_pattern (from_string, &initial_insn))
+ {
+ as_fatal (_("could not parse INSN_PATTERN '%s'"), from_string);
+ clear_insn_pattern (&initial_insn);
+ continue;
+ }
+
+ init_insn_repl (&replace_insns);
+ if (!parse_insn_repl (to_string, &replace_insns))
+ {
+ as_fatal (_("could not parse INSN_REPL '%s'"), to_string);
+ clear_insn_pattern (&initial_insn);
+ clear_insn_repl (&replace_insns);
+ continue;
+ }
+
+ tr = build_transition (&initial_insn, &replace_insns,
+ from_string, to_string);
+ if (tr)
+ append_transition (table, tr->opcode, tr);
+
+ clear_insn_repl (&replace_insns);
+ clear_insn_pattern (&initial_insn);
+ }
+ return table;
+}
+
+
+extern TransitionTable *
+xg_build_widen_table ()
+{
+ static TransitionTable *table = NULL;
+ if (table == NULL)
+ table = build_transition_table (widen_spec_list, WIDEN_COUNT);
+ return table;
+}
+
+
+extern TransitionTable *
+xg_build_simplify_table ()
+{
+ static TransitionTable *table = NULL;
+ if (table == NULL)
+ table = build_transition_table (simplify_spec_list, SIMPLIFY_COUNT);
+ return table;
+}
diff --git a/gas/config/xtensa-relax.h b/gas/config/xtensa-relax.h
new file mode 100644
index 0000000000..99bf77bfd8
--- /dev/null
+++ b/gas/config/xtensa-relax.h
@@ -0,0 +1,142 @@
+/* Table of relaxations for Xtensa assembly.
+ Copyright 2003 Free Software Foundation, Inc.
+
+ This file is part of GAS, the GNU Assembler.
+
+ GAS is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2, or (at your option)
+ any later version.
+
+ GAS is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GAS; see the file COPYING. If not, write to
+ the Free Software Foundation, 59 Temple Place - Suite 330, Boston,
+ MA 02111-1307, USA. */
+
+#ifndef XTENSA_RELAX_H
+#define XTENSA_RELAX_H
+
+#include "xtensa-isa.h"
+
+
+/* Data structures for the table-driven relaxations for Xtensa processors.
+ See xtensa-relax.c for details. */
+
+typedef struct transition_list TransitionList;
+typedef struct transition_table TransitionTable;
+typedef struct transition_rule TransitionRule;
+typedef struct precondition_list PreconditionList;
+typedef struct precondition Precondition;
+
+struct transition_table
+{
+ int num_opcodes;
+ TransitionList **table; /* Possible transitions for each opcode. */
+};
+
+struct transition_list
+{
+ TransitionRule *rule;
+ TransitionList *next;
+};
+
+struct precondition_list
+{
+ Precondition *precond;
+ PreconditionList *next;
+};
+
+
+/* Operand types and constraints on operands: */
+
+typedef enum op_type OpType;
+typedef enum cmp_op CmpOp;
+
+enum op_type
+{
+ OP_CONSTANT,
+ OP_OPERAND,
+ OP_OPERAND_LOW8, /* Sign-extended low 8 bits of immed. */
+ OP_OPERAND_HI24S, /* high 24 bits of immed,
+ plus 0x100 if low 8 bits are signed. */
+ OP_OPERAND_F32MINUS, /* 32 - immed. */
+ OP_LITERAL,
+ OP_LABEL
+};
+
+enum cmp_op
+{
+ OP_EQUAL,
+ OP_NOTEQUAL,
+};
+
+struct precondition
+{
+ CmpOp cmp;
+ int op_num;
+ OpType typ; /* CONSTANT: op_data is a constant.
+ OPERAND: operand op_num must equal op_data.
+ Cannot be LITERAL or LABEL. */
+ int op_data;
+};
+
+typedef struct build_op BuildOp;
+
+struct build_op
+{
+ int op_num;
+ OpType typ;
+ unsigned op_data; /* CONSTANT: op_data is the value to encode.
+ OPERAND: op_data is the field in the
+ source instruction to take the value from
+ and encode in the op_num field here.
+ LITERAL or LABEL: op_data is the ordinal
+ that identifies the appropriate one, i.e.,
+ there can be more than one literal or
+ label in an expansion. */
+ BuildOp *next;
+};
+
+typedef struct build_instr BuildInstr;
+typedef enum instr_type InstrType;
+
+enum instr_type
+{
+ INSTR_INSTR,
+ INSTR_LITERAL_DEF,
+ INSTR_LABEL_DEF
+};
+
+struct build_instr
+{
+ InstrType typ;
+ unsigned id; /* LITERAL_DEF or LABEL_DEF: an ordinal to
+ identify which one. */
+ xtensa_opcode opcode; /* unused for LITERAL_DEF or LABEL_DEF. */
+ BuildOp *ops;
+ BuildInstr *next;
+};
+
+struct transition_rule
+{
+ xtensa_opcode opcode;
+ PreconditionList *conditions;
+ BuildInstr *to_instr;
+};
+
+extern TransitionTable *xg_build_simplify_table
+ PARAMS ((void));
+extern TransitionTable *xg_build_widen_table
+ PARAMS ((void));
+
+extern bfd_boolean xg_has_userdef_op_fn
+ PARAMS ((OpType));
+extern long xg_apply_userdef_op_fn
+ PARAMS ((OpType, long));
+
+#endif /* !XTENSA_RELAX_H */
diff --git a/gas/configure b/gas/configure
index 3ea803b923..10989f733f 100755
--- a/gas/configure
+++ b/gas/configure
@@ -1989,6 +1989,19 @@ case $host in
# Find out which ABI we are using.
echo '#line 1991 "configure"' > conftest.$ac_ext
if { (eval echo configure:1992: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+ if test "$lt_cv_prog_gnu_ld" = yes; then
+ case `/usr/bin/file conftest.$ac_objext` in
+ *32-bit*)
+ LD="${LD-ld} -melf32bsmip"
+ ;;
+ *N32*)
+ LD="${LD-ld} -melf32bmipn32"
+ ;;
+ *64-bit*)
+ LD="${LD-ld} -melf64bmip"
+ ;;
+ esac
+ else
case `/usr/bin/file conftest.$ac_objext` in
*32-bit*)
LD="${LD-ld} -32"
@@ -2000,6 +2013,7 @@ case $host in
LD="${LD-ld} -64"
;;
esac
+ fi
fi
rm -rf conftest*
;;
@@ -2007,7 +2021,7 @@ case $host in
ia64-*-hpux*)
# Find out which ABI we are using.
echo 'int i;' > conftest.$ac_ext
- if { (eval echo configure:2011: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+ if { (eval echo configure:2025: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
case "`/usr/bin/file conftest.o`" in
*ELF-32*)
HPUX_IA64_MODE="32"
@@ -2025,7 +2039,7 @@ ia64-*-hpux*)
SAVE_CFLAGS="$CFLAGS"
CFLAGS="$CFLAGS -belf"
echo $ac_n "checking whether the C compiler needs -belf""... $ac_c" 1>&6
-echo "configure:2029: checking whether the C compiler needs -belf" >&5
+echo "configure:2043: checking whether the C compiler needs -belf" >&5
if eval "test \"`echo '$''{'lt_cv_cc_needs_belf'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -2038,14 +2052,14 @@ ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$a
cross_compiling=$ac_cv_prog_cc_cross
cat > conftest.$ac_ext <<EOF
-#line 2042 "configure"
+#line 2056 "configure"
#include "confdefs.h"
int main() {
; return 0; }
EOF
-if { (eval echo configure:2049: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:2063: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
lt_cv_cc_needs_belf=yes
else
@@ -2314,6 +2328,7 @@ for this_target in $target $canon_targets ; do
sparc86x*) cpu_type=sparc arch=sparc86x ;;
sparc*) cpu_type=sparc arch=sparclite ;; # ??? See tc-sparc.c.
v850*) cpu_type=v850 ;;
+ xtensa*) cpu_type=xtensa arch=xtensa ;;
*) cpu_type=${cpu} ;;
esac
@@ -2649,6 +2664,8 @@ EOF
xstormy16-*-*) fmt=elf ;;
+ xtensa-*-*) fmt=elf ;;
+
z8k-*-coff | z8k-*-sim) fmt=coff ;;
*-*-aout | *-*-scout) fmt=aout ;;
@@ -2822,6 +2839,13 @@ EOF
using_cgen=yes
;;
+ xtensa)
+ echo ${extra_objects} | grep -s "xtensa-relax.o"
+ if test $? -ne 0 ; then
+ extra_objects="$extra_objects xtensa-relax.o"
+ fi
+ ;;
+
*)
;;
esac
@@ -3201,7 +3225,7 @@ EOF
# Extract the first word of "gcc", so it can be a program name with args.
set dummy gcc; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3205: checking for $ac_word" >&5
+echo "configure:3229: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -3231,7 +3255,7 @@ if test -z "$CC"; then
# Extract the first word of "cc", so it can be a program name with args.
set dummy cc; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3235: checking for $ac_word" >&5
+echo "configure:3259: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -3282,7 +3306,7 @@ fi
# Extract the first word of "cl", so it can be a program name with args.
set dummy cl; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3286: checking for $ac_word" >&5
+echo "configure:3310: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -3314,7 +3338,7 @@ fi
fi
echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6
-echo "configure:3318: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
+echo "configure:3342: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
ac_ext=c
# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
@@ -3325,12 +3349,12 @@ cross_compiling=$ac_cv_prog_cc_cross
cat > conftest.$ac_ext << EOF
-#line 3329 "configure"
+#line 3353 "configure"
#include "confdefs.h"
main(){return(0);}
EOF
-if { (eval echo configure:3334: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:3358: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
ac_cv_prog_cc_works=yes
# If we can't run a trivial program, we are probably using a cross compiler.
if (./conftest; exit) 2>/dev/null; then
@@ -3356,12 +3380,12 @@ if test $ac_cv_prog_cc_works = no; then
{ echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; }
fi
echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6
-echo "configure:3360: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
+echo "configure:3384: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6
cross_compiling=$ac_cv_prog_cc_cross
echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6
-echo "configure:3365: checking whether we are using GNU C" >&5
+echo "configure:3389: checking whether we are using GNU C" >&5
if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -3370,7 +3394,7 @@ else
yes;
#endif
EOF
-if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:3374: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
+if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:3398: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
ac_cv_prog_gcc=yes
else
ac_cv_prog_gcc=no
@@ -3389,7 +3413,7 @@ ac_test_CFLAGS="${CFLAGS+set}"
ac_save_CFLAGS="$CFLAGS"
CFLAGS=
echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6
-echo "configure:3393: checking whether ${CC-cc} accepts -g" >&5
+echo "configure:3417: checking whether ${CC-cc} accepts -g" >&5
if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -3426,7 +3450,7 @@ do
# Extract the first word of "$ac_prog", so it can be a program name with args.
set dummy $ac_prog; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3430: checking for $ac_word" >&5
+echo "configure:3454: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_YACC'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -3457,7 +3481,7 @@ done
test -n "$YACC" || YACC="yacc"
echo $ac_n "checking how to run the C preprocessor""... $ac_c" 1>&6
-echo "configure:3461: checking how to run the C preprocessor" >&5
+echo "configure:3485: checking how to run the C preprocessor" >&5
# On Suns, sometimes $CPP names a directory.
if test -n "$CPP" && test -d "$CPP"; then
CPP=
@@ -3472,13 +3496,13 @@ else
# On the NeXT, cc -E runs the code through the compiler's parser,
# not just through cpp.
cat > conftest.$ac_ext <<EOF
-#line 3476 "configure"
+#line 3500 "configure"
#include "confdefs.h"
#include <assert.h>
Syntax Error
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3482: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:3506: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
if test -z "$ac_err"; then
:
@@ -3489,13 +3513,13 @@ else
rm -rf conftest*
CPP="${CC-cc} -E -traditional-cpp"
cat > conftest.$ac_ext <<EOF
-#line 3493 "configure"
+#line 3517 "configure"
#include "confdefs.h"
#include <assert.h>
Syntax Error
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3499: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:3523: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
if test -z "$ac_err"; then
:
@@ -3506,13 +3530,13 @@ else
rm -rf conftest*
CPP="${CC-cc} -nologo -E"
cat > conftest.$ac_ext <<EOF
-#line 3510 "configure"
+#line 3534 "configure"
#include "confdefs.h"
#include <assert.h>
Syntax Error
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3516: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:3540: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
if test -z "$ac_err"; then
:
@@ -3542,7 +3566,7 @@ do
# Extract the first word of "$ac_prog", so it can be a program name with args.
set dummy $ac_prog; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3546: checking for $ac_word" >&5
+echo "configure:3570: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_LEX'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -3575,7 +3599,7 @@ test -n "$LEX" || LEX="$missing_dir/missing flex"
# Extract the first word of "flex", so it can be a program name with args.
set dummy flex; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3579: checking for $ac_word" >&5
+echo "configure:3603: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_LEX'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -3609,7 +3633,7 @@ then
*) ac_lib=l ;;
esac
echo $ac_n "checking for yywrap in -l$ac_lib""... $ac_c" 1>&6
-echo "configure:3613: checking for yywrap in -l$ac_lib" >&5
+echo "configure:3637: checking for yywrap in -l$ac_lib" >&5
ac_lib_var=`echo $ac_lib'_'yywrap | sed 'y%./+-%__p_%'`
if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
@@ -3617,7 +3641,7 @@ else
ac_save_LIBS="$LIBS"
LIBS="-l$ac_lib $LIBS"
cat > conftest.$ac_ext <<EOF
-#line 3621 "configure"
+#line 3645 "configure"
#include "confdefs.h"
/* Override any gcc2 internal prototype to avoid an error. */
/* We use char because int might match the return type of a gcc2
@@ -3628,7 +3652,7 @@ int main() {
yywrap()
; return 0; }
EOF
-if { (eval echo configure:3632: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:3656: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
eval "ac_cv_lib_$ac_lib_var=yes"
else
@@ -3651,7 +3675,7 @@ fi
fi
echo $ac_n "checking lex output file root""... $ac_c" 1>&6
-echo "configure:3655: checking lex output file root" >&5
+echo "configure:3679: checking lex output file root" >&5
if eval "test \"`echo '$''{'ac_cv_prog_lex_root'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -3672,7 +3696,7 @@ echo "$ac_t""$ac_cv_prog_lex_root" 1>&6
LEX_OUTPUT_ROOT=$ac_cv_prog_lex_root
echo $ac_n "checking whether yytext is a pointer""... $ac_c" 1>&6
-echo "configure:3676: checking whether yytext is a pointer" >&5
+echo "configure:3700: checking whether yytext is a pointer" >&5
if eval "test \"`echo '$''{'ac_cv_prog_lex_yytext_pointer'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -3684,14 +3708,14 @@ echo 'extern char *yytext;' >>$LEX_OUTPUT_ROOT.c
ac_save_LIBS="$LIBS"
LIBS="$LIBS $LEXLIB"
cat > conftest.$ac_ext <<EOF
-#line 3688 "configure"
+#line 3712 "configure"
#include "confdefs.h"
`cat $LEX_OUTPUT_ROOT.c`
int main() {
; return 0; }
EOF
-if { (eval echo configure:3695: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:3719: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
ac_cv_prog_lex_yytext_pointer=yes
else
@@ -3717,7 +3741,7 @@ ALL_LINGUAS="fr tr es"
# Extract the first word of "ranlib", so it can be a program name with args.
set dummy ranlib; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3721: checking for $ac_word" >&5
+echo "configure:3745: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -3745,12 +3769,12 @@ else
fi
echo $ac_n "checking for ANSI C header files""... $ac_c" 1>&6
-echo "configure:3749: checking for ANSI C header files" >&5
+echo "configure:3773: checking for ANSI C header files" >&5
if eval "test \"`echo '$''{'ac_cv_header_stdc'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 3754 "configure"
+#line 3778 "configure"
#include "confdefs.h"
#include <stdlib.h>
#include <stdarg.h>
@@ -3758,7 +3782,7 @@ else
#include <float.h>
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3762: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:3786: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
if test -z "$ac_err"; then
rm -rf conftest*
@@ -3775,7 +3799,7 @@ rm -f conftest*
if test $ac_cv_header_stdc = yes; then
# SunOS 4.x string.h does not declare mem*, contrary to ANSI.
cat > conftest.$ac_ext <<EOF
-#line 3779 "configure"
+#line 3803 "configure"
#include "confdefs.h"
#include <string.h>
EOF
@@ -3793,7 +3817,7 @@ fi
if test $ac_cv_header_stdc = yes; then
# ISC 2.0.2 stdlib.h does not declare free, contrary to ANSI.
cat > conftest.$ac_ext <<EOF
-#line 3797 "configure"
+#line 3821 "configure"
#include "confdefs.h"
#include <stdlib.h>
EOF
@@ -3814,7 +3838,7 @@ if test "$cross_compiling" = yes; then
:
else
cat > conftest.$ac_ext <<EOF
-#line 3818 "configure"
+#line 3842 "configure"
#include "confdefs.h"
#include <ctype.h>
#define ISLOWER(c) ('a' <= (c) && (c) <= 'z')
@@ -3825,7 +3849,7 @@ if (XOR (islower (i), ISLOWER (i)) || toupper (i) != TOUPPER (i)) exit(2);
exit (0); }
EOF
-if { (eval echo configure:3829: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
+if { (eval echo configure:3853: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
then
:
else
@@ -3849,12 +3873,12 @@ EOF
fi
echo $ac_n "checking for working const""... $ac_c" 1>&6
-echo "configure:3853: checking for working const" >&5
+echo "configure:3877: checking for working const" >&5
if eval "test \"`echo '$''{'ac_cv_c_const'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 3858 "configure"
+#line 3882 "configure"
#include "confdefs.h"
int main() {
@@ -3903,7 +3927,7 @@ ccp = (char const *const *) p;
; return 0; }
EOF
-if { (eval echo configure:3907: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+if { (eval echo configure:3931: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
rm -rf conftest*
ac_cv_c_const=yes
else
@@ -3924,21 +3948,21 @@ EOF
fi
echo $ac_n "checking for inline""... $ac_c" 1>&6
-echo "configure:3928: checking for inline" >&5
+echo "configure:3952: checking for inline" >&5
if eval "test \"`echo '$''{'ac_cv_c_inline'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
ac_cv_c_inline=no
for ac_kw in inline __inline__ __inline; do
cat > conftest.$ac_ext <<EOF
-#line 3935 "configure"
+#line 3959 "configure"
#include "confdefs.h"
int main() {
} $ac_kw foo() {
; return 0; }
EOF
-if { (eval echo configure:3942: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+if { (eval echo configure:3966: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
rm -rf conftest*
ac_cv_c_inline=$ac_kw; break
else
@@ -3964,12 +3988,12 @@ EOF
esac
echo $ac_n "checking for off_t""... $ac_c" 1>&6
-echo "configure:3968: checking for off_t" >&5
+echo "configure:3992: checking for off_t" >&5
if eval "test \"`echo '$''{'ac_cv_type_off_t'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 3973 "configure"
+#line 3997 "configure"
#include "confdefs.h"
#include <sys/types.h>
#if STDC_HEADERS
@@ -3997,12 +4021,12 @@ EOF
fi
echo $ac_n "checking for size_t""... $ac_c" 1>&6
-echo "configure:4001: checking for size_t" >&5
+echo "configure:4025: checking for size_t" >&5
if eval "test \"`echo '$''{'ac_cv_type_size_t'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 4006 "configure"
+#line 4030 "configure"
#include "confdefs.h"
#include <sys/types.h>
#if STDC_HEADERS
@@ -4032,19 +4056,19 @@ fi
# The Ultrix 4.2 mips builtin alloca declared by alloca.h only works
# for constant arguments. Useless!
echo $ac_n "checking for working alloca.h""... $ac_c" 1>&6
-echo "configure:4036: checking for working alloca.h" >&5
+echo "configure:4060: checking for working alloca.h" >&5
if eval "test \"`echo '$''{'ac_cv_header_alloca_h'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 4041 "configure"
+#line 4065 "configure"
#include "confdefs.h"
#include <alloca.h>
int main() {
char *p = alloca(2 * sizeof(int));
; return 0; }
EOF
-if { (eval echo configure:4048: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:4072: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
ac_cv_header_alloca_h=yes
else
@@ -4065,12 +4089,12 @@ EOF
fi
echo $ac_n "checking for alloca""... $ac_c" 1>&6
-echo "configure:4069: checking for alloca" >&5
+echo "configure:4093: checking for alloca" >&5
if eval "test \"`echo '$''{'ac_cv_func_alloca_works'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 4074 "configure"
+#line 4098 "configure"
#include "confdefs.h"
#ifdef __GNUC__
@@ -4098,7 +4122,7 @@ int main() {
char *p = (char *) alloca(1);
; return 0; }
EOF
-if { (eval echo configure:4102: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:4126: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
ac_cv_func_alloca_works=yes
else
@@ -4130,12 +4154,12 @@ EOF
echo $ac_n "checking whether alloca needs Cray hooks""... $ac_c" 1>&6
-echo "configure:4134: checking whether alloca needs Cray hooks" >&5
+echo "configure:4158: checking whether alloca needs Cray hooks" >&5
if eval "test \"`echo '$''{'ac_cv_os_cray'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 4139 "configure"
+#line 4163 "configure"
#include "confdefs.h"
#if defined(CRAY) && ! defined(CRAY2)
webecray
@@ -4160,12 +4184,12 @@ echo "$ac_t""$ac_cv_os_cray" 1>&6
if test $ac_cv_os_cray = yes; then
for ac_func in _getb67 GETB67 getb67; do
echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:4164: checking for $ac_func" >&5
+echo "configure:4188: checking for $ac_func" >&5
if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 4169 "configure"
+#line 4193 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
@@ -4188,7 +4212,7 @@ $ac_func();
; return 0; }
EOF
-if { (eval echo configure:4192: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:4216: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else
@@ -4215,7 +4239,7 @@ done
fi
echo $ac_n "checking stack direction for C alloca""... $ac_c" 1>&6
-echo "configure:4219: checking stack direction for C alloca" >&5
+echo "configure:4243: checking stack direction for C alloca" >&5
if eval "test \"`echo '$''{'ac_cv_c_stack_direction'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -4223,7 +4247,7 @@ else
ac_cv_c_stack_direction=0
else
cat > conftest.$ac_ext <<EOF
-#line 4227 "configure"
+#line 4251 "configure"
#include "confdefs.h"
find_stack_direction ()
{
@@ -4242,7 +4266,7 @@ main ()
exit (find_stack_direction() < 0);
}
EOF
-if { (eval echo configure:4246: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
+if { (eval echo configure:4270: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
then
ac_cv_c_stack_direction=1
else
@@ -4267,17 +4291,17 @@ for ac_hdr in unistd.h
do
ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:4271: checking for $ac_hdr" >&5
+echo "configure:4295: checking for $ac_hdr" >&5
if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 4276 "configure"
+#line 4300 "configure"
#include "confdefs.h"
#include <$ac_hdr>
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:4281: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:4305: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
if test -z "$ac_err"; then
rm -rf conftest*
@@ -4306,12 +4330,12 @@ done
for ac_func in getpagesize
do
echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:4310: checking for $ac_func" >&5
+echo "configure:4334: checking for $ac_func" >&5
if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 4315 "configure"
+#line 4339 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
@@ -4334,7 +4358,7 @@ $ac_func();
; return 0; }
EOF
-if { (eval echo configure:4338: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:4362: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else
@@ -4359,7 +4383,7 @@ fi
done
echo $ac_n "checking for working mmap""... $ac_c" 1>&6
-echo "configure:4363: checking for working mmap" >&5
+echo "configure:4387: checking for working mmap" >&5
if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -4367,7 +4391,7 @@ else
ac_cv_func_mmap_fixed_mapped=no
else
cat > conftest.$ac_ext <<EOF
-#line 4371 "configure"
+#line 4395 "configure"
#include "confdefs.h"
/* Thanks to Mike Haertel and Jim Avera for this test.
@@ -4507,7 +4531,7 @@ main()
}
EOF
-if { (eval echo configure:4511: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
+if { (eval echo configure:4535: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
then
ac_cv_func_mmap_fixed_mapped=yes
else
@@ -4535,17 +4559,17 @@ unistd.h values.h sys/param.h
do
ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:4539: checking for $ac_hdr" >&5
+echo "configure:4563: checking for $ac_hdr" >&5
if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 4544 "configure"
+#line 4568 "configure"
#include "confdefs.h"
#include <$ac_hdr>
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:4549: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:4573: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
if test -z "$ac_err"; then
rm -rf conftest*
@@ -4575,12 +4599,12 @@ done
__argz_count __argz_stringify __argz_next
do
echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:4579: checking for $ac_func" >&5
+echo "configure:4603: checking for $ac_func" >&5
if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 4584 "configure"
+#line 4608 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
@@ -4603,7 +4627,7 @@ $ac_func();
; return 0; }
EOF
-if { (eval echo configure:4607: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:4631: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else
@@ -4632,12 +4656,12 @@ done
for ac_func in stpcpy
do
echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:4636: checking for $ac_func" >&5
+echo "configure:4660: checking for $ac_func" >&5
if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 4641 "configure"
+#line 4665 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
@@ -4660,7 +4684,7 @@ $ac_func();
; return 0; }
EOF
-if { (eval echo configure:4664: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:4688: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else
@@ -4694,19 +4718,19 @@ EOF
if test $ac_cv_header_locale_h = yes; then
echo $ac_n "checking for LC_MESSAGES""... $ac_c" 1>&6
-echo "configure:4698: checking for LC_MESSAGES" >&5
+echo "configure:4722: checking for LC_MESSAGES" >&5
if eval "test \"`echo '$''{'am_cv_val_LC_MESSAGES'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 4703 "configure"
+#line 4727 "configure"
#include "confdefs.h"
#include <locale.h>
int main() {
return LC_MESSAGES
; return 0; }
EOF
-if { (eval echo configure:4710: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:4734: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
am_cv_val_LC_MESSAGES=yes
else
@@ -4727,7 +4751,7 @@ EOF
fi
fi
echo $ac_n "checking whether NLS is requested""... $ac_c" 1>&6
-echo "configure:4731: checking whether NLS is requested" >&5
+echo "configure:4755: checking whether NLS is requested" >&5
# Check whether --enable-nls or --disable-nls was given.
if test "${enable_nls+set}" = set; then
enableval="$enable_nls"
@@ -4747,7 +4771,7 @@ fi
EOF
echo $ac_n "checking whether included gettext is requested""... $ac_c" 1>&6
-echo "configure:4751: checking whether included gettext is requested" >&5
+echo "configure:4775: checking whether included gettext is requested" >&5
# Check whether --with-included-gettext or --without-included-gettext was given.
if test "${with_included_gettext+set}" = set; then
withval="$with_included_gettext"
@@ -4766,17 +4790,17 @@ fi
ac_safe=`echo "libintl.h" | sed 'y%./+-%__p_%'`
echo $ac_n "checking for libintl.h""... $ac_c" 1>&6
-echo "configure:4770: checking for libintl.h" >&5
+echo "configure:4794: checking for libintl.h" >&5
if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 4775 "configure"
+#line 4799 "configure"
#include "confdefs.h"
#include <libintl.h>
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:4780: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:4804: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
if test -z "$ac_err"; then
rm -rf conftest*
@@ -4793,19 +4817,19 @@ fi
if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
echo "$ac_t""yes" 1>&6
echo $ac_n "checking for gettext in libc""... $ac_c" 1>&6
-echo "configure:4797: checking for gettext in libc" >&5
+echo "configure:4821: checking for gettext in libc" >&5
if eval "test \"`echo '$''{'gt_cv_func_gettext_libc'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 4802 "configure"
+#line 4826 "configure"
#include "confdefs.h"
#include <libintl.h>
int main() {
return (int) gettext ("")
; return 0; }
EOF
-if { (eval echo configure:4809: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:4833: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
gt_cv_func_gettext_libc=yes
else
@@ -4821,7 +4845,7 @@ echo "$ac_t""$gt_cv_func_gettext_libc" 1>&6
if test "$gt_cv_func_gettext_libc" != "yes"; then
echo $ac_n "checking for bindtextdomain in -lintl""... $ac_c" 1>&6
-echo "configure:4825: checking for bindtextdomain in -lintl" >&5
+echo "configure:4849: checking for bindtextdomain in -lintl" >&5
ac_lib_var=`echo intl'_'bindtextdomain | sed 'y%./+-%__p_%'`
if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
@@ -4829,7 +4853,7 @@ else
ac_save_LIBS="$LIBS"
LIBS="-lintl $LIBS"
cat > conftest.$ac_ext <<EOF
-#line 4833 "configure"
+#line 4857 "configure"
#include "confdefs.h"
/* Override any gcc2 internal prototype to avoid an error. */
/* We use char because int might match the return type of a gcc2
@@ -4840,7 +4864,7 @@ int main() {
bindtextdomain()
; return 0; }
EOF
-if { (eval echo configure:4844: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:4868: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
eval "ac_cv_lib_$ac_lib_var=yes"
else
@@ -4856,19 +4880,19 @@ fi
if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then
echo "$ac_t""yes" 1>&6
echo $ac_n "checking for gettext in libintl""... $ac_c" 1>&6
-echo "configure:4860: checking for gettext in libintl" >&5
+echo "configure:4884: checking for gettext in libintl" >&5
if eval "test \"`echo '$''{'gt_cv_func_gettext_libintl'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 4865 "configure"
+#line 4889 "configure"
#include "confdefs.h"
int main() {
return (int) gettext ("")
; return 0; }
EOF
-if { (eval echo configure:4872: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:4896: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
gt_cv_func_gettext_libintl=yes
else
@@ -4896,7 +4920,7 @@ EOF
# Extract the first word of "msgfmt", so it can be a program name with args.
set dummy msgfmt; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4900: checking for $ac_word" >&5
+echo "configure:4924: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_path_MSGFMT'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -4930,12 +4954,12 @@ fi
for ac_func in dcgettext
do
echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:4934: checking for $ac_func" >&5
+echo "configure:4958: checking for $ac_func" >&5
if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 4939 "configure"
+#line 4963 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
@@ -4958,7 +4982,7 @@ $ac_func();
; return 0; }
EOF
-if { (eval echo configure:4962: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:4986: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else
@@ -4985,7 +5009,7 @@ done
# Extract the first word of "gmsgfmt", so it can be a program name with args.
set dummy gmsgfmt; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4989: checking for $ac_word" >&5
+echo "configure:5013: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_path_GMSGFMT'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -5021,7 +5045,7 @@ fi
# Extract the first word of "xgettext", so it can be a program name with args.
set dummy xgettext; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5025: checking for $ac_word" >&5
+echo "configure:5049: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_path_XGETTEXT'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -5053,7 +5077,7 @@ else
fi
cat > conftest.$ac_ext <<EOF
-#line 5057 "configure"
+#line 5081 "configure"
#include "confdefs.h"
int main() {
@@ -5061,7 +5085,7 @@ extern int _nl_msg_cat_cntr;
return _nl_msg_cat_cntr
; return 0; }
EOF
-if { (eval echo configure:5065: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:5089: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
CATOBJEXT=.gmo
DATADIRNAME=share
@@ -5093,7 +5117,7 @@ fi
# Extract the first word of "msgfmt", so it can be a program name with args.
set dummy msgfmt; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5097: checking for $ac_word" >&5
+echo "configure:5121: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_path_MSGFMT'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -5127,7 +5151,7 @@ fi
# Extract the first word of "gmsgfmt", so it can be a program name with args.
set dummy gmsgfmt; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5131: checking for $ac_word" >&5
+echo "configure:5155: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_path_GMSGFMT'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -5163,7 +5187,7 @@ fi
# Extract the first word of "xgettext", so it can be a program name with args.
set dummy xgettext; ac_word=$2
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5167: checking for $ac_word" >&5
+echo "configure:5191: checking for $ac_word" >&5
if eval "test \"`echo '$''{'ac_cv_path_XGETTEXT'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -5253,7 +5277,7 @@ fi
LINGUAS=
else
echo $ac_n "checking for catalogs to be installed""... $ac_c" 1>&6
-echo "configure:5257: checking for catalogs to be installed" >&5
+echo "configure:5281: checking for catalogs to be installed" >&5
NEW_LINGUAS=
for lang in ${LINGUAS=$ALL_LINGUAS}; do
case "$ALL_LINGUAS" in
@@ -5281,17 +5305,17 @@ echo "configure:5257: checking for catalogs to be installed" >&5
if test "$CATOBJEXT" = ".cat"; then
ac_safe=`echo "linux/version.h" | sed 'y%./+-%__p_%'`
echo $ac_n "checking for linux/version.h""... $ac_c" 1>&6
-echo "configure:5285: checking for linux/version.h" >&5
+echo "configure:5309: checking for linux/version.h" >&5
if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 5290 "configure"
+#line 5314 "configure"
#include "confdefs.h"
#include <linux/version.h>
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:5295: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:5319: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
if test -z "$ac_err"; then
rm -rf conftest*
@@ -5354,7 +5378,7 @@ fi
echo $ac_n "checking whether to enable maintainer-specific portions of Makefiles""... $ac_c" 1>&6
-echo "configure:5358: checking whether to enable maintainer-specific portions of Makefiles" >&5
+echo "configure:5382: checking whether to enable maintainer-specific portions of Makefiles" >&5
# Check whether --enable-maintainer-mode or --disable-maintainer-mode was given.
if test "${enable_maintainer_mode+set}" = set; then
enableval="$enable_maintainer_mode"
@@ -5379,7 +5403,7 @@ fi
echo $ac_n "checking for executable suffix""... $ac_c" 1>&6
-echo "configure:5383: checking for executable suffix" >&5
+echo "configure:5407: checking for executable suffix" >&5
if eval "test \"`echo '$''{'ac_cv_exeext'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -5389,7 +5413,7 @@ else
rm -f conftest*
echo 'int main () { return 0; }' > conftest.$ac_ext
ac_cv_exeext=
- if { (eval echo configure:5393: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
+ if { (eval echo configure:5417: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
for file in conftest.*; do
case $file in
*.c | *.o | *.obj | *.ilk | *.pdb) ;;
@@ -5414,17 +5438,17 @@ for ac_hdr in string.h stdlib.h memory.h strings.h unistd.h stdarg.h varargs.h e
do
ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:5418: checking for $ac_hdr" >&5
+echo "configure:5442: checking for $ac_hdr" >&5
if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 5423 "configure"
+#line 5447 "configure"
#include "confdefs.h"
#include <$ac_hdr>
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:5428: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:5452: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
if test -z "$ac_err"; then
rm -rf conftest*
@@ -5454,7 +5478,7 @@ done
# Put this here so that autoconf's "cross-compiling" message doesn't confuse
# people who are not cross-compiling but are compiling cross-assemblers.
echo $ac_n "checking whether compiling a cross-assembler""... $ac_c" 1>&6
-echo "configure:5458: checking whether compiling a cross-assembler" >&5
+echo "configure:5482: checking whether compiling a cross-assembler" >&5
if test "${host}" = "${target}"; then
cross_gas=no
else
@@ -5469,19 +5493,19 @@ echo "$ac_t""$cross_gas" 1>&6
# The Ultrix 4.2 mips builtin alloca declared by alloca.h only works
# for constant arguments. Useless!
echo $ac_n "checking for working alloca.h""... $ac_c" 1>&6
-echo "configure:5473: checking for working alloca.h" >&5
+echo "configure:5497: checking for working alloca.h" >&5
if eval "test \"`echo '$''{'ac_cv_header_alloca_h'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 5478 "configure"
+#line 5502 "configure"
#include "confdefs.h"
#include <alloca.h>
int main() {
char *p = alloca(2 * sizeof(int));
; return 0; }
EOF
-if { (eval echo configure:5485: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:5509: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
ac_cv_header_alloca_h=yes
else
@@ -5502,12 +5526,12 @@ EOF
fi
echo $ac_n "checking for alloca""... $ac_c" 1>&6
-echo "configure:5506: checking for alloca" >&5
+echo "configure:5530: checking for alloca" >&5
if eval "test \"`echo '$''{'ac_cv_func_alloca_works'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 5511 "configure"
+#line 5535 "configure"
#include "confdefs.h"
#ifdef __GNUC__
@@ -5535,7 +5559,7 @@ int main() {
char *p = (char *) alloca(1);
; return 0; }
EOF
-if { (eval echo configure:5539: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:5563: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
ac_cv_func_alloca_works=yes
else
@@ -5567,12 +5591,12 @@ EOF
echo $ac_n "checking whether alloca needs Cray hooks""... $ac_c" 1>&6
-echo "configure:5571: checking whether alloca needs Cray hooks" >&5
+echo "configure:5595: checking whether alloca needs Cray hooks" >&5
if eval "test \"`echo '$''{'ac_cv_os_cray'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 5576 "configure"
+#line 5600 "configure"
#include "confdefs.h"
#if defined(CRAY) && ! defined(CRAY2)
webecray
@@ -5597,12 +5621,12 @@ echo "$ac_t""$ac_cv_os_cray" 1>&6
if test $ac_cv_os_cray = yes; then
for ac_func in _getb67 GETB67 getb67; do
echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:5601: checking for $ac_func" >&5
+echo "configure:5625: checking for $ac_func" >&5
if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 5606 "configure"
+#line 5630 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
@@ -5625,7 +5649,7 @@ $ac_func();
; return 0; }
EOF
-if { (eval echo configure:5629: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:5653: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else
@@ -5652,7 +5676,7 @@ done
fi
echo $ac_n "checking stack direction for C alloca""... $ac_c" 1>&6
-echo "configure:5656: checking stack direction for C alloca" >&5
+echo "configure:5680: checking stack direction for C alloca" >&5
if eval "test \"`echo '$''{'ac_cv_c_stack_direction'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -5660,7 +5684,7 @@ else
ac_cv_c_stack_direction=0
else
cat > conftest.$ac_ext <<EOF
-#line 5664 "configure"
+#line 5688 "configure"
#include "confdefs.h"
find_stack_direction ()
{
@@ -5679,7 +5703,7 @@ main ()
exit (find_stack_direction() < 0);
}
EOF
-if { (eval echo configure:5683: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
+if { (eval echo configure:5707: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
then
ac_cv_c_stack_direction=1
else
@@ -5701,21 +5725,21 @@ EOF
fi
echo $ac_n "checking for inline""... $ac_c" 1>&6
-echo "configure:5705: checking for inline" >&5
+echo "configure:5729: checking for inline" >&5
if eval "test \"`echo '$''{'ac_cv_c_inline'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
ac_cv_c_inline=no
for ac_kw in inline __inline__ __inline; do
cat > conftest.$ac_ext <<EOF
-#line 5712 "configure"
+#line 5736 "configure"
#include "confdefs.h"
int main() {
} $ac_kw foo() {
; return 0; }
EOF
-if { (eval echo configure:5719: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+if { (eval echo configure:5743: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
rm -rf conftest*
ac_cv_c_inline=$ac_kw; break
else
@@ -5745,12 +5769,12 @@ esac
for ac_func in unlink remove
do
echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:5749: checking for $ac_func" >&5
+echo "configure:5773: checking for $ac_func" >&5
if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 5754 "configure"
+#line 5778 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
@@ -5773,7 +5797,7 @@ $ac_func();
; return 0; }
EOF
-if { (eval echo configure:5777: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:5801: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else
@@ -5802,12 +5826,12 @@ done
for ac_func in sbrk
do
echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:5806: checking for $ac_func" >&5
+echo "configure:5830: checking for $ac_func" >&5
if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 5811 "configure"
+#line 5835 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
@@ -5830,7 +5854,7 @@ $ac_func();
; return 0; }
EOF
-if { (eval echo configure:5834: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:5858: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else
@@ -5865,7 +5889,7 @@ case $host in
;;
*-ncr-sysv4.3*)
echo $ac_n "checking for _mwvalidcheckl in -lmw""... $ac_c" 1>&6
-echo "configure:5869: checking for _mwvalidcheckl in -lmw" >&5
+echo "configure:5893: checking for _mwvalidcheckl in -lmw" >&5
ac_lib_var=`echo mw'_'_mwvalidcheckl | sed 'y%./+-%__p_%'`
if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
@@ -5873,7 +5897,7 @@ else
ac_save_LIBS="$LIBS"
LIBS="-lmw $LIBS"
cat > conftest.$ac_ext <<EOF
-#line 5877 "configure"
+#line 5901 "configure"
#include "confdefs.h"
/* Override any gcc2 internal prototype to avoid an error. */
/* We use char because int might match the return type of a gcc2
@@ -5884,7 +5908,7 @@ int main() {
_mwvalidcheckl()
; return 0; }
EOF
-if { (eval echo configure:5888: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:5912: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
eval "ac_cv_lib_$ac_lib_var=yes"
else
@@ -5905,7 +5929,7 @@ else
fi
echo $ac_n "checking for main in -lm""... $ac_c" 1>&6
-echo "configure:5909: checking for main in -lm" >&5
+echo "configure:5933: checking for main in -lm" >&5
ac_lib_var=`echo m'_'main | sed 'y%./+-%__p_%'`
if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
@@ -5913,14 +5937,14 @@ else
ac_save_LIBS="$LIBS"
LIBS="-lm $LIBS"
cat > conftest.$ac_ext <<EOF
-#line 5917 "configure"
+#line 5941 "configure"
#include "confdefs.h"
int main() {
main()
; return 0; }
EOF
-if { (eval echo configure:5924: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:5948: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
eval "ac_cv_lib_$ac_lib_var=yes"
else
@@ -5943,7 +5967,7 @@ fi
;;
*)
echo $ac_n "checking for main in -lm""... $ac_c" 1>&6
-echo "configure:5947: checking for main in -lm" >&5
+echo "configure:5971: checking for main in -lm" >&5
ac_lib_var=`echo m'_'main | sed 'y%./+-%__p_%'`
if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
@@ -5951,14 +5975,14 @@ else
ac_save_LIBS="$LIBS"
LIBS="-lm $LIBS"
cat > conftest.$ac_ext <<EOF
-#line 5955 "configure"
+#line 5979 "configure"
#include "confdefs.h"
int main() {
main()
; return 0; }
EOF
-if { (eval echo configure:5962: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:5986: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
eval "ac_cv_lib_$ac_lib_var=yes"
else
@@ -5989,12 +6013,12 @@ esac
# enough, but on some of those systems, the assert macro relies on requoting
# working properly!
echo $ac_n "checking for working assert macro""... $ac_c" 1>&6
-echo "configure:5993: checking for working assert macro" >&5
+echo "configure:6017: checking for working assert macro" >&5
if eval "test \"`echo '$''{'gas_cv_assert_ok'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 5998 "configure"
+#line 6022 "configure"
#include "confdefs.h"
#include <assert.h>
#include <stdio.h>
@@ -6010,7 +6034,7 @@ assert (a == b
; return 0; }
EOF
-if { (eval echo configure:6014: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:6038: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
gas_cv_assert_ok=yes
else
@@ -6051,12 +6075,12 @@ gas_test_headers="
"
echo $ac_n "checking whether declaration is required for strstr""... $ac_c" 1>&6
-echo "configure:6055: checking whether declaration is required for strstr" >&5
+echo "configure:6079: checking whether declaration is required for strstr" >&5
if eval "test \"`echo '$''{'gas_cv_decl_needed_strstr'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 6060 "configure"
+#line 6084 "configure"
#include "confdefs.h"
$gas_test_headers
int main() {
@@ -6067,7 +6091,7 @@ x = (f) strstr;
; return 0; }
EOF
-if { (eval echo configure:6071: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:6095: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
gas_cv_decl_needed_strstr=no
else
@@ -6088,12 +6112,12 @@ fi
echo $ac_n "checking whether declaration is required for malloc""... $ac_c" 1>&6
-echo "configure:6092: checking whether declaration is required for malloc" >&5
+echo "configure:6116: checking whether declaration is required for malloc" >&5
if eval "test \"`echo '$''{'gas_cv_decl_needed_malloc'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 6097 "configure"
+#line 6121 "configure"
#include "confdefs.h"
$gas_test_headers
int main() {
@@ -6104,7 +6128,7 @@ x = (f) malloc;
; return 0; }
EOF
-if { (eval echo configure:6108: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:6132: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
gas_cv_decl_needed_malloc=no
else
@@ -6125,12 +6149,12 @@ fi
echo $ac_n "checking whether declaration is required for free""... $ac_c" 1>&6
-echo "configure:6129: checking whether declaration is required for free" >&5
+echo "configure:6153: checking whether declaration is required for free" >&5
if eval "test \"`echo '$''{'gas_cv_decl_needed_free'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 6134 "configure"
+#line 6158 "configure"
#include "confdefs.h"
$gas_test_headers
int main() {
@@ -6141,7 +6165,7 @@ x = (f) free;
; return 0; }
EOF
-if { (eval echo configure:6145: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:6169: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
gas_cv_decl_needed_free=no
else
@@ -6162,12 +6186,12 @@ fi
echo $ac_n "checking whether declaration is required for sbrk""... $ac_c" 1>&6
-echo "configure:6166: checking whether declaration is required for sbrk" >&5
+echo "configure:6190: checking whether declaration is required for sbrk" >&5
if eval "test \"`echo '$''{'gas_cv_decl_needed_sbrk'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 6171 "configure"
+#line 6195 "configure"
#include "confdefs.h"
$gas_test_headers
int main() {
@@ -6178,7 +6202,7 @@ x = (f) sbrk;
; return 0; }
EOF
-if { (eval echo configure:6182: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:6206: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
gas_cv_decl_needed_sbrk=no
else
@@ -6199,12 +6223,12 @@ fi
echo $ac_n "checking whether declaration is required for environ""... $ac_c" 1>&6
-echo "configure:6203: checking whether declaration is required for environ" >&5
+echo "configure:6227: checking whether declaration is required for environ" >&5
if eval "test \"`echo '$''{'gas_cv_decl_needed_environ'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 6208 "configure"
+#line 6232 "configure"
#include "confdefs.h"
$gas_test_headers
int main() {
@@ -6215,7 +6239,7 @@ x = (f) environ;
; return 0; }
EOF
-if { (eval echo configure:6219: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:6243: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
gas_cv_decl_needed_environ=no
else
@@ -6239,12 +6263,12 @@ fi
# for it?
echo $ac_n "checking whether declaration is required for errno""... $ac_c" 1>&6
-echo "configure:6243: checking whether declaration is required for errno" >&5
+echo "configure:6267: checking whether declaration is required for errno" >&5
if eval "test \"`echo '$''{'gas_cv_decl_needed_errno'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 6248 "configure"
+#line 6272 "configure"
#include "confdefs.h"
#ifdef HAVE_ERRNO_H
@@ -6259,7 +6283,7 @@ x = (f) errno;
; return 0; }
EOF
-if { (eval echo configure:6263: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:6287: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
gas_cv_decl_needed_errno=no
else
diff --git a/gas/configure.in b/gas/configure.in
index 146822db9e..cb3e2820f0 100644
--- a/gas/configure.in
+++ b/gas/configure.in
@@ -153,6 +153,7 @@ changequote([,])dnl
sparc86x*) cpu_type=sparc arch=sparc86x ;;
sparc*) cpu_type=sparc arch=sparclite ;; # ??? See tc-sparc.c.
v850*) cpu_type=v850 ;;
+ xtensa*) cpu_type=xtensa arch=xtensa ;;
*) cpu_type=${cpu} ;;
esac
@@ -482,6 +483,8 @@ changequote([,])dnl
xstormy16-*-*) fmt=elf ;;
+ xtensa-*-*) fmt=elf ;;
+
z8k-*-coff | z8k-*-sim) fmt=coff ;;
*-*-aout | *-*-scout) fmt=aout ;;
@@ -648,6 +651,13 @@ changequote([,])dnl
using_cgen=yes
;;
+ xtensa)
+ echo ${extra_objects} | grep -s "xtensa-relax.o"
+ if test $? -ne 0 ; then
+ extra_objects="$extra_objects xtensa-relax.o"
+ fi
+ ;;
+
*)
;;
esac
diff --git a/gas/doc/Makefile.am b/gas/doc/Makefile.am
index 5dbab7af38..1e8acbccb8 100644
--- a/gas/doc/Makefile.am
+++ b/gas/doc/Makefile.am
@@ -55,6 +55,7 @@ CPU_DOCS = \
c-tic54x.texi \
c-vax.texi \
c-v850.texi \
+ c-xtensa.texi \
c-z8k.texi
gasver.texi: Makefile
diff --git a/gas/doc/Makefile.in b/gas/doc/Makefile.in
index 576c5e60e4..6b8a4e4da9 100644
--- a/gas/doc/Makefile.in
+++ b/gas/doc/Makefile.in
@@ -167,6 +167,7 @@ CPU_DOCS = \
c-tic54x.texi \
c-vax.texi \
c-v850.texi \
+ c-xtensa.texi \
c-z8k.texi
diff --git a/gas/doc/all.texi b/gas/doc/all.texi
index 30f02db86e..4e302cea1f 100644
--- a/gas/doc/all.texi
+++ b/gas/doc/all.texi
@@ -58,6 +58,7 @@
@set V850
@set VAX
@set VXWORKS
+@set XTENSA
@set Z8000
@c Does this version of the assembler use the difference-table kluge?
diff --git a/gas/doc/as.texinfo b/gas/doc/as.texinfo
index 41867f6b10..5f95c966e8 100644
--- a/gas/doc/as.texinfo
+++ b/gas/doc/as.texinfo
@@ -59,6 +59,7 @@
@set TIC54X
@set V850
@set VAX
+@set XTENSA
@end ifset
@c man end
@c common OR combinations of conditions
@@ -449,6 +450,13 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}.
@ifset Z8000
@c Z8000 has no machine-dependent assembler options
@end ifset
+@ifset XTENSA
+
+@emph{Target Xtensa options:}
+ [@b{--[no-]density}] [@b{--[no-]relax}] [@b{--[no-]generics}]
+ [@b{--[no-]text-section-literals}]
+ [@b{--[no-]target-align}] [@b{--[no-]longcalls}]
+@end ifset
@c man end
@end smallexample
@@ -1057,6 +1065,45 @@ Assemble for a little endian target.
See the info pages for documentation of the MMIX-specific options.
@end ifset
+@ifset XTENSA
+The following options are available when @value{AS} is configured for
+an Xtensa processor.
+
+@table @gcctabopt
+@item --density | --no-density
+Enable or disable use of instructions from the Xtensa code density
+option. This is enabled by default when the Xtensa processor supports
+the code density option.
+
+@item --relax | --no-relax
+Enable or disable instruction relaxation. This is enabled by default.
+Note: In the current implementation, these options also control whether
+assembler optimizations are performed, making these options equivalent
+to @option{--generics} and @option{--no-generics}.
+
+@item --generics | --no-generics
+Enable or disable all assembler transformations of Xtensa instructions.
+The default is @option{--generics};
+@option{--no-generics} should be used only in the rare cases when the
+instructions must be exactly as specified in the assembly source.
+
+@item --text-section-literals | --no-text-section-literals
+With @option{--text-@-section-@-literals}, literal pools are interspersed
+in the text section. The default is
+@option{--no-@-text-@-section-@-literals}, which places literals in a
+separate section in the output file.
+
+@item --target-align | --no-target-align
+Enable or disable automatic alignment to reduce branch penalties at the
+expense of some code density. The default is @option{--target-@-align}.
+
+@item --longcalls | --no-longcalls
+Enable or disable transformation of call instructions to allow calls
+across a greater range of addresses. The default is
+@option{--no-@-longcalls}.
+@end table
+@end ifset
+
@c man end
@menu
@@ -2068,6 +2115,9 @@ is considered a comment and is ignored. The line comment character is
@ifset V850
@samp{#} on the V850;
@end ifset
+@ifset XTENSA
+@samp{#} for Xtensa systems;
+@end ifset
see @ref{Machine Dependencies}. @refill
@c FIXME What about i860?
@@ -3834,7 +3884,7 @@ required alignment; this can be useful if you want the alignment to be filled
with no-op instructions when appropriate.
The way the required alignment is specified varies from system to system.
-For the a29k, hppa, m68k, m88k, w65, sparc, and Hitachi SH, and i386 using ELF
+For the a29k, hppa, m68k, m88k, w65, sparc, Xtensa, and Hitachi SH, and i386 using ELF
format,
the first expression is the
alignment request in bytes. For example @samp{.align 8} advances
@@ -5865,6 +5915,9 @@ subject, see the hardware manufacturer's manual.
@ifset V850
* V850-Dependent:: V850 Dependent Features
@end ifset
+@ifset XTENSA
+* Xtensa-Dependent:: Xtensa Dependent Features
+@end ifset
@ifset Z8000
* Z8000-Dependent:: Z8000 Dependent Features
@end ifset
@@ -6036,6 +6089,10 @@ family.
@include c-v850.texi
@end ifset
+@ifset XTENSA
+@include c-xtensa.texi
+@end ifset
+
@ifset GENERIC
@c reverse effect of @down at top of generic Machine-Dep chapter
@raisesections
@@ -6330,6 +6387,9 @@ support for openVMS/Alpha.
Timothy Wall, Michael Hayes, and Greg Smart contributed to the various tic*
flavors.
+David Heine, Sterling Augustine, Bob Wilson and John Ruttenberg from Tensilica,
+Inc. added support for Xtensa processors.
+
Several engineers at Cygnus Support have also provided many small bug fixes and
configuration enhancements.
diff --git a/gas/doc/c-xtensa.texi b/gas/doc/c-xtensa.texi
new file mode 100644
index 0000000000..69a3d819af
--- /dev/null
+++ b/gas/doc/c-xtensa.texi
@@ -0,0 +1,740 @@
+@c Copyright (C) 2002 Free Software Foundation, Inc.
+@c This is part of the GAS manual.
+@c For copying conditions, see the file as.texinfo.
+@c
+@ifset GENERIC
+@page
+@node Xtensa-Dependent
+@chapter Xtensa Dependent Features
+@end ifset
+@ifclear GENERIC
+@node Machine Dependencies
+@chapter Xtensa Dependent Features
+@end ifclear
+
+@cindex Xtensa architecture
+This chapter covers features of the @sc{gnu} assembler that are specific
+to the Xtensa architecture. For details about the Xtensa instruction
+set, please consult the @cite{Xtensa Instruction Set Architecture (ISA)
+Reference Manual}.
+
+@menu
+* Xtensa Options:: Command-line Options.
+* Xtensa Syntax:: Assembler Syntax for Xtensa Processors.
+* Xtensa Optimizations:: Assembler Optimizations.
+* Xtensa Relaxation:: Other Automatic Transformations.
+* Xtensa Directives:: Directives for Xtensa Processors.
+@end menu
+
+@node Xtensa Options
+@section Command Line Options
+
+The Xtensa version of the @sc{gnu} assembler supports these
+special options:
+
+@table @code
+@item --density | --no-density
+@kindex --density
+@kindex --no-density
+@cindex Xtensa density option
+@cindex density option, Xtensa
+Enable or disable use of the Xtensa code density option (16-bit
+instructions). @xref{Density Instructions, ,Using Density
+Instructions}. If the processor is configured with the density option,
+this is enabled by default; otherwise, it is always disabled.
+
+@item --relax | --no-relax
+@kindex --relax
+@kindex --no-relax
+Enable or disable relaxation of instructions with immediate operands
+that are outside the legal range for the instructions. @xref{Xtensa
+Relaxation, ,Xtensa Relaxation}. The default is @samp{--relax} and this
+default should almost always be used. If relaxation is disabled with
+@samp{--no-relax}, instruction operands that are out of range will cause
+errors. Note: In the current implementation, these options also control
+whether assembler optimizations are performed, making these options
+equivalent to @samp{--generics} and @samp{--no-generics}.
+
+@item --generics | --no-generics
+@kindex --generics
+@kindex --no-generics
+Enable or disable all assembler transformations of Xtensa instructions,
+including both relaxation and optimization. The default is
+@samp{--generics}; @samp{--no-generics} should only be used in the rare
+cases when the instructions must be exactly as specified in the assembly
+source.
+@c The @samp{--no-generics} option is like @samp{--no-relax}
+@c except that it also disables assembler optimizations (@pxref{Xtensa
+@c Optimizations}).
+As with @samp{--no-relax}, using @samp{--no-generics}
+causes out of range instruction operands to be errors.
+
+@item --text-section-literals | --no-text-section-literals
+@kindex --text-section-literals
+@kindex --no-text-section-literals
+Control the treatment of literal pools. The default is
+@samp{--no-@-text-@-section-@-literals}, which places literals in a
+separate section in the output file. This allows the literal pool to be
+placed in a data RAM/ROM, and it also allows the linker to combine literal
+pools from separate object files to remove redundant literals and
+improve code size. With @samp{--text-@-section-@-literals}, the
+literals are interspersed in the text section in order to keep them as
+close as possible to their references. This may be necessary for large
+assembly files.
+
+@item --target-align | --no-target-align
+@kindex --target-align
+@kindex --no-target-align
+Enable or disable automatic alignment to reduce branch penalties at some
+expense in code size. @xref{Xtensa Automatic Alignment, ,Automatic
+Instruction Alignment}. This optimization is enabled by default. Note
+that the assembler will always align instructions like @code{LOOP} that
+have fixed alignment requirements.
+
+@item --longcalls | --no-longcalls
+@kindex --longcalls
+@kindex --no-longcalls
+Enable or disable transformation of call instructions to allow calls
+across a greater range of addresses. @xref{Xtensa Call Relaxation,
+,Function Call Relaxation}. This option should be used when call
+targets can potentially be out of range, but it degrades both code size
+and performance. The default is @samp{--no-@-longcalls}.
+@end table
+
+@node Xtensa Syntax
+@section Assembler Syntax
+@cindex syntax, Xtensa assembler
+@cindex Xtensa assembler syntax
+
+Block comments are delimited by @samp{/*} and @samp{*/}. End of line
+comments may be introduced with either @samp{#} or @samp{//}.
+
+Instructions consist of a leading opcode or macro name followed by
+whitespace and an optional comma-separated list of operands:
+
+@smallexample
+@var{opcode} [@var{operand},@dots{}]
+@end smallexample
+
+Instructions must be separated by a newline or semicolon.
+
+@menu
+* Xtensa Opcodes:: Opcode Naming Conventions.
+* Xtensa Registers:: Register Naming.
+@end menu
+
+@node Xtensa Opcodes
+@subsection Opcode Names
+@cindex Xtensa opcode names
+@cindex opcode names, Xtenxa
+
+See the @cite{Xtensa Instruction Set Architecture (ISA) Reference
+Manual} for a complete list of opcodes and descriptions of their
+semantics.
+
+@cindex generic opcodes
+@cindex specific opcodes
+@cindex _ opcode prefix
+The Xtensa assembler distinguishes between @dfn{generic} and
+@dfn{specific} opcodes. Specific opcodes correspond directly to Xtensa
+machine instructions. Prefixing an opcode with an underscore character
+(@samp{_}) identifies it as a specific opcode. Opcodes without a
+leading underscore are generic, which means the assembler is required to
+preserve their semantics but may not translate them directly to the
+specific opcodes with the same names. Instead, the assembler may
+optimize a generic opcode and select a better instruction to use in its
+place (@pxref{Xtensa Optimizations, ,Xtensa Optimizations}), or the
+assembler may relax the instruction to handle operands that are out of
+range for the corresponding specific opcode (@pxref{Xtensa Relaxation,
+,Xtensa Relaxation}).
+
+Only use specific opcodes when it is essential to select
+the exact machine instructions produced by the assembler.
+Using specific opcodes unnecessarily only makes the code less
+efficient, by disabling assembler optimization, and less flexible, by
+disabling relaxation.
+
+Note that this special handling of underscore prefixes only applies to
+Xtensa opcodes, not to either built-in macros or user-defined macros.
+When an underscore prefix is used with a macro (e.g., @code{_NOP}), it
+refers to a different macro. The assembler generally provides built-in
+macros both with and without the underscore prefix, where the underscore
+versions behave as if the underscore carries through to the instructions
+in the macros. For example, @code{_NOP} expands to @code{_OR a1,a1,a1}.
+
+The underscore prefix only applies to individual instructions, not to
+series of instructions. For example, if a series of instructions have
+underscore prefixes, the assembler will not transform the individual
+instructions, but it may insert other instructions between them (e.g.,
+to align a @code{LOOP} instruction). To prevent the assembler from
+modifying a series of instructions as a whole, use the
+@code{no-generics} directive. @xref{Generics Directive, ,generics}.
+
+@node Xtensa Registers
+@subsection Register Names
+@cindex Xtensa register names
+@cindex register names, Xtensa
+@cindex sp register
+
+An initial @samp{$} character is optional in all register names.
+General purpose registers are named @samp{a0}@dots{}@samp{a15}. Additional
+registers may be added by processor configuration options. In
+particular, the @sc{mac16} option adds a @sc{mr} register bank. Its
+registers are named @samp{m0}@dots{}@samp{m3}.
+
+As a special feature, @samp{sp} is also supported as a synonym for
+@samp{a1}.
+
+@node Xtensa Optimizations
+@section Xtensa Optimizations
+@cindex optimizations
+
+The optimizations currently supported by @code{@value{AS}} are
+generation of density instructions where appropriate and automatic
+branch target alignment.
+
+@menu
+* Density Instructions:: Using Density Instructions.
+* Xtensa Automatic Alignment:: Automatic Instruction Alignment.
+@end menu
+
+@node Density Instructions
+@subsection Using Density Instructions
+@cindex density instructions
+
+The Xtensa instruction set has a code density option that provides
+16-bit versions of some of the most commonly used opcodes. Use of these
+opcodes can significantly reduce code size. When possible, the
+assembler automatically translates generic instructions from the core
+Xtensa instruction set into equivalent instructions from the Xtensa code
+density option. This translation can be disabled by using specific
+opcodes (@pxref{Xtensa Opcodes, ,Opcode Names}), by using the
+@samp{--no-density} command-line option (@pxref{Xtensa Options, ,Command
+Line Options}), or by using the @code{no-density} directive
+(@pxref{Density Directive, ,density}).
+
+It is a good idea @emph{not} to use the density instuctions directly.
+The assembler will automatically select dense instructions where
+possible. If you later need to avoid using the code density option, you
+can disable it in the assembler without having to modify the code.
+
+@node Xtensa Automatic Alignment
+@subsection Automatic Instruction Alignment
+@cindex alignment of @code{LOOP} instructions
+@cindex alignment of @code{ENTRY} instructions
+@cindex alignment of branch targets
+@cindex @code{LOOP} instructions, alignment
+@cindex @code{ENTRY} instructions, alignment
+@cindex branch target alignment
+
+The Xtensa assembler will automatically align certain instructions, both
+to optimize performance and to satisfy architectural requirements.
+
+When the @code{--target-@-align} command-line option is enabled
+(@pxref{Xtensa Options, ,Command Line Options}), the assembler attempts
+to widen density instructions preceding a branch target so that the
+target instruction does not cross a 4-byte boundary. Similarly, the
+assembler also attempts to align each instruction following a call
+instruction. If there are not enough preceding safe density
+instructions to align a target, no widening will be performed. This
+alignment has the potential to reduce branch penalties at some expense
+in code size. The assembler will not attempt to align labels with the
+prefixes @code{.Ln} and @code{.LM}, since these labels are used for
+debugging information and are not typically branch targets.
+
+The @code{LOOP} family of instructions must be aligned on either a 1 or
+2 mod 4 byte boundary. The assembler knows about this restriction and
+inserts the minimal number of 2 or 3 byte no-op instructions
+to satisfy it. When no-op instructions are added, any label immediately
+preceding the original loop will be moved in order to refer to the loop
+instruction, not the newly generated no-op instruction.
+
+Similarly, the @code{ENTRY} instruction must be aligned on a 0 mod 4
+byte boundary. The assembler satisfies this requirement by inserting
+zero bytes when required. In addition, labels immediately preceding the
+@code{ENTRY} instruction will be moved to the newly aligned instruction
+location.
+
+@node Xtensa Relaxation
+@section Xtensa Relaxation
+@cindex relaxation
+
+When an instruction operand is outside the range allowed for that
+particular instruction field, @code{@value{AS}} can transform the code
+to use a functionally-equivalent instruction or sequence of
+instructions. This process is known as @dfn{relaxation}. This is
+typically done for branch instructions because the distance of the
+branch targets is not known until assembly-time. The Xtensa assembler
+offers branch relaxation and also extends this concept to function
+calls, @code{MOVI} instructions and other instructions with immediate
+fields.
+
+@menu
+* Xtensa Branch Relaxation:: Relaxation of Branches.
+* Xtensa Call Relaxation:: Relaxation of Function Calls.
+* Xtensa Immediate Relaxation:: Relaxation of other Immediate Fields.
+@end menu
+
+@node Xtensa Branch Relaxation
+@subsection Conditional Branch Relaxation
+@cindex relaxation of branch instructions
+@cindex branch instructions, relaxation
+
+When the target of a branch is too far away from the branch itself,
+i.e., when the offset from the branch to the target is too large to fit
+in the immediate field of the branch instruction, it may be necessary to
+replace the branch with a branch around a jump. For example,
+
+@smallexample
+ beqz a2, L
+@end smallexample
+
+may result in:
+
+@smallexample
+ bnez.n a2, M
+ j L
+M:
+@end smallexample
+
+(The @code{BNEZ.N} instruction would be used in this example only if the
+density option is available. Otherwise, @code{BNEZ} would be used.)
+
+@node Xtensa Call Relaxation
+@subsection Function Call Relaxation
+@cindex relaxation of call instructions
+@cindex call instructions, relaxation
+
+Function calls may require relaxation because the Xtensa immediate call
+instructions (@code{CALL0}, @code{CALL4}, @code{CALL8} and
+@code{CALL12}) provide a PC-relative offset of only 512 Kbytes in either
+direction. For larger programs, it may be necessary to use indirect
+calls (@code{CALLX0}, @code{CALLX4}, @code{CALLX8} and @code{CALLX12})
+where the target address is specified in a register. The Xtensa
+assembler can automatically relax immediate call instructions into
+indirect call instructions. This relaxation is done by loading the
+address of the called function into the callee's return address register
+and then using a @code{CALLX} instruction. So, for example:
+
+@smallexample
+ call8 func
+@end smallexample
+
+might be relaxed to:
+
+@smallexample
+ .literal .L1, func
+ l32r a8, .L1
+ callx8 a8
+@end smallexample
+
+Because the addresses of targets of function calls are not generally
+known until link-time, the assembler must assume the worst and relax all
+the calls to functions in other source files, not just those that really
+will be out of range. The linker can recognize calls that were
+unnecessarily relaxed, but it can only partially remove the overhead
+introduced by the assembler.
+
+Call relaxation has a negative effect
+on both code size and performance, so this relaxation is disabled by
+default. If a program is too large and some of the calls are out of
+range, function call relaxation can be enabled using the
+@samp{--longcalls} command-line option or the @code{longcalls} directive
+(@pxref{Longcalls Directive, ,longcalls}).
+
+@node Xtensa Immediate Relaxation
+@subsection Other Immediate Field Relaxation
+@cindex immediate fields, relaxation
+@cindex relaxation of immediate fields
+
+@cindex @code{MOVI} instructions, relaxation
+@cindex relaxation of @code{MOVI} instructions
+The @code{MOVI} machine instruction can only materialize values in the
+range from -2048 to 2047. Values outside this range are best
+materalized with @code{L32R} instructions. Thus:
+
+@smallexample
+ movi a0, 100000
+@end smallexample
+
+is assembled into the following machine code:
+
+@smallexample
+ .literal .L1, 100000
+ l32r a0, .L1
+@end smallexample
+
+@cindex @code{L8UI} instructions, relaxation
+@cindex @code{L16SI} instructions, relaxation
+@cindex @code{L16UI} instructions, relaxation
+@cindex @code{L32I} instructions, relaxation
+@cindex relaxation of @code{L8UI} instructions
+@cindex relaxation of @code{L16SI} instructions
+@cindex relaxation of @code{L16UI} instructions
+@cindex relaxation of @code{L32I} instructions
+The @code{L8UI} machine instruction can only be used with immediate
+offsets in the range from 0 to 255. The @code{L16SI} and @code{L16UI}
+machine instructions can only be used with offsets from 0 to 510. The
+@code{L32I} machine instruction can only be used with offsets from 0 to
+1020. A load offset outside these ranges can be materalized with
+an @code{L32R} instruction if the destination register of the load
+is different than the source address register. For example:
+
+@smallexample
+ l32i a1, a0, 2040
+@end smallexample
+
+is translated to:
+
+@smallexample
+ .literal .L1, 2040
+ l32r a1, .L1
+ addi a1, a0, a1
+ l32i a1, a1, 0
+@end smallexample
+
+@noindent
+If the load destination and source address register are the same, an
+out-of-range offset causes an error.
+
+@cindex @code{ADDI} instructions, relaxation
+@cindex relaxation of @code{ADDI} instructions
+The Xtensa @code{ADDI} instruction only allows immediate operands in the
+range from -128 to 127. There are a number of alternate instruction
+sequences for the generic @code{ADDI} operation. First, if the
+immediate is 0, the @code{ADDI} will be turned into a @code{MOV.N}
+instruction (or the equivalent @code{OR} instruction if the code density
+option is not available). If the @code{ADDI} immediate is outside of
+the range -128 to 127, but inside the range -32896 to 32639, an
+@code{ADDMI} instruction or @code{ADDMI}/@code{ADDI} sequence will be
+used. Finally, if the immediate is outside of this range and a free
+register is available, an @code{L32R}/@code{ADD} sequence will be used
+with a literal allocated from the literal pool.
+
+For example:
+
+@smallexample
+ addi a5, a6, 0
+ addi a5, a6, 512
+ addi a5, a6, 513
+ addi a5, a6, 50000
+@end smallexample
+
+is assembled into the following:
+
+@smallexample
+ .literal .L1, 50000
+ mov.n a5, a6
+ addmi a5, a6, 0x200
+ addmi a5, a6, 0x200
+ addi a5, a5, 1
+ l32r a5, .L1
+ add a5, a6, a5
+@end smallexample
+
+@node Xtensa Directives
+@section Directives
+@cindex Xtensa directives
+@cindex directives, Xtensa
+
+The Xtensa assember supports a region-based directive syntax:
+
+@smallexample
+ .begin @var{directive} [@var{options}]
+ @dots{}
+ .end @var{directive}
+@end smallexample
+
+All the Xtensa-specific directives that apply to a region of code use
+this syntax.
+
+The directive applies to code between the @code{.begin} and the
+@code{.end}. The state of the option after the @code{.end} reverts to
+what it was before the @code{.begin}.
+A nested @code{.begin}/@code{.end} region can further
+change the state of the directive without having to be aware of its
+outer state. For example, consider:
+
+@smallexample
+ .begin no-density
+L: add a0, a1, a2
+ .begin density
+M: add a0, a1, a2
+ .end density
+N: add a0, a1, a2
+ .end no-density
+@end smallexample
+
+The generic @code{ADD} opcodes at @code{L} and @code{N} in the outer
+@code{no-density} region both result in @code{ADD} machine instructions,
+but the assembler selects an @code{ADD.N} instruction for the generic
+@code{ADD} at @code{M} in the inner @code{density} region.
+
+The advantage of this style is that it works well inside macros which can
+preserve the context of their callers.
+
+@cindex precedence of directives
+@cindex directives, precedence
+When command-line options and assembler directives are used at the same
+time and conflict, the one that overrides a default behavior takes
+precedence over one that is the same as the default. For example, if
+the code density option is available, the default is to select density
+instructions whenever possible. So, if the above is assembled with the
+@samp{--no-density} flag, which overrides the default, all the generic
+@code{ADD} instructions result in @code{ADD} machine instructions. If
+assembled with the @samp{--density} flag, which is already the default,
+the @code{no-density} directive takes precedence and only one of
+the generic @code{ADD} instructions is optimized to be a @code{ADD.N}
+machine instruction. An underscore prefix identifying a specific opcode
+always takes precedence over directives and command-line flags.
+
+The following directives are available:
+@menu
+* Density Directive:: Disable Use of Density Instructions.
+* Relax Directive:: Disable Assembler Relaxation.
+* Longcalls Directive:: Use Indirect Calls for Greater Range.
+* Generics Directive:: Disable All Assembler Transformations.
+* Literal Directive:: Intermix Literals with Instructions.
+* Literal Position Directive:: Specify Inline Literal Pool Locations.
+* Literal Prefix Directive:: Specify Literal Section Name Prefix.
+* Freeregs Directive:: List Registers Available for Assembler Use.
+* Frame Directive:: Describe a stack frame.
+@end menu
+
+@node Density Directive
+@subsection density
+@cindex @code{density} directive
+@cindex @code{no-density} directive
+
+The @code{density} and @code{no-density} directives enable or disable
+optimization of generic instructions into density instructions within
+the region. @xref{Density Instructions, ,Using Density Instructions}.
+
+@smallexample
+ .begin [no-]density
+ .end [no-]density
+@end smallexample
+
+This optimization is enabled by default unless the Xtensa configuration
+does not support the code density option or the @samp{--no-density}
+command-line option was specified.
+
+@node Relax Directive
+@subsection relax
+@cindex @code{relax} directive
+@cindex @code{no-relax} directive
+
+The @code{relax} directive enables or disables relaxation
+within the region. @xref{Xtensa Relaxation, ,Xtensa Relaxation}.
+Note: In the current implementation, these directives also control
+whether assembler optimizations are performed, making them equivalent to
+the @code{generics} and @code{no-generics} directives.
+
+@smallexample
+ .begin [no-]relax
+ .end [no-]relax
+@end smallexample
+
+Relaxation is enabled by default unless the @samp{--no-relax}
+command-line option was specified.
+
+@node Longcalls Directive
+@subsection longcalls
+@cindex @code{longcalls} directive
+@cindex @code{no-longcalls} directive
+
+The @code{longcalls} directive enables or disables function call
+relaxation. @xref{Xtensa Call Relaxation, ,Function Call Relaxation}.
+
+@smallexample
+ .begin [no-]longcalls
+ .end [no-]longcalls
+@end smallexample
+
+Call relaxation is disabled by default unless the @samp{--longcalls}
+command-line option is specified.
+
+@node Generics Directive
+@subsection generics
+@cindex @code{generics} directive
+@cindex @code{no-generics} directive
+
+This directive enables or disables all assembler transformation,
+including relaxation (@pxref{Xtensa Relaxation, ,Xtensa Relaxation}) and
+optimization (@pxref{Xtensa Optimizations, ,Xtensa Optimizations}).
+
+@smallexample
+ .begin [no-]generics
+ .end [no-]generics
+@end smallexample
+
+Disabling generics is roughly equivalent to adding an underscore prefix
+to every opcode within the region, so that every opcode is treated as a
+specific opcode. @xref{Xtensa Opcodes, ,Opcode Names}. In the current
+implementation of @code{@value{AS}}, built-in macros are also disabled
+within a @code{no-generics} region.
+
+@node Literal Directive
+@subsection literal
+@cindex @code{literal} directive
+
+The @code{.literal} directive is used to define literal pool data, i.e.,
+read-only 32-bit data accessed via @code{L32R} instructions.
+
+@smallexample
+ .literal @var{label}, @var{value}[, @var{value}@dots{}]
+@end smallexample
+
+This directive is similar to the standard @code{.word} directive, except
+that the actual location of the literal data is determined by the
+assembler and linker, not by the position of the @code{.literal}
+directive. Using this directive gives the assembler freedom to locate
+the literal data in the most appropriate place and possibly to combine
+identical literals. For example, the code:
+
+@smallexample
+ entry sp, 40
+ .literal .L1, sym
+ l32r a4, .L1
+@end smallexample
+
+can be used to load a pointer to the symbol @code{sym} into register
+@code{a4}. The value of @code{sym} will not be placed between the
+@code{ENTRY} and @code{L32R} instructions; instead, the assembler puts
+the data in a literal pool.
+
+By default literal pools are placed in a separate section; however, when
+using the @samp{--text-@-section-@-literals} option (@pxref{Xtensa
+Options, ,Command Line Options}), the literal pools are placed in the
+current section. These text section literal pools are created
+automatically before @code{ENTRY} instructions and manually after
+@samp{.literal_position} directives (@pxref{Literal Position Directive,
+,literal_position}). If there are no preceding @code{ENTRY}
+instructions or @code{.literal_position} directives, the assembler will
+print a warning and place the literal pool at the beginning of the
+current section. In such cases, explicit @code{.literal_position}
+directives should be used to place the literal pools.
+
+@node Literal Position Directive
+@subsection literal_position
+@cindex @code{literal_position} directive
+
+When using @samp{--text-@-section-@-literals} to place literals inline
+in the section being assembled, the @code{.literal_position} directive
+can be used to mark a potential location for a literal pool.
+
+@smallexample
+ .literal_position
+@end smallexample
+
+The @code{.literal_position} directive is ignored when the
+@samp{--text-@-section-@-literals} option is not used.
+
+The assembler will automatically place text section literal pools
+before @code{ENTRY} instructions, so the @code{.literal_position}
+directive is only needed to specify some other location for a literal
+pool. You may need to add an explicit jump instruction to skip over an
+inline literal pool.
+
+For example, an interrupt vector does not begin with an @code{ENTRY}
+instruction so the assembler will be unable to automatically find a good
+place to put a literal pool. Moreover, the code for the interrupt
+vector must be at a specific starting address, so the literal pool
+cannot come before the start of the code. The literal pool for the
+vector must be explicitly positioned in the middle of the vector (before
+any uses of the literals, of course). The @code{.literal_position}
+directive can be used to do this. In the following code, the literal
+for @samp{M} will automatically be aligned correctly and is placed after
+the unconditional jump.
+
+@smallexample
+ .global M
+code_start:
+ j continue
+ .literal_position
+ .align 4
+continue:
+ movi a4, M
+@end smallexample
+
+@node Literal Prefix Directive
+@subsection literal_prefix
+@cindex @code{literal_prefix} directive
+
+The @code{literal_prefix} directive allows you to specify different
+sections to hold literals from different portions of an assembly file.
+With this directive, a single assembly file can be used to generate code
+into multiple sections, including literals generated by the assembler.
+
+@smallexample
+ .begin literal_prefix [@var{name}]
+ .end literal_prefix
+@end smallexample
+
+For the code inside the delimited region, the assembler puts literals in
+the section @code{@var{name}.literal}. If this section does not yet
+exist, the assembler creates it. The @var{name} parameter is
+optional. If @var{name} is not specified, the literal prefix is set to
+the ``default'' for the file. This default is usually @code{.literal}
+but can be changed with the @samp{--rename-section} command-line
+argument.
+
+@node Freeregs Directive
+@subsection freeregs
+@cindex @code{freeregs} directive
+
+This directive tells the assembler that the given registers are unused
+in the region.
+
+@smallexample
+ .begin freeregs @var{ri}[,@var{ri}@dots{}]
+ .end freeregs
+@end smallexample
+
+This allows the assembler to use these registers for relaxations or
+optimizations. (They are actually only for relaxations at present, but
+the possibility of optimizations exists in the future.)
+
+Nested @code{freeregs} directives can be used to add additional registers
+to the list of those available to the assembler. For example:
+
+@smallexample
+ .begin freeregs a3, a4
+ .begin freeregs a5
+@end smallexample
+
+has the effect of declaring @code{a3}, @code{a4}, and @code{a5} all free.
+
+@node Frame Directive
+@subsection frame
+@cindex @code{frame} directive
+
+This directive tells the assembler to emit information to allow the
+debugger to locate a function's stack frame. The syntax is:
+
+@smallexample
+ .frame @var{reg}, @var{size}
+@end smallexample
+
+where @var{reg} is the register used to hold the frame pointer (usually
+the same as the stack pointer) and @var{size} is the size in bytes of
+the stack frame. The @code{.frame} directive is typically placed
+immediately after the @code{ENTRY} instruction for a function.
+
+In almost all circumstances, this information just duplicates the
+information given in the function's @code{ENTRY} instruction; however,
+there are two cases where this is not true:
+
+@enumerate
+@item
+The size of the stack frame is too big to fit in the immediate field
+of the @code{ENTRY} instruction.
+
+@item
+The frame pointer is different than the stack pointer, as with functions
+that call @code{alloca}.
+@end enumerate
+
+@c Local Variables:
+@c fill-column: 72
+@c End:
diff --git a/gas/doc/internals.texi b/gas/doc/internals.texi
index afff9f93d7..4e8a9d1bef 100644
--- a/gas/doc/internals.texi
+++ b/gas/doc/internals.texi
@@ -1450,6 +1450,10 @@ completed, but before the relocations have been generated.
If you define this macro, GAS will call it after the relocs have been
generated.
+@item md_post_relax_hook
+If you define this macro, GAS will call it after relaxing and sizing the
+segments.
+
@item LISTING_HEADER
A string to use on the header line of a listing. The default value is simply
@code{"GAS LISTING"}.
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 6f1f3201af..5582d168c1 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,13 @@
+2003-04-01 Bob Wilson <bob.wilson@acm.org>
+
+ * gas/xtensa/all.exp: New file.
+ * gas/xtensa/entry_align.s: Likewise.
+ * gas/xtensa/entry_misalign2.s: Likewise.
+ * gas/xtensa/entry_misalign.s: Likewise.
+ * gas/xtensa/j_too_far.s: Likewise.
+ * gas/xtensa/loop_align.s: Likewise.
+ * gas/xtensa/loop_misalign.s: Likewise.
+
2003-03-25 Stan Cox <scox@redhat.com>
Nick Clifton <nickc@redhat.com>
diff --git a/gas/testsuite/gas/xtensa/all.exp b/gas/testsuite/gas/xtensa/all.exp
new file mode 100644
index 0000000000..e01c4a395f
--- /dev/null
+++ b/gas/testsuite/gas/xtensa/all.exp
@@ -0,0 +1,98 @@
+#
+# Some generic xtensa tests
+#
+if [istarget xtensa*-*-*] then {
+ gas_test_error "j_too_far.s" "" "Check for jump out of range error"
+
+ set testname "j_too_far.s: error line number reporting"
+ gas_start "j_too_far.s" ""
+ set x1 0
+ while 1 {
+ expect {
+ -re ":4: Error:.*too large" { set x1 1 }
+ timeout { perror "timeout\n"; break }
+ eof { break }
+ }
+ }
+ gas_finish
+ if [all_ones $x1] then { pass $testname } else { fail $testname }
+
+
+ gas_test "entry_misalign.s" "" "" "Xtensa Entry misalignment"
+ set testname "entry_misalign.s: Force entry misalignment"
+ objdump_start_no_subdir "a.out" "-d -j .text"
+ set x1 0
+ while 1 {
+ expect {
+ -re "^.*2:.*entry" { set x1 1 }
+ timeout { perror "timeout\n"; break }
+ eof { break }
+ }
+ }
+ objdump_finish
+ if [all_ones $x1] then { pass $testname } else { fail $testname }
+
+
+ gas_test "entry_misalign2.s" "" "" "Xtensa Entry misalignment(2)"
+ set testname "entry_misalign2.s: Force entry misalignment(2)"
+ objdump_start_no_subdir "a.out" "-d -j .text"
+ set x1 0
+ while 1 {
+ expect {
+ -re "^.*2:.*entry" { set x1 1 }
+ timeout { perror "timeout\n"; break }
+ eof { break }
+ }
+ }
+ objdump_finish
+ if [all_ones $x1] then { pass $testname } else { fail $testname }
+
+ gas_test "entry_align.s" "" "" "Xtensa autoalign entry"
+ set testname "entry_align.s: autoalign entry"
+ objdump_start_no_subdir "a.out" "-d -j .text"
+ set x1 0
+ while 1 {
+ expect {
+ -re "^.*4:.*entry" { set x1 1 }
+ timeout { perror "timeout\n"; break }
+ eof { break }
+ }
+ }
+ objdump_finish
+ if [all_ones $x1] then { pass $testname } else { fail $testname }
+
+ gas_test "loop_misalign.s" "" "" "Xtensa Loop misalignment"
+ set testname "loop_misalign.s: Force loop misalignment"
+ objdump_start_no_subdir "a.out" "-d -j .text"
+ set x1 0
+ while 1 {
+ expect {
+ -re "^.*0:.*loop" { set x1 1 }
+ timeout { perror "timeout\n"; break }
+ eof { break }
+ }
+ }
+ objdump_finish
+ if [all_ones $x1] then { pass $testname } else { fail $testname }
+
+
+ gas_test "loop_align.s" "" "" "Xtensa autoalign loop"
+ set testname "loop_align.s: autoalign loop"
+ objdump_start_no_subdir "a.out" "-d -j .text"
+ set x1 0
+ while 1 {
+ expect {
+ -re "^.*2:.*loop" { set x1 1 }
+ timeout { perror "timeout\n"; break }
+ eof { break }
+ }
+ }
+ objdump_finish
+ if [all_ones $x1] then { pass $testname } else { fail $testname }
+
+
+}
+
+if [info exists errorInfo] then {
+ unset errorInfo
+ }
diff --git a/gas/testsuite/gas/xtensa/entry_align.s b/gas/testsuite/gas/xtensa/entry_align.s
new file mode 100644
index 0000000000..df8d1deb1d
--- /dev/null
+++ b/gas/testsuite/gas/xtensa/entry_align.s
@@ -0,0 +1,4 @@
+ _nop.n
+l4:
+ entry a5,16
+ _mov.n a4,a5
diff --git a/gas/testsuite/gas/xtensa/entry_misalign.s b/gas/testsuite/gas/xtensa/entry_misalign.s
new file mode 100644
index 0000000000..c3e243a606
--- /dev/null
+++ b/gas/testsuite/gas/xtensa/entry_misalign.s
@@ -0,0 +1,4 @@
+ _nop.n
+l4:
+ _entry a5,16
+ _mov.n a4,a5
diff --git a/gas/testsuite/gas/xtensa/entry_misalign2.s b/gas/testsuite/gas/xtensa/entry_misalign2.s
new file mode 100644
index 0000000000..5d48b6c59b
--- /dev/null
+++ b/gas/testsuite/gas/xtensa/entry_misalign2.s
@@ -0,0 +1,6 @@
+ .begin no-generics
+ nop.n
+l4:
+ entry a5,16
+ mov.n a4,a5
+ .end no-generics
diff --git a/gas/testsuite/gas/xtensa/j_too_far.s b/gas/testsuite/gas/xtensa/j_too_far.s
new file mode 100644
index 0000000000..3348d856bc
--- /dev/null
+++ b/gas/testsuite/gas/xtensa/j_too_far.s
@@ -0,0 +1,8 @@
+ .text
+ .align 4
+ entry a5,16
+ j too_far
+ .fill 150000
+too_far:
+ nop
+ nop
diff --git a/gas/testsuite/gas/xtensa/loop_align.s b/gas/testsuite/gas/xtensa/loop_align.s
new file mode 100644
index 0000000000..25ebc122e4
--- /dev/null
+++ b/gas/testsuite/gas/xtensa/loop_align.s
@@ -0,0 +1,5 @@
+l4:
+ loop a5,l5
+ _mov.n a4,a5
+l5:
+ _nop.n
diff --git a/gas/testsuite/gas/xtensa/loop_misalign.s b/gas/testsuite/gas/xtensa/loop_misalign.s
new file mode 100644
index 0000000000..bb4c6e32fe
--- /dev/null
+++ b/gas/testsuite/gas/xtensa/loop_misalign.s
@@ -0,0 +1,5 @@
+l4:
+ _loop a5,l5
+ _mov.n a4,a5
+l5:
+ _nop.n
diff --git a/gas/write.c b/gas/write.c
index f5db82e298..e4ce91cb92 100644
--- a/gas/write.c
+++ b/gas/write.c
@@ -1586,6 +1586,10 @@ write_object_file ()
/* Relaxation has completed. Freeze all syms. */
finalize_syms = 1;
+#ifdef md_post_relax_hook
+ md_post_relax_hook;
+#endif
+
#ifndef BFD_ASSEMBLER
/* Crawl the symbol chain.
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