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* bfd:Nathan Sidwell2005-11-083-28/+199
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add ms2. * archures.c (bfd_mach_ms2): Define. * cpu-ms1.c (arch_info_struct): Add ms2 stanza. * elf32-ms1.c (elf32_ms1_machine): Add ms2 case. (ms1_elf_merge_private_bfd_data): Remove unused variables. Add correct merging logic, with workaround. (ms1_elf_print_private_bfd_data): Add ms2 case. * reloc.c (BFD_RELOC_MS1_PCINSN8): Add ms2 specific reloc. * libbfd.h: Regenerated. * bfd-in2.h: Regenerated. cpu: Add ms2 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and model. (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr, f-cb2incr, f-rc3): New fields. (LOOP): New instruction. (JAL-HAZARD): New hazard. (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr): New operands. (mul, muli, dbnz, iflush): Enable for ms2 (jal, reti): Has JAL-HAZARD. (ldctxt, ldfb, stfb): Only ms1. (fbcb): Only ms1,ms1-003. (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs, fbcbincrs, mfbcbincrs): Enable for ms2. (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns. * ms1.opc (parse_loopsize): New. (parse_imm16): hi16/lo16 relocs are applicable to IMM16L. (print_pcrel): New. gas: Add ms2. * config/tc-ms1.c (ms1_mach_bitmask): Initialize to MS1. (ms1_architectures): Add ms2. (md_parse_option): Add ms2. (md_show_usage): Add ms2. (md_assemble): Add JAL_HAZARD detection logic. (md_cgen_lookup_reloc): Add MS1_OPERAND_LOOPSIZE case. * doc/c-ms1.texi: New. * doc/all.texi: Add MS1. * doc/Makefile.am (CPU_DOCS): Add c-ms1.texi. * doc/Makefile.in: Rebuilt. * doc/Makefile: Rebuilt. gas/testsuite: Add ms2. * gas/ms1/allinsn.d: Adjust pcrel disassembly. * gas/ms1/errors.exp: Fix target triplet. * gas/ms1/ms1-16-003.d: Adjust pcrel disassembly. * gas/ms1/ms1-16-003.s: Tweak label. * gas/ms1/ms1.exp: Adjust target triplet. Add ms2 test. * gas/ms1/ms2.d, gas/ms1/ms2.s: New. * gas/ms1/relocs.d: Adjust expected machine name and pcrel disassembly. * gas/ms1/relocs.exp: Adjust target triplet. include: Add ms2. * elf/ms1.h (EF_MS1_CPU_MS2): New. opcodes: Add ms2. * ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h: Regenerated.
* 2005-10-28 Dave Brolley <brolley@redhat.com>Dave Brolley2005-10-283-31/+41
| | | | | | | | | | Contribute the following change: 2003-09-24 Dave Brolley <brolley@redhat.com> * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of CGEN_ATTR_VALUE_TYPE. * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE. Use cgen_bitset_intersect_p.
* * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.DJ Delorie2005-10-273-46/+139
| | | | | | | | | | | | | | | | | | | | | | (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn, arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which imm operand is needed. (adjnz, sbjnz): Pass the right operands. (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach, unary-insn): Add -g variants for opcodes that need to support :G. (not.BW:G, push.BW:G): Call it. (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb, stzx16-imm8-imm8-abs16): Fix operand typos. * m32c.opc (m32c_asm_hash): Support bnCND. (parse_signed4n, print_signed4n): New. * m32c-asm.c: Regenerate. * m32c-desc.c: Regenerate. * m32c-desc.h: Regenerate. * m32c-dis.c: Regenerate. * m32c-ibld.c: Regenerate. * m32c-opc.c: Regenerate. * m32c-opc.h: Regenerate.
* * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.DJ Delorie2005-10-263-36/+80
| | | | | | | | | | | | | | | | | | (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn, mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn): dsp8[sp] is signed. (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff). (mov.BW:S r0,r1): Fix typo r1l->r1. (tst): Allow :G suffix. * m32c.opc (parse_signed24): New, for -0x800000..0xffffff. * m32c-asm.c: Regenerate. * m32c-desc.c: Regenerate. * m32c-desc.h: Regenerate. * m32c-dis.c: Regenerate. * m32c-ibld.c: Regenerate. * m32c-opc.c: Regenerate. * m32c-opc.h: Regenerate.
* * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.Alan Modra2005-10-262-2/+10
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* * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width byDJ Delorie2005-10-252-3/+11
| | | | | | | | | | | | making one a macro of the other. * m32c-asm.c: Regenerate. * m32c-desc.c: Regenerate. * m32c-desc.h: Regenerate. * m32c-dis.c: Regenerate. * m32c-ibld.c: Regenerate. * m32c-opc.c: Regenerate. * m32c-opc.h: Regenerate.
* [cpu]DJ Delorie2005-10-222-74/+105
| | | | | | | | | | | | | | | | | | * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing. (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl, indexld, indexls): .w variants have `1' bit. (rot32.b): QI, not SI. (rot32.w): HI, not SI. (xchg16): HI for .w variant. [opcodes] * m32c-asm.c: Regenerate. * m32c-desc.c: Regenerate. * m32c-desc.h: Regenerate. * m32c-dis.c: Regenerate. * m32c-ibld.c: Regenerate. * m32c-opc.c: Regenerate. * m32c-opc.h: Regenerate.
* * m32r.opc (parse_slo16): Fix bad application of previous patch.Nick Clifton2005-10-192-5/+5
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* m32r.opc (parse_slo16): Better version of previous patch.Nick Clifton2005-10-182-2/+6
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* m32r.opc (parse_slo16): Do not assume a 32-bit host word size.Nick Clifton2005-10-142-1/+6
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* [bfd]DJ Delorie2005-07-262-4/+122
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * reloc.c: Remove unused M32C relocs, add BFD_RELOC_M32C_HI8. * libbfd.h: Regenerate. * bfd-in2.h: Regenerate. * elf32-m32c.c (m32c_elf_howto_table): Add R_M32C_8, R_M32C_LO16, R_M32C_HI8, R_M32C_HI16. (m32c_reloc_map): Likewise. (m32c_elf_relocate_section): Add R_M32C_HI8 and R_M32C_HI16. [cpu] * m32c.opc (parse_unsigned8): Add %dsp8(). (parse_signed8): Add %hi8(). (parse_unsigned16): Add %dsp16(). (parse_signed16): Add %lo16() and %hi16(). (parse_lab_5_3): Make valuep a bfd_vma *. [gas] * config/tc-m32c.c (md_cgen_lookup_reloc): Add 8 bit operands. Support %mod() modifiers from opcodes. * doc/c-m32c.texi (M32C-Modifiers): New section. [include/elf] * m32c.h: Add R_M32C_8, R_M32C_LO16, R_M32C_HI8, and R_M32C_HI16. [opcodes] * m32c-asm.c Regenerate. * m32c-dis.c Regenerate.
* Add ChangeLog entries for yesterdays deltas (oops!)Nick Clifton2005-07-191-0/+24
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* Fix building for MS1 and M32C.Nick Clifton2005-07-182-396/+208
| | | | Restore alpha- sorting to the architecture tables.
* * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,Jim Blandy2005-07-162-3/+8
| | | | to represent isa sets.
* * m32c.cpu, m32c.opc: Fix copyright.Jim Blandy2005-07-153-5/+44
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* ChangeLog:Jim Blandy2005-07-143-0/+11434
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2005-07-14 Jim Blandy <jimb@redhat.com> * configure.in: Add cases for Renesas m32c. * configure: Regenerated. bfd/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for m32c-*-elf (Renesas m32c and m16c). * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo. (ALL_MACHINES_CFILES): Add cpu-m32c.c. (BFD32_BACKENDS): Add elf32-m32c.lo. (BFD32_BACKENDS_CFILES): Add elf32-m32c.c. (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'. * Makefile.in: Regenerated. * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New arch and mach codes. (bfd_m32c_arch): New arch info object. (bfd_archures_list): List bfd_m32c_arch. * bfd-in2.h: Regenerated. * config.bfd: Add case for the m32c. * configure.in: Add case for the m32c. * configure: Regenerated. * cpu-m32c.c, elf32-m32c.c: New files. * libbfd.h: Regenerated. * targets.c (bfd_elf32_m32c_vec): Declare. (_bfd_target_vector): List bfd_elf32_m32c_vec. binutils/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * readelf.c: #include "elf/m32c.h" (guess_is_rela, dump_relocations, get_machine_name): Add cases for EM_M32C. * Makefile.am (readelf.o): Update dependencies. * Makefile.in: Regenerated. cpu/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. gas/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C. * Makefile.am (CPU_TYPES): List m32c. (TARGET_CPU_CFILES): List config/tc-m32c.c. (TARGET_CPU_HFILES): List config/tc-m32c.h. * configure.in: Add case for m32c. * configure.tgt: Add cases for m32c and m32c-*-elf. * configure: Regenerated. * config/tc-m32c.c, config/tc-m32c.h: New files. * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set M32C. * doc/as.texinfo: Add text for the M32C-specific options and line comment characters, and refer to c-m32c.texi. * doc/c-m32c.texi: New file. include/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * dis-asm.h (print_insn_m32c): New declaration. include/elf/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for Renesas M32C and M16C. * common.h (EM_M32C): New machine number. * m32c.h: New file. ld/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o. (eelf32m32c.c): New target. * Makefile.in: Regenerated. * configure.tgt: Add case for m32c-*-elf. * emulparams/elf32m32c.sh: New file. opcodes/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. * m32c-desc.h, m32c-opc.h: New. * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c. (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo. (CLEANFILES): List stamp-m32c. (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. (CGEN_CPUS): Add m32c. (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. (m32c_opc_h): New variable. (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) (m32c-opc.lo): New rules. * Makefile.in: Regenerated. * configure.in: Add case for bfd_m32c_arch. * configure: Regenerated. * disassemble.c (ARCH_m32c): New. [ARCH_m32c]: #include "m32c-desc.h". (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. (disassemble_init_for_target) [ARCH_m32c]: Same. * cgen-ops.h, cgen-types.h: New files. * Makefile.am (HFILES): List them. * Makefile.in: Regenerated.
* * ms1.opc (print_dollarhex): Correct format string.Alan Modra2005-07-142-2/+6
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* * iq2000.cpu: Include from binutils cpu dir.Alan Modra2005-07-062-2/+6
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* Fix compile time warnings from a GCC 4.0 compilerNick Clifton2005-07-053-22/+23
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* Update function declarations to ISO C90 formattingNick Clifton2005-07-015-485/+398
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* 2005-06-15 Dave Brolley <brolley@redhat.com>Dave Brolley2005-06-153-0/+1692
| | | | | | Contributed by Red Hat. * ms1.cpu: New file. Written by Nick Clifton, Stan Cox. * ms1.opc: New file. Written by Stan Cox.
* Update the address and phone number of the FSF organizationNick Clifton2005-05-1014-13/+21
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* * frv.opc (parse_A): Warning fix.Alan Modra2005-02-242-2/+6
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* Fix compile time warnings generated by gcc 4.0Nick Clifton2005-02-233-17/+24
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* Fix compile time warning building iq2000-asm.cNick Clifton2005-02-112-2/+7
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* * cris.cpu (mstep): Add missing insn.Hans-Peter Nilsson2005-01-282-0/+18
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* bfd/ChangeLog:Alexandre Oliva2005-01-253-180/+560
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2004-12-10 Alexandre Oliva <aoliva@redhat.com> * elf32-frv.c (elf32_frv_relocate_section): Force local binding for TLSMOFF. * reloc.c: Add R_FRV_TLSMOFF. * elf32-frv.c (elf32_frv_howto_table): Likewise. (frv_reloc_map, frv_reloc_type_lookup): Map it. (elf32_frv_relocate_section): Handle it. (elf32_frv_check_relocs): Likewise. * libbfd.h, bfd-in2.h: Rebuilt. 2004-11-26 Alexandre Oliva <aoliva@redhat.com> * elf32-frv.c (_frvfdpic_emit_got_relocs_plt_entries): Don't crash when given an undefweak TLS symbol. Fix constant TLS PLT entries such that they return the constant in gr9. (_frvfdpic_relax_tls_entries): Don't crash for undefweak TLS symbols. (_frvfdpic_size_got_plt): Set _cooked_size of dynamic sections. too, such that they shrink on relaxation. (elf32_frvfdpic_finish_dynamic_sections): Check __ROFIXUP_END__ as marking the position right past the _GLOBAL_OFFSET_TABLE_ value. (_frvfdpic_assign_plt_entries): Shrink constant TLS PLT entries if we can guarantee the use of 16-bit constants. 2004-11-10 Alexandre Oliva <aoliva@redhat.com> Introduce TLS support for FR-V FDPIC. * reloc.c: Add TLS relocations. * elf32-frv.c (elf32_frv_howto_table): Add TLS relocations. (elf32_frv_rel_tlsdesc_value_howto): New. (elf32_frv_rel_tlsoff_howto): New. (frv_reloc_map): Add new mappings. (struct frvfdpic_elf_link_hash_table): Add pointer to summary reloc information. (frvfdpic_dynamic_got_plt_info): New. (frvfdpic_plt_tls_ret_offset): New. (ELF_DYNAMIC_INTERPRETER, DEFAULT_STACK_SIZE): Move earlier. (struct _frvfdpic_dynamic_got_info): Likewise. Add TLS members. (struct _frvfdpic_dynamic_got_plt_info): Likewise. (FRVFDPIC_SYM_LOCAL): Regard symbols defined in the absolute section as local. (struct frvfdpic_relocs_info): Add TLS fields. (frvfdpic_relocs_info_hash): Warning clean up. (frvfdpic_relocs_info_find): Initialize tlsplt_entry. (frvfdpic_pic_merge_early_relocs_info): Merge TLS fields. (FRVFDPIC_TLS_BIAS): Define. (tls_biased_base): New. (_frvfdpic_emit_got_relocs_plt_entries): Deal with TLS relocations. (frv_reloc_type_lookup): Likewise. (frvfdpic_info_to_howto_rel): Likewise. (elf32_frv_relocate_section): Likewise. (_frv_create_got_section): Create the PLT section here. (elf32_frvfdpic_create_dynamic_sections): Not here. (_frvfdpic_count_nontls_entries): Move out of... (_frvfdpic_count_got_plt_entries): ... here. (_frvfdpic_count_tls_entries): Likewise. Add TLS support. (_frvfdpic_count_relocs_fixups): Likewise. Add relaxation support. (_frvfdpic_relax_tls_entries): New. (_frvfdpic_compute_got_alloc_data): Add TLS support. (_frvfdpic_get_tlsdesc_entry): New. (_frvfdpic_assign_got_entries): Add TLS support. (_frvfdpic_assign_plt_entries): Likewise. (_frvfdpic_reset_got_plt_entries): New. (_frvfdpic_size_got_plt): Move out of... (elf32_frvfdpic_size_dynamic_sections): ... here. (_frvfdpic_relax_got_plt_entries): New. (elf32_frvfdpic_relax_section): New. (elf32_frvfdpic_finish_dynamic_sections): Add TLS sanity check. (elf32_frv_check_relocs): Add TLS support. (bfd_elf32_bfd_relax_section): Define for FDPIC. * libbfd.h, bfd-in2.h: Rebuilt. cpu/ChangeLog: 2004-11-10 Alexandre Oliva <aoliva@redhat.com> * frv.cpu: Add support for TLS annotations in loads and calll. * frv.opc (parse_symbolic_address): New. (parse_ldd_annotation): New. (parse_call_annotation): New. (parse_ld_annotation): New. (parse_ulo16, parse_uslo16): Use parse_symbolic_address. Introduce TLS relocations. (parse_d12, parse_s12, parse_u12): Likewise. (parse_uhi16): Likewise. Fix constant checking on 64-bit host. (parse_call_label, print_at): New. gas/ChangeLog: * config/tc-frv.c (md_apply_fix3): Mark TLS symbols as such. 2004-12-10 Alexandre Oliva <aoliva@redhat.com> * config/tc-frv.c (frv_pic_ptr): Add tlsmoff support. 2004-11-10 Alexandre Oliva <aoliva@redhat.com> * cgen.c (gas_cgen_parse_operand): Handle CGEN_PARSE_OPERAND_SYMBOLIC. * config/tc-frv.c (md_cgen_lookup_reloc): Handle TLS relocations. (frv_force_relocation): Likewise. Fix handling of PIC relocations. (md_apply_fix3): Likewise. include/elf/ChangeLog: 2004-12-10 Alexandre Oliva <aoliva@redhat.com> * frv.h: Add R_FRV_TLSMOFF. 2004-11-10 Alexandre Oliva <aoliva@redhat.com> * frv.h: Add TLS relocations. include/opcode/ChangeLog: 2004-11-10 Alexandre Oliva <aoliva@redhat.com> * cgen.h (enum cgen_parse_operand_type): Add CGEN_PARSE_OPERAND_SYMBOLIC. ld/testsuite/ChangeLog: * ld-frv/fdpic.exp: Add -mfdpic to ASFLAGS. * ld-frv/tls.exp: Likewise. 2004-11-26 Alexandre Oliva <aoliva@redhat.com> * ld-frv/tls-3.s: New. * ld-frv/tls-static-3.d: New. * ld-frv/tls-dynamic-3.d: New. * ld-frv/tls-pie-3.d: New. * ld-frv/tls-shared-3.d: New. * ld-frv/tls-relax-static-3.d: New. * ld-frv/tls-relax-dynamic-3.d: New. * ld-frv/tls-relax-pie-3.d: New. * ld-frv/tls-relax-shared-3.d: New. * ld-frv/tls.exp: Run the new tests. * ld-frv/tls-dynamic-2.d: Adjust for improved relaxation. * ld-frv/tls-relax-dynamic-2.d: Likewise. * ld-frv/tls-relax-initial-shared-2.d: Likewise. 2004-11-10 Alexandre Oliva <aoliva@redhat.com> * ld-frv/tls-1-dep.s: New. * ld-frv/tls-1-shared.lds: New. * ld-frv/tls-1.s: New. * ld-frv/tls-2.s: New. * ld-frv/tls-dynamic-1.d: New. * ld-frv/tls-dynamic-2.d: New. * ld-frv/tls-initial-shared-2.d: New. * ld-frv/tls-pie-1.d: New. * ld-frv/tls-relax-dynamic-1.d: New. * ld-frv/tls-relax-dynamic-2.d: New. * ld-frv/tls-relax-initial-shared-2.d: New. * ld-frv/tls-relax-pie-1.d: New. * ld-frv/tls-relax-shared-1.d: New. * ld-frv/tls-relax-shared-2.d: New. * ld-frv/tls-relax-static-1.d: New. * ld-frv/tls-shared-1-fail.d: New. * ld-frv/tls-shared-1.d: New. * ld-frv/tls-shared-2.d: New. * ld-frv/tls-static-1.d: New. * ld-frv/tls.exp: New. * ld-frv/fdpic-pie-1.d: Adjust for 64-bit host. * ld-frv/fdpic-pie-2.d: Likewise. * ld-frv/fdpic-pie-6.d: Likewise. * ld-frv/fdpic-pie-7.d: Likewise. * ld-frv/fdpic-pie-8.d: Likewise. * ld-frv/fdpic-shared-1.d: Likewise. * ld-frv/fdpic-shared-2.d: Likewise. * ld-frv/fdpic-shared-3.d: Likewise. * ld-frv/fdpic-shared-4.d: Likewise. * ld-frv/fdpic-shared-5.d: Likewise. * ld-frv/fdpic-shared-6.d: Likewise. * ld-frv/fdpic-shared-7.d: Likewise. * ld-frv/fdpic-shared-8.d: Likewise. * ld-frv/fdpic-shared-local-2.d: Likewise. * ld-frv/fdpic-shared-local-8.d: Likewise. * ld-frv/fdpic-static-1.d: Likewise. * ld-frv/fdpic-static-2.d: Likewise. * ld-frv/fdpic-static-6.d: Likewise. * ld-frv/fdpic-static-7.d: Likewise. * ld-frv/fdpic-static-8.d: Likewise. opcodes/ChangeLog: 2004-11-10 Alexandre Oliva <aoliva@redhat.com> * frv-asm.c: Rebuilt. * frv-desc.c: Rebuilt. * frv-desc.h: Rebuilt. * frv-dis.c: Rebuilt. * frv-ibld.c: Rebuilt. * frv-opc.c: Rebuilt. * frv-opc.h: Rebuilt.
* * cris.cpu (cris-set-mem): Correct integral write semantics.Hans-Peter Nilsson2004-12-212-1/+8
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* * cris.cpu: New file.Hans-Peter Nilsson2004-11-292-0/+4454
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* Added quotes around macro arguments so that they will work with newer versionsNick Clifton2004-11-152-4/+9
| | | | of guile.
* Add an index operand to some of the iq2000 co-processor instructionsNick Clifton2004-10-273-50/+41
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* cpu/Richard Sandiford2004-08-272-1/+5
| | | | | | | | | | | * frv.cpu (cfmovs): Change UNIT attribute to FMALL. opcodes/ * frv-desc.[ch], frv-opc.[ch]: Regenerated. gas/testsuite/ * gas/frv/fr550-pack1.[sd]: New test. * gas/frv/allinsn.exp: Run it.
* Make 'insn' argument of iq2000_cgen_insn_supported be const.Nick Clifton2004-05-152-3/+7
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* Fix bug parsing shigh(0xffff8000)Nick Clifton2004-03-302-7/+11
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* Add fr450 support.Richard Sandiford2004-03-013-470/+1531
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* cpu/Richard Sandiford2004-03-013-20/+31
| | | | | | | | | | | | | | | | | | | | | | | | * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit. (scutss): Change unit to I0. (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit. (mqsaths): Fix FR400-MAJOR categorization. (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc) (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL. * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1) combinations. opcodes/ * frv-desc.c, frv-opc.c: Regenerate. sim/frv/ * cache.c (frv_cache_init): Change fr400 cache statistics to match the fr405. (non_cache_access): Add missing breaks. * interrupts.c (set_exception_status_registers): Always set EAR15 for data_access_errors. * memory.c (fr400_check_write_address): Remove redundant alignment check. * model.c: Regenerate.
* cpu/Richard Sandiford2004-03-012-69/+6
| | | | | | | | | | | | | | | | | | | | | * frv.cpu (r-store, r-store-dual, r-store-quad): Delete. (rstb, rsth, rst, rstd, rstq): Delete. (rstbf, rsthf, rstf, rstdf, rstqf): Delete. gas/testsuite/ * gas/frv/allinsn.s (rstb, rsth, rst, rstd, rstq): Replace with nops. (rstbf, rsthf, rstf, rstdf, rstqf): Likewise. * gas/frv/allinsn.d: Update accordingly. opcodes/ * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate. sim/frv/ * decode.c, decode.h, model.c, sem.c: Regenerate. sim/testsuite/ * sim/frv/{rstb,rsth,rst,rstd,rstq}.cgs: Delete. * sim/frv/{rstbf,rsthf,rstf,rstdf,rstqf}.cgs: Delete.
* Apply m32r patches from RenesasNick Clifton2004-02-233-128/+491
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* 2004-02-20 Andrew Cagney <cagney@redhat.com>Andrew Cagney2004-02-203-0/+2432
| | | | | * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
* 2004-02-20 Andrew Cagney <cagney@redhat.com>Andrew Cagney2004-02-205-0/+3930
| | | | | * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all written by Ben Elliston.
* cpu/Richard Sandiford2004-01-143-3/+14
| | | | | | | | | | | | * frv.cpu (UNIT): Add IACC. (iacc-multiply-r-r): Use it. * frv.opc (fr400_unit_mapping): Add entry for IACC. (fr500_unit_mapping, fr550_unit_mapping): Likewise. opcodes/ * frv-desc.h: Regenerate. * frv-desc.c: Regenerate. * frv-opc.c: Regenerate.
* 2003-12-19 Alexandre Oliva <aoliva@redhat.com>Alexandre Oliva2004-01-062-1/+293
| | | | | | | | | | | | | | | | | * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some cut&paste errors in shifting/truncating numerical operands. 2003-08-08 Alexandre Oliva <aoliva@redhat.com> * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo. (parse_uslo16): Likewise. (parse_uhi16): Parse gotoffhi and gotofffuncdeschi. (parse_d12): Parse gotoff12 and gotofffuncdesc12. (parse_s12): Likewise. 2003-08-04 Alexandre Oliva <aoliva@redhat.com> * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo. (parse_uslo16): Likewise. (parse_uhi16): Parse gothi and gotfuncdeschi. (parse_d12): Parse got12 and gotfuncdesc12. (parse_s12): Likewise.
* 2003-10-10 Dave Brolley <brolley@redhat.com>Dave Brolley2003-10-102-19/+45
| | | | | | | | | | | | | * frv.cpu (dnpmop): New p-macro. (GRdoublek): Use dnpmop. (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto. (store-double-r-r): Use (.sym regtype doublek). (r-store-double): Ditto. (store-double-r-r-u): Ditto. (conditional-store-double): Ditto. (conditional-store-double-u): Ditto. (store-double-r-simm): Ditto. (fmovs): Assign to UNIT FMALL.
* 2003-10-06 Dave Brolley <brolley@redhat.com>Dave Brolley2003-10-083-872/+1685
| | | | * frv.cpu, frv.opc: Add support for fr550.
* 2003-09-24 Dave Brolley <brolley@redhat.com>Dave Brolley2003-09-242-15/+52
| | | | | | | | | | * frv.cpu (u-commit): New modelling unit for fr500. (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand. (commit-r): Use u-commit model for fr500. (commit): Ditto. (conditional-float-binary-op): Take profiling data as an argument. Update callers. (ne-float-binary-op): Ditto.
* 2003-09-19 Michael Snyder <msnyder@redhat.com>Michael Snyder2003-09-192-2/+4
| | | | * frv.cpu (nldqi): Delete unimplemented instruction.
* 2003-09-12 Dave Brolley <brolley@redhat.com>Dave Brolley2003-09-122-10/+45
| | | | | | | | * frv.cpu (u-clrgr, u-clrfr): New units of model fr500. (clear-ne-flag-r): Pass insn profiling in as an argument. Call frv_ref_SI to get input register referenced for profiling. (clear-ne-flag-all): Pass insn profiling in as an argument. (clrgr,clrfr,clrga,clrfa): Add profiling information.
* 2003-09-11 Michael Snyder <msnyder@redhat.com>Michael Snyder2003-09-112-2/+6
| | | | * frv.cpu: Typographical corrections.
* 2003-09-09 Dave Brolley <brolley@redhat.com>Dave Brolley2003-09-092-3/+8
| | | | | * frv.cpu (media-dual-complex): Change UNIT to FMALL. (conditional-media-dual-complex, media-quad-complex): Likewise.
* 2003-09-04 Dave Brolley <brolley@redhat.com>Dave Brolley2003-09-042-66/+87
| | | | | | | | | | | | | | | * frv.cpu (register-transfer): Pass in all attributes in on argument. Update all callers. (conditional-register-transfer): Ditto. (cache-preload): Ditto. (floating-point-conversion): Ditto. (floating-point-neg): Ditto. (float-abs): Ditto. (float-binary-op-s): Ditto. (conditional-float-binary-op): Ditto. (ne-float-binary-op): Ditto. (float-dual-arith): Ditto. (ne-float-dual-arith): Ditto.
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