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* 2000-05-26 Scott Bambrough <scottb@netwinder.org>Scott Bambrough2000-05-303-8/+31
* 2000-04-13 Michael Sokolov <msokolov@ivan.Harhan.ORG>Phil Blundell2000-05-0644-29/+48
* * m10300-dis.c (HAVE_AM30, HAVE_AM33): Define.Alexandre Oliva2000-04-202-1/+10
* This is a grab-bag of my stuff from the head branch.Alan Modra2000-04-054-32/+50
* Tidy some code. Print pc rel addresses as signed.Alan Modra2000-04-042-60/+29
* rebuild generated filesIan Lance Taylor2000-04-023-417/+327
* * disassemble.c (disassembler_usage): Don't use a prototype. MarkIan Lance Taylor2000-04-023-24/+31
* * m10300-opc.c: SP-based offsets are always unsigned.Alexandre Oliva2000-04-012-12/+16
* Reverted the comment about inc/inc4, that was already implied by RN02.Alexandre Oliva2000-03-311-1/+0
* Fix typos. Add FIXME for 2-reg inc and inc4.Alexandre Oliva2000-03-311-9/+10
* Disassemble 0xde.. to "bal" [branch always] instead of "undefined".Nick Clifton2000-03-292-3/+10
* Fix value of SHORT_A1.Nick Clifton2000-03-272-1/+6
* * Makefile.am (CFILES): Add avr-dis.c.Ian Lance Taylor2000-03-273-0/+9
* ATMEL AVR microcontroller support.Alan Modra2000-03-275-322/+1015
* * sh-opc.h (sh_table): ldre and ldrs have a *signed* displacement.Joern Rennecke2000-03-062-2/+6
* Apply patch for 100679Nick Clifton2000-03-023-69/+104
* Replace 'flags' with 'signed_overflow_ok_p'Nick Clifton2000-02-282-1/+6
* 2000-02-27 Eli Zaretskii <eliz@is.elta.co.il>Ian Lance Taylor2000-02-273-4/+12
* rebuild with current toolsIan Lance Taylor2000-02-275-1084/+469
* Add functions to modify/examine the signed_overflow_ok_p field in cpu_desc.Nick Clifton2000-02-242-1/+31
* 2000-02-23 Andrew Haley <aph@cygnus.com>Andrew Haley2000-02-247-24/+54
* Add IBM 370 support.Alan Modra2000-02-238-340/+1587
* * d30v-opc.c (d30v_opcode_tab) : Added FLAG_NOT_WITH_ADDSUBppp toChandra Chavva2000-02-222-10/+15
* 1999-12-30 Andrew Haley <aph@cygnus.com>Andrew Haley2000-02-223-1/+11
* From Grant Erickson <gerickso@Brocade.COM>:Ian Lance Taylor2000-02-222-2/+7
* This lot mainly cleans up `comparison between signed and unsigned' gccAlan Modra2000-02-212-5/+10
* bfd:Joern Rennecke2000-02-173-242/+860
* 2000-02-14 Fernando Nasser <fnasser@totem.to.cygnus.com>Fernando Nasser2000-02-142-3/+43
* Add support for M340 part.Nick Clifton2000-02-103-2/+48
* Rename parse_disassembler_option (again)Nick Clifton2000-02-072-5/+11
* octets vs bytes changes for binutilsTimothy Wall2000-02-032-2/+14
* Rename parse_disassembler_option to parse_arm_disassembler_option and allow itNick Clifton2000-01-282-1/+3
* Add ATPCS support to ARM disassembler.Nick Clifton2000-01-273-156/+190
* Add support for documenting target specific disassembler optionsNick Clifton2000-01-272-0/+11
* Apply Thoams de Lellis's patch to fic disassembly of Thumb instructions whenNick Clifton2000-01-272-10/+21
* Prevent double dumping of raw thumb instructions.Nick Clifton2000-01-252-3/+7
* Add 'add" as an offial alias for "addu"Nick Clifton2000-01-212-0/+5
* fix spelling of MotorolaNick Clifton2000-01-202-2/+2
* Add support for --disassembler-options=force-thumbNick Clifton2000-01-032-22/+81
* x86 indirect jump/call syntax fixes. Disassembly fix for lcall.Alan Modra1999-12-272-1/+5
* * m10300-opc.c, m10300-dis.c: Add am33 support.Jeff Law1999-12-013-2/+884
* * hppa-dis.c (unit_cond_names): Add PA2.0 unit condition names.Jeff Law1999-11-252-2/+8
* Fix binary pattern for cpfg,f0,c instructionNick Clifton1999-11-222-1/+5
* For include/opcode:Gavin Romig-Koch1999-11-182-0/+62
* Added 'X' format to ARM code.Don Lindsay1999-11-163-0/+15
* * mips-opc.c (la): Create a version that just uses addiu directly.Gavin Romig-Koch1999-11-152-0/+7
* Add ssnop pattern.Nick Clifton1999-11-112-34/+42
* For include/opcode:Gavin Romig-Koch1999-11-012-22/+6
* oops - omitted from previous deltaNick Clifton1999-10-291-0/+5
* Define SHORT_AR and use for MVTACC (fix for CR: 101340)Nick Clifton1999-10-291-1/+2
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