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2010-02-11 Doug Evans <dje@sebabeach.org>
* fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
* frv-desc.c, * frv-desc.h, * frv-opc.c,
* ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
* iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
* lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
* m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
* m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
* mep-desc.c, * mep-desc.h, * mep-opc.c,
* mt-desc.c, * mt-desc.h, * mt-opc.c,
* openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
* xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
* xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
2010-02-11 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c: Update copyright.
* i386-gen.c: Likewise.
* i386-opc.h: Likewise.
* i386-opc.tbl: Likewise.
2010-02-10 Quentin Neill <quentin.neill@amd.com>
Sebastian Pop <sebastian.pop@amd.com>
* i386-dis.c (OP_EX_VexImmW): Reintroduced
function to handle 5th imm8 operand.
(PREFIX_VEX_3A48): Added.
(PREFIX_VEX_3A49): Added.
(VEX_W_3A48_P_2): Added.
(VEX_W_3A49_P_2): Added.
(prefix table): Added entries for PREFIX_VEX_3A48
and PREFIX_VEX_3A49.
(vex table): Added entries for VEX_W_3A48_P_2 and
and VEX_W_3A49_P_2.
* i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
for Vec_Imm4 operands.
* i386-opc.h (enum): Added Vec_Imm4.
(i386_operand_type): Added vec_imm4.
* i386-opc.tbl: Add entries for vpermilp[ds].
* i386-init.h: Regenerated.
* i386-tbl.h: Regenerated.
2010-02-10 Richard Sandiford <r.sandiford@uk.ibm.com>
* ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
and "pwr7". Move "a2" into alphabetical order.
2010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* ppc-dis.c (ppc_opts): Add titan entry.
* ppc-opc.c (TITAN, MULHW): Define.
(powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
2010-02-03 Quentin Neill <quentin.neill@amd.com>
* i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
to CPU_BDVER1_FLAGS
* i386-init.h: Regenerated.
2010-02-03 Anthony Green <green@moxielogic.com>
* moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
0x0f, and make 0x00 an illegal instruction.
2010-01-29 Daniel Jacobowitz <dan@codesourcery.com>
* opcodes/arm-dis.c (struct arm_private_data): New.
(print_insn_coprocessor, print_insn_arm): Update to use struct
arm_private_data.
(is_mapping_symbol, get_map_sym_type): New functions.
(get_sym_code_type): Check the symbol's section. Do not check
mapping symbols.
(print_insn): Default to disassembling ARM mode code. Check
for mapping symbols separately from other symbols. Use
struct arm_private_data.
2010-01-28 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (EXVexWdqScalar): New.
(vex_scalar_w_dq_mode): Likewise.
(prefix_table): Update entries for PREFIX_VEX_3899,
PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
PREFIX_VEX_38BD and PREFIX_VEX_38BF.
(intel_operand_size): Handle vex_scalar_w_dq_mode.
(OP_EX): Likewise.
2010-01-27 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (XMScalar): New.
(EXdScalar): Likewise.
(EXqScalar): Likewise.
(EXqScalarS): Likewise.
(VexScalar): Likewise.
(EXdVexScalarS): Likewise.
(EXqVexScalarS): Likewise.
(XMVexScalar): Likewise.
(scalar_mode): Likewise.
(d_scalar_mode): Likewise.
(d_scalar_swap_mode): Likewise.
(q_scalar_mode): Likewise.
(q_scalar_swap_mode): Likewise.
(vex_scalar_mode): Likewise.
(vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
(vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3,
VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
(intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
q_scalar_mode, q_scalar_swap_mode.
(OP_XMM): Handle scalar_mode.
(OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
and q_scalar_swap_mode.
(OP_VEX): Handle vex_scalar_mode.
2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (Bad_Opcode): New.
(bad_opcode): Likewise.
(dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
(dis386_twobyte): Likewise.
(reg_table): Likewise.
(prefix_table): Likewise.
(x86_64_table): Likewise.
(vex_len_table): Likewise.
(vex_w_table): Likewise.
(mod_table): Likewise.
(rm_table): Likewise.
(float_reg): Likewise.
(reg_table): Remove trailing "(bad)" entries.
(prefix_table): Likewise.
(x86_64_table): Likewise.
(vex_len_table): Likewise.
(vex_w_table): Likewise.
(mod_table): Likewise.
(rm_table): Likewise.
(get_valid_dis386): Handle bytemode 0.
2010-01-23 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.h (VEXScalar): New.
* i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
instructions.
* i386-tbl.h: Regenerated.
2010-01-21 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
* i386-opc.tbl: Add xsave64 and xrstor64.
* i386-tbl.h: Regenerated.
2010-01-20 Nick Clifton <nickc@redhat.com>
PR 11170
* arm-dis.c (print_arm_address): Do not ignore negative bit in PC
based post-indexed addressing.
2010-01-15 Sebastian Pop <sebastian.pop@amd.com>
* i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
* i386-tbl.h: Regenerated.
2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
comments.
2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (names_mm): New.
(intel_names_mm): Likewise.
(att_names_mm): Likewise.
(names_xmm): Likewise.
(intel_names_xmm): Likewise.
(att_names_xmm): Likewise.
(names_ymm): Likewise.
(intel_names_ymm): Likewise.
(att_names_ymm): Likewise.
(print_insn): Set names_mm, names_xmm and names_ymm.
(OP_MMX): Use names_mm, names_xmm and names_ymm.
(OP_XMM): Likewise.
(OP_EM): Likewise.
(OP_EMC): Likewise.
(OP_MXC): Likewise.
(OP_EX): Likewise.
(XMM_Fixup): Likewise.
(OP_VEX): Likewise.
(OP_EX_VexReg): Likewise.
(OP_Vex_2src): Likewise.
(OP_Vex_2src_1): Likewise.
(OP_Vex_2src_2): Likewise.
(OP_REG_VexI4): Likewise.
2010-01-13 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (print_insn): Update comments.
2010-01-12 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (rex_original): Removed.
(ckprefix): Remove rex_original.
(print_insn): Update comments.
2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
* Makefile.in: Regenerate.
* configure: Regenerate.
2010-01-07 Doug Evans <dje@sebabeach.org>
* cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
* fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
* lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
* mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
* xstormy16-ibld.c: Regenerate.
2010-01-06 Quentin Neill <quentin.neill@amd.com>
* i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
* i386-init.h: Regenerated.
2010-01-06 Daniel Gutson <dgutson@codesourcery.com>
* arm-dis.c (print_insn): Fixed search for next symbol and data
dumping condition, and the initial mapping symbol state.
2010-01-05 Doug Evans <dje@sebabeach.org>
* cgen-ibld.in: #include "cgen/basic-modes.h".
* fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
* lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
* mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
* xstormy16-ibld.c: Regenerate.
2010-01-04 Nick Clifton <nickc@redhat.com>
PR 11123
* arm-dis.c (print_insn_coprocessor): Initialise value.
2010-01-04 Edmar Wienskoski <edmar@freescale.com>
* ppc-dis.c (ppc_opts): Add entry for "e500mc64".
2010-01-02 Doug Evans <dje@sebabeach.org>
* cgen-asm.in: Update copyright year.
* cgen-dis.in: Update copyright year.
* cgen-ibld.in: Update copyright year.
* fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
* fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
* frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
* ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
* ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
* iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
* iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
* lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
* lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
* m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
* m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
* m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
* mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
* mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
* mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
* openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
* openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
* xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
* xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
* xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
* xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
For older changes see ChangeLog-2009
Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
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