diff options
Diffstat (limited to 'ld/testsuite/ld-mips-elf/compressed-plt-1-o32-mips16-only.od')
| -rw-r--r-- | ld/testsuite/ld-mips-elf/compressed-plt-1-o32-mips16-only.od | 110 |
1 files changed, 110 insertions, 0 deletions
diff --git a/ld/testsuite/ld-mips-elf/compressed-plt-1-o32-mips16-only.od b/ld/testsuite/ld-mips-elf/compressed-plt-1-o32-mips16-only.od new file mode 100644 index 0000000..e76ca4f --- /dev/null +++ b/ld/testsuite/ld-mips-elf/compressed-plt-1-o32-mips16-only.od @@ -0,0 +1,110 @@ + +.* file format .* + + +Disassembly of section \.plt: + +# Only _dc (direct call from compressed code) functions should have a +# MIPS16 PLT. Note that indirect calls do not influence the choice, +# so f_ic and f_lo_ic have MIPS rather than MIPS16 PLTs. +10100000 <_PROCEDURE_LINKAGE_TABLE_>: +.*: 3c1c1020 lui \$28,0x1020 +.*: 8f990000 lw \$25,0\(\$28\) +.*: 279c0000 addiu \$28,\$28,0 +.*: 031cc023 subu \$24,\$24,\$28 +.*: 03e07821 move \$15,\$31 +.*: 0018c082 srl \$24,\$24,0x2 +.*: 0320f809 jalr \$25 +.*: 2718fffe addiu \$24,\$24,-2 + +10100020 <f_lo_ic@plt>: +.*: 3c0f1020 lui \$15,0x1020 +.*: 8df90008 lw \$25,8\(\$15\) +.*: 03200008 jr \$25 +.*: 25f80008 addiu \$24,\$15,8 + +10100030 <f_lo@plt>: +.*: 3c0f1020 lui \$15,0x1020 +.*: 8df9001c lw \$25,28\(\$15\) +.*: 03200008 jr \$25 +.*: 25f8001c addiu \$24,\$15,28 + +10100040 <f_lo_dc@mips16plt>: +.*: b203 lw \$2,1010004c <f_lo_dc@mips16plt\+0xc> +.*: 9a60 lw \$3,0\(\$2\) +.*: 651a move \$24,\$2 +.*: eb00 jr \$3 +.*: 653b move \$25,\$3 +.*: 6500 nop +.*: .... .... \.word 0x1020000c + +10100050 <f_dc@mips16plt>: +.*: b203 lw \$2,1010005c <f_dc@mips16plt\+0xc> +.*: 9a60 lw \$3,0\(\$2\) +.*: 651a move \$24,\$2 +.*: eb00 jr \$3 +.*: 653b move \$25,\$3 +.*: 6500 nop +.*: .... .... \.word 0x10200010 + +10100060 <f_ic_dc@mips16plt>: +.*: b203 lw \$2,1010006c <f_ic_dc@mips16plt\+0xc> +.*: 9a60 lw \$3,0\(\$2\) +.*: 651a move \$24,\$2 +.*: eb00 jr \$3 +.*: 653b move \$25,\$3 +.*: 6500 nop +.*: .... .... \.word 0x10200014 + +10100070 <f_lo_ic_dc@mips16plt>: +.*: b203 lw \$2,1010007c <f_lo_ic_dc@mips16plt\+0xc> +.*: 9a60 lw \$3,0\(\$2\) +.*: 651a move \$24,\$2 +.*: eb00 jr \$3 +.*: 653b move \$25,\$3 +.*: 6500 nop +.*: .... .... \.word 0x10200018 + +Disassembly of section \.MIPS\.stubs: + +10101000 <_MIPS_STUBS_>: +# Lazy-binding stub for f_ic. +.*: 8f998010 lw \$25,-32752\(\$28\) +.*: 03e07821 move \$15,\$31 +.*: 0320f809 jalr \$25 +.*: 24180009 li \$24,9 + \.\.\. + +Disassembly of section \.text\.a: + +10102000 <testc>: +.*: .... .... jal [0-9a-f]+ <f_dc@mips16plt> +.*: 6500 nop +.*: f030 9b44 lw \$2,-32732\(\$3\) +# ^ global GOT entry for f_ic +.*: .... .... jal [0-9a-f]+ <f_ic_dc@mips16plt> +.*: 6500 nop +.*: f010 9b58 lw \$2,-32744\(\$3\) +# ^ local GOT entry for f_ic_dc@mips16plt +.*: .... .... jal [0-9a-f]+ <f_lo_dc@mips16plt> +.*: 6500 nop +.*: f010 9b5c lw \$2,-32740\(\$3\) +# ^ local GOT entry for f_lo_ic@plt +.*: .... .... jal [0-9a-f]+ <f_lo_ic_dc@mips16plt> +.*: 6500 nop +.*: f030 9b40 lw \$2,-32736\(\$3\) +# ^ local GOT entry for f_lo_ic_dc@mips16plt +.*: e820 jr \$31 + +Disassembly of section \.text\.c: + +10103000 <testlo>: +.*: 24020030 li \$2,48 +# ^ low 16 bits of f_lo@plt +.*: 24020041 li \$2,65 +# ^ low 16 bits of f_lo_dc@mips16plt +.*: 24020020 li \$2,32 +# ^ low 16 bits of f_lo_ic@plt +.*: 24020071 li \$2,113 +# ^ low 16 bits of f_lo_ic_dc@mips16plt + |