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* [9.0 branch][ARM] VFPv2 only supports 16 D registers.Tom Stellard2019-10-101-6/+6
* Merging r371969:Hans Wennborg2019-09-171-0/+4
* Merging r371766:Hans Wennborg2019-09-131-0/+5
* Merging r369705 and r369713 for PR43243:Hans Wennborg2019-09-091-0/+11
* Merging r370073:Hans Wennborg2019-08-281-0/+68
* Merging r369093:Hans Wennborg2019-08-221-0/+6
* Merging r368104 and r368202:Hans Wennborg2019-08-091-0/+20
* Merging r367403:Hans Wennborg2019-08-091-0/+12
* Merging r367323:Hans Wennborg2019-08-011-0/+4
* Merging r366878 and r367301:Hans Wennborg2019-07-311-0/+13
* Merging r366480:Hans Wennborg2019-07-199-2/+1153
* [PowerPC][Clang] Remove use of malloc in mm_mallocQiu Chaofan2019-07-182-40/+8
* Renamed and changed the wording of warn_cconv_ignoredSunil Srivastava2019-07-171-2/+2
* Revert [AArch64] Add support for Transactional Memory Extension (TME)Momchil Velikov2019-07-172-46/+0
* [AArch64] Add support for Transactional Memory Extension (TME)Momchil Velikov2019-07-172-0/+46
* [WebAssembly] Implement thread-local storage (local-exec model)Guanzhong Chen2019-07-161-0/+6
* fix unnamed fiefield issue and add tests for __builtin_preserve_access_index ...Yonghong Song2019-07-161-0/+177
* [AArch64] Implement __jcvt intrinsic from Armv8.3-AKyrylo Tkachov2019-07-162-0/+17
* Finish "Adapt -fsanitize=function to SANITIZER_NON_UNIQUE_TYPEINFO"Stephan Bergmann2019-07-161-0/+22
* Temporarily Revert "fix unnamed fiefield issue and add tests for __builtin_pr...Eric Christopher2019-07-151-177/+0
* Revert "[NewPM] Port Sancov"Leonard Chan2019-07-151-41/+0
* ARM MTE stack sanitizer.Evgeniy Stepanov2019-07-151-0/+19
* fix unnamed fiefield issue and add tests for __builtin_preserve_access_index ...Yonghong Song2019-07-151-0/+177
* [PowerPC] Support -mabi=ieeelongdouble and -mabi=ibmlongdoubleFangrui Song2019-07-151-0/+11
* [clang][Driver][ARM] Favor -mfpu over default CPU featuresAlexandros Lamprineas2019-07-141-1/+1
* [SystemZ] Add support for new cpu architecture - arch13Ulrich Weigand2019-07-129-0/+749
* [X86][PowerPC] Support -mlong-double-128Fangrui Song2019-07-122-0/+16
* [NewPM] Port SancovLeonard Chan2019-07-111-0/+41
* [CodeGen] NVPTX: Switch from atomic.load.add.f32 to atomicrmw faddBenjamin Kramer2019-07-112-2/+2
* [CGDebugInfo] Fix -femit-debug-entry-values crash on os_log_helpersVedant Kumar2019-07-111-2/+11
* GodeGen, NFC: Add test to track emitStoresForConstant behaviorVitaly Buka2019-07-101-0/+66
* [X86] Change the IR sequence for _mm_storeh_pi and _mm_storel_pi to perform t...Craig Topper2019-07-102-8/+4
* [X86] Add guards to some of the x86 intrinsic tests to skip 64-bit mode only ...Craig Topper2019-07-1010-0/+58
* [AArch64] Fix vector vuqadd intrinsics operandsDiogo N. Sampaio2019-07-101-0/+51
* [NFC][AArch64] Fix vector vqtb[lx][1-4]_s8 operandDiogo N. Sampaio2019-07-101-9/+9
* [MS] Treat ignored explicit calling conventions as an explicit __cdeclReid Kleckner2019-07-091-0/+45
* Ignore trailing NullStmts in StmtExprs for GCC compatibility.Aaron Ballman2019-07-091-0/+10
* [BPF] Preserve debuginfo array/union/struct type/access indexYonghong Song2019-07-092-0/+44
* Revert "[BPF] Preserve debuginfo array/union/struct type/access index"Yonghong Song2019-07-092-44/+0
* [BPF] Preserve debuginfo array/union/struct type/access indexYonghong Song2019-07-092-0/+44
* [X86][PPC] Support -mlong-double-64Fangrui Song2019-07-094-20/+62
* [RISCV] Specify registers used for exception handlingAlex Bradbury2019-07-081-0/+10
* [AArch64] Fix scalar vuqadd intrinsics operandsDiogo N. Sampaio2019-07-082-4/+30
* [AArch64] Fix vsqadd scalar intrinsics operandsDiogo N. Sampaio2019-07-082-4/+53
* Treat the range of representable values of floating-point types as [-inf, +in...Richard Smith2019-07-061-34/+8
* [PowerPC] Support constraint code "ww"Fangrui Song2019-07-041-0/+13
* [clang] Add DISuprogram and DIE for a func declDjordje Todorovic2019-06-271-0/+15
* [Clang] Remove unused -split-dwarf and obsolete -enable-split-dwarfAaron Puchert2019-06-263-13/+9
* [clang/DIVar] Emit the flag for params that have unmodified valueDjordje Todorovic2019-06-261-0/+12
* [ARM] Support inline assembler constraints for MVE.Simon Tatham2019-06-251-0/+18
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