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authorSimon Dardis <simon.dardis@imgtec.com>2017-05-04 13:34:17 +0000
committerSimon Dardis <simon.dardis@imgtec.com>2017-05-04 13:34:17 +0000
commit6bae4bb552040cae850681707c0c2f8d65a0b023 (patch)
tree78bffa753f2f79c7b1c56645218f4b97a9a1271e /test/builtins/Unit/floatuntixf_test.c
parentc5b0187af67133194c16bd3018e5a7938ea12f48 (diff)
downloadcompiler-rt-6bae4bb552040cae850681707c0c2f8d65a0b023.tar.gz
[compiler-rt][mips] Add support for quad precision builtins for mips64
Match the builtins that GCC provides for IEEE754 quad precision on MIPS64. Also, enable building them with clang as PR20098 is resolved. Disable tests for xf and xc modes as MIPS doesn't support that mode in hardware or software. Reviewers: slthakur Differential Revision: https://reviews.llvm.org/D32794 git-svn-id: https://llvm.org/svn/llvm-project/compiler-rt/trunk@302147 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/builtins/Unit/floatuntixf_test.c')
-rw-r--r--test/builtins/Unit/floatuntixf_test.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/test/builtins/Unit/floatuntixf_test.c b/test/builtins/Unit/floatuntixf_test.c
index 70ad5f36f..2d71f0f88 100644
--- a/test/builtins/Unit/floatuntixf_test.c
+++ b/test/builtins/Unit/floatuntixf_test.c
@@ -2,6 +2,8 @@
// XFAIL: aarch64
// test fails for aarch64 (see pr32260)
+// UNSUPPORTED: mips
+
//===-- floatuntixf.c - Test __floatuntixf --------------------------------===//
//
// The LLVM Compiler Infrastructure