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| author | Jay Buddhabhatti <jay.buddhabhatti@amd.com> | 2023-01-09 04:33:25 -0800 |
|---|---|---|
| committer | Jay Buddhabhatti <jay.buddhabhatti@amd.com> | 2023-01-09 21:58:35 -0800 |
| commit | 8c23775e88bfc4ffa2b0eaf815d4f79992d344e6 (patch) | |
| tree | 946c9983cc543cfa644054037d2baab45923707d | |
| parent | 51920f0f368b74a0b2c5149105d35fe9dac21c72 (diff) | |
| download | arm-trusted-firmware-8c23775e88bfc4ffa2b0eaf815d4f79992d344e6.tar.gz | |
fix(versal-net): resolve misra 10.6 warnings
Fix below MISRA violation from versal_net_def.h:
- MISRA Violation: MISRA-C:2012 R.10.6
- The value of a composite expression shall not be assigned to an
object with wider essential type
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I74f8e5d63523f33d245a21f8e4f04d30e40b05e7
| -rw-r--r-- | plat/xilinx/versal_net/include/versal_net_def.h | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/plat/xilinx/versal_net/include/versal_net_def.h b/plat/xilinx/versal_net/include/versal_net_def.h index 8cb5bf3a3..45e240e71 100644 --- a/plat/xilinx/versal_net/include/versal_net_def.h +++ b/plat/xilinx/versal_net/include/versal_net_def.h @@ -53,9 +53,9 @@ #define PSX_CRF_RST_TIMESTAMP_OFFSET U(0x33C) -#define APU_PCLI U(0xECB10000) -#define APU_PCLI_CPU_STEP U(0x30) -#define APU_PCLI_CLUSTER_CPU_STEP (4U * APU_PCLI_CPU_STEP) +#define APU_PCLI (0xECB10000ULL) +#define APU_PCLI_CPU_STEP (0x30ULL) +#define APU_PCLI_CLUSTER_CPU_STEP (4ULL * APU_PCLI_CPU_STEP) #define APU_PCLI_CLUSTER_OFFSET U(0x8000) #define APU_PCLI_CLUSTER_STEP U(0x1000) #define PCLI_PREQ_OFFSET U(0x4) @@ -67,13 +67,13 @@ /* Firmware Image Package */ #define VERSAL_NET_PRIMARY_CPU U(0) -#define CORE_0_IEN_POWER_OFFSET (0x00000018U) +#define CORE_0_IEN_POWER_OFFSET (0x00000018ULL) #define APU_PCIL_CORE_X_IEN_POWER_REG(cpu_id) (APU_PCLI + (CORE_0_IEN_POWER_OFFSET + \ - (0x30 * cpu_id))) + (APU_PCLI_CPU_STEP * cpu_id))) #define APU_PCIL_CORE_X_IEN_POWER_MASK (0x00000001U) -#define CORE_0_IDS_POWER_OFFSET (0x0000001CU) +#define CORE_0_IDS_POWER_OFFSET (0x0000001CULL) #define APU_PCIL_CORE_X_IDS_POWER_REG(cpu_id) (APU_PCLI + (CORE_0_IDS_POWER_OFFSET + \ - (0x30 * cpu_id))) + (APU_PCLI_CPU_STEP * cpu_id))) #define APU_PCIL_CORE_X_IDS_POWER_MASK (0x00000001U) #define CORE_PWRDN_EN_BIT_MASK (0x1U) |