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authorManish Pandey <manish.pandey2@arm.com>2022-12-07 13:04:20 +0000
committerManish Pandey <manish.pandey2@arm.com>2022-12-14 14:44:43 +0000
commite61713b00715fc988a970687f9bf53418b81b0ca (patch)
treea0839ade0c4846d2d793f0b9c6453ca5aa66ffbe /bl31
parent825641d6150f05c1bcf6328ec726f46f2e9e37f9 (diff)
downloadarm-trusted-firmware-e61713b00715fc988a970687f9bf53418b81b0ca.tar.gz
fix(el3_runtime): do not save scr_el3 during EL3 entry
scr_el3 registers cannot be modified in lower ELs which means it retains the same value which is stored in the EL3 cpu context structure for the given world. So, we should not save the register when entering to EL3 from lower EL as we have the copy of it present in cpu context. During EL3 execution SCR_EL3 value can be modifed for following cases 1. Changes which is required for EL3 execution, this change is temp and do not need to be saved. 2. Changes which affects lower EL execution, these changes need to be written to cpu context as well and will be retrieved when scr_el3 is restored as part of exiting EL3 Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: I9cc984ddf50e27d09e361bd83b1b3c9f068cf2fd
Diffstat (limited to 'bl31')
-rw-r--r--bl31/aarch64/runtime_exceptions.S7
1 files changed, 4 insertions, 3 deletions
diff --git a/bl31/aarch64/runtime_exceptions.S b/bl31/aarch64/runtime_exceptions.S
index 028355396..614ea717e 100644
--- a/bl31/aarch64/runtime_exceptions.S
+++ b/bl31/aarch64/runtime_exceptions.S
@@ -493,15 +493,16 @@ smc_handler64:
msr spsel, #MODE_SP_EL0
/*
- * Save the SPSR_EL3, ELR_EL3, & SCR_EL3 in case there is a world
+ * Save the SPSR_EL3 and ELR_EL3 in case there is a world
* switch during SMC handling.
* TODO: Revisit if all system registers can be saved later.
*/
mrs x16, spsr_el3
mrs x17, elr_el3
- mrs x18, scr_el3
stp x16, x17, [x6, #CTX_EL3STATE_OFFSET + CTX_SPSR_EL3]
- str x18, [x6, #CTX_EL3STATE_OFFSET + CTX_SCR_EL3]
+
+ /* Load SCR_EL3 */
+ mrs x18, scr_el3
/* Clear flag register */
mov x7, xzr