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| author | Madhukar Pappireddy <madhukar.pappireddy@arm.com> | 2020-01-27 13:37:51 -0600 |
|---|---|---|
| committer | Madhukar Pappireddy <madhukar.pappireddy@arm.com> | 2020-03-11 11:24:55 -0500 |
| commit | 26d1e0c330981505315408c2537b87854d15d720 (patch) | |
| tree | 915ac886e732e92c0f4a8a8a85722736d9c02d93 /bl32 | |
| parent | 25d740c45e14d42c9284ab1788a8d7b516608ece (diff) | |
| download | arm-trusted-firmware-26d1e0c330981505315408c2537b87854d15d720.tar.gz | |
fconf: necessary modifications to support fconf in BL31 & SP_MIN
Necessary infrastructure added to integrate fconf framework in BL31 & SP_MIN.
Created few populator() functions which parse HW_CONFIG device tree
and registered them with fconf framework. Many of the changes are
only applicable for fvp platform.
This patch:
1. Adds necessary symbols and sections in BL31, SP_MIN linker script
2. Adds necessary memory map entry for translation in BL31, SP_MIN
3. Creates an abstraction layer for hardware configuration based on
fconf framework
4. Adds necessary changes to build flow (makefiles)
5. Minimal callback to read hw_config dtb for capturing properties
related to GIC(interrupt-controller node)
6. updates the fconf documentation
Change-Id: Ib6292071f674ef093962b9e8ba0d322b7bf919af
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
Diffstat (limited to 'bl32')
| -rw-r--r-- | bl32/sp_min/sp_min.ld.S | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/bl32/sp_min/sp_min.ld.S b/bl32/sp_min/sp_min.ld.S index 6997a7fdb..3231f9aec 100644 --- a/bl32/sp_min/sp_min.ld.S +++ b/bl32/sp_min/sp_min.ld.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -55,6 +55,11 @@ SECTIONS KEEP(*(rt_svc_descs)) __RT_SVC_DESCS_END__ = .; + . = ALIGN(8); + __FCONF_POPULATOR_START__ = .; + KEEP(*(.fconf_populator)) + __FCONF_POPULATOR_END__ = .; + #if ENABLE_PMF /* Ensure 4-byte alignment for descriptors and ensure inclusion */ . = ALIGN(4); @@ -92,6 +97,11 @@ SECTIONS KEEP(*(rt_svc_descs)) __RT_SVC_DESCS_END__ = .; + . = ALIGN(8); + __FCONF_POPULATOR_START__ = .; + KEEP(*(.fconf_populator)) + __FCONF_POPULATOR_END__ = .; + /* * Ensure 4-byte alignment for cpu_ops so that its fields are also * aligned. Also ensure cpu_ops inclusion. |