diff options
author | Max Shvetsov <maksims.svecovs@arm.com> | 2019-10-31 08:35:02 +0000 |
---|---|---|
committer | Max Shvetsov <maksims.svecovs@arm.com> | 2019-11-14 11:23:02 +0000 |
commit | f2976bdda89d466c35d66fb480e1b355703c9810 (patch) | |
tree | de908fc45f1fb860318ec3d3ec93a6aa3f0562d6 /drivers/delay_timer | |
parent | 5d71d3f624873884a43179aaaafb06cb5a77d507 (diff) | |
download | arm-trusted-firmware-f2976bdda89d466c35d66fb480e1b355703c9810.tar.gz |
TF-A: Fix non-standard frequency issue in udelay
Previous implementation of timers assumed that clk_div has pretty
representation in MHz (10MHz, 100MHz, etc). Unusual frequencies
(99.99MHz) were causing assertion error and made udelay unusable.
Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com>
Change-Id: Ic915fff224369d113fd9f8edbcfff169fca8beac
Diffstat (limited to 'drivers/delay_timer')
-rw-r--r-- | drivers/delay_timer/delay_timer.c | 20 |
1 files changed, 15 insertions, 5 deletions
diff --git a/drivers/delay_timer/delay_timer.c b/drivers/delay_timer/delay_timer.c index 8c2996ec3..a3fd7bfeb 100644 --- a/drivers/delay_timer/delay_timer.c +++ b/drivers/delay_timer/delay_timer.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -27,23 +27,32 @@ void udelay(uint32_t usec) (timer_ops->clk_div != 0U) && (timer_ops->get_timer_value != NULL)); - uint32_t start, delta, total_delta; + uint32_t start, delta; + uint64_t total_delta; - assert(usec < (UINT32_MAX / timer_ops->clk_div)); + assert(usec < (UINT64_MAX / timer_ops->clk_div)); start = timer_ops->get_timer_value(); /* Add an extra tick to avoid delaying less than requested. */ total_delta = - div_round_up(usec * timer_ops->clk_div, + div_round_up((uint64_t)usec * timer_ops->clk_div, timer_ops->clk_mult) + 1U; + /* + * Precaution for the total_delta ~ UINT32_MAX and the fact that we + * cannot catch every tick of the timer. + * For example 100MHz timer over 25MHz APB will miss at least 4 ticks. + * 1000U is an arbitrary big number which is believed to be sufficient. + */ + assert(total_delta < (UINT32_MAX - 1000U)); do { /* * If the timer value wraps around, the subtraction will * overflow and it will still give the correct result. + * delta is decreasing counter */ - delta = start - timer_ops->get_timer_value(); /* Decreasing counter */ + delta = start - timer_ops->get_timer_value(); } while (delta < total_delta); } @@ -54,6 +63,7 @@ void udelay(uint32_t usec) ***********************************************************/ void mdelay(uint32_t msec) { + assert((msec * 1000UL) < UINT32_MAX); udelay(msec * 1000U); } |