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author | Andre Przywara <andre.przywara@arm.com> | 2023-02-03 15:23:59 +0000 |
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committer | Andre Przywara <andre.przywara@arm.com> | 2023-03-20 13:37:36 +0000 |
commit | 16e3ddba1f049106387dfe21989243d2fc4cf061 (patch) | |
tree | cccc9940ea66f1efb74565a76ed8d3ffe3e7ed61 /include/lib | |
parent | c41b8e90f75a7db82ee4384e3ffa5d8b9b8080e5 (diff) | |
download | arm-trusted-firmware-16e3ddba1f049106387dfe21989243d2fc4cf061.tar.gz |
fix(spe): drop SPE EL2 context switch code
At the moment we hardcode the SPE functionality to be available on the
non-secure side only, by setting MDCR_EL3.NSPB accordingly.
This also means that the secure world cannot use SPE, so there is no
need to context switch the PMSCR_EL2 register.
Drop the SPE bits from the EL2 context switch code. If any of the other
EL2 worlds wish to start using SPE, this can be brought back.
Change-Id: Ie0fedb2aeb722a2c9db316051fbbe57ca0e3c0c9
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Diffstat (limited to 'include/lib')
-rw-r--r-- | include/lib/el3_runtime/aarch64/context.h | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/include/lib/el3_runtime/aarch64/context.h b/include/lib/el3_runtime/aarch64/context.h index 31d8f070c..4cbda36b6 100644 --- a/include/lib/el3_runtime/aarch64/context.h +++ b/include/lib/el3_runtime/aarch64/context.h @@ -514,10 +514,6 @@ void el1_sysregs_context_restore(el1_sysregs_t *regs); #if CTX_INCLUDE_EL2_REGS void el2_sysregs_context_save_common(el2_sysregs_t *regs); void el2_sysregs_context_restore_common(el2_sysregs_t *regs); -#if ENABLE_SPE_FOR_LOWER_ELS -void el2_sysregs_context_save_spe(el2_sysregs_t *regs); -void el2_sysregs_context_restore_spe(el2_sysregs_t *regs); -#endif /* ENABLE_SPE_FOR_LOWER_ELS */ #if CTX_INCLUDE_MTE_REGS void el2_sysregs_context_save_mte(el2_sysregs_t *regs); void el2_sysregs_context_restore_mte(el2_sysregs_t *regs); |