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author | Boyan Karatotev <boyan.karatotev@arm.com> | 2023-03-08 16:29:26 +0000 |
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committer | Boyan Karatotev <boyan.karatotev@arm.com> | 2023-05-05 13:16:18 +0100 |
commit | 0d1229473ef24e962607adb12838eb2e9bb10077 (patch) | |
tree | 625048371decacfa9a047baf47b0b4b51e81428b /lib/el3_runtime | |
parent | c194aa0c6cac310a54e796f4a4dcf4563cb83128 (diff) | |
download | arm-trusted-firmware-0d1229473ef24e962607adb12838eb2e9bb10077.tar.gz |
refactor(cm): make SVE and SME build dependencies logical
Currently, enabling SME forces SVE off. However, the SME enablement
requires SVE to be enabled, which is reflected in code. This is the
opposite of what the build flags require.
Further, the few platforms that enable SME also explicitly enable SVE.
Their platform.mk runs after the defaults.mk file so this override never
materializes. As a result, the override is only present on the
commandline.
Change it to something sensible where if SME is on then code can rely on
SVE being on too. Do this with a check in the Makefile as it is the more
widely used pattern. This maintains all valid use cases but subtly
changes corner cases no one uses at the moment to require a slightly
different combination of flags.
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: If7ca3972ebc3c321e554533d7bc81af49c2472be
Diffstat (limited to 'lib/el3_runtime')
-rw-r--r-- | lib/el3_runtime/aarch64/context_mgmt.c | 41 |
1 files changed, 21 insertions, 20 deletions
diff --git a/lib/el3_runtime/aarch64/context_mgmt.c b/lib/el3_runtime/aarch64/context_mgmt.c index e38b34dcd..744e4f910 100644 --- a/lib/el3_runtime/aarch64/context_mgmt.c +++ b/lib/el3_runtime/aarch64/context_mgmt.c @@ -517,12 +517,13 @@ static void manage_extensions_nonsecure(bool el2_unused, cpu_context_t *ctx) amu_enable(el2_unused, ctx); } - /* Enable SME, SVE, and FPU/SIMD for non-secure world. */ + /* Enable SVE and FPU/SIMD */ + if (is_feat_sve_supported()) { + sve_enable(ctx); + } + if (is_feat_sme_supported()) { sme_enable(ctx); - } else if (is_feat_sve_supported()) { - /* Enable SVE and FPU/SIMD for non-secure world. */ - sve_enable(ctx); } if (is_feat_mpam_supported()) { @@ -553,22 +554,7 @@ static void manage_extensions_nonsecure(bool el2_unused, cpu_context_t *ctx) static void manage_extensions_secure(cpu_context_t *ctx) { #if IMAGE_BL31 - - if (is_feat_sme_supported()) { - if (ENABLE_SME_FOR_SWD) { - /* - * Enable SME, SVE, FPU/SIMD in secure context, secure manager - * must ensure SME, SVE, and FPU/SIMD context properly managed. - */ - sme_enable(ctx); - } else { - /* - * Disable SME, SVE, FPU/SIMD in secure context so non-secure - * world can safely use the associated registers. - */ - sme_disable(ctx); - } - } else if (is_feat_sve_supported()) { + if (is_feat_sve_supported()) { if (ENABLE_SVE_FOR_SWD) { /* * Enable SVE and FPU in secure context, secure manager must @@ -585,6 +571,21 @@ static void manage_extensions_secure(cpu_context_t *ctx) } } + if (is_feat_sme_supported()) { + if (ENABLE_SME_FOR_SWD) { + /* + * Enable SME, SVE, FPU/SIMD in secure context, secure manager + * must ensure SME, SVE, and FPU/SIMD context properly managed. + */ + sme_enable(ctx); + } else { + /* + * Disable SME, SVE, FPU/SIMD in secure context so non-secure + * world can safely use the associated registers. + */ + sme_disable(ctx); + } + } #endif /* IMAGE_BL31 */ } |