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| author | Bipin Ravi <bipin.ravi@arm.com> | 2022-11-11 05:35:21 +0100 |
|---|---|---|
| committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | 2022-11-11 05:35:21 +0100 |
| commit | 2b138c6b314c458b70c09b628acf0c055dd25a0b (patch) | |
| tree | f57a92480b245542c1521d6ff4fd345378d3fbcb /lib | |
| parent | 79bf51c2ffc73d3f789bd6c781b4ee1ee13cf5eb (diff) | |
| parent | 4fdeaffe860a998e8503b847ecceec60dcddcdc5 (diff) | |
| download | arm-trusted-firmware-2b138c6b314c458b70c09b628acf0c055dd25a0b.tar.gz | |
Merge "fix(cpus): workaround for Cortex-A77 erratum 2743100" into integration
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/cpus/aarch64/cortex_a77.S | 31 | ||||
| -rw-r--r-- | lib/cpus/cpu-ops.mk | 8 |
2 files changed, 39 insertions, 0 deletions
diff --git a/lib/cpus/aarch64/cortex_a77.S b/lib/cpus/aarch64/cortex_a77.S index 8cafe4a06..2882df7bd 100644 --- a/lib/cpus/aarch64/cortex_a77.S +++ b/lib/cpus/aarch64/cortex_a77.S @@ -227,6 +227,30 @@ func check_errata_2356587 b cpu_rev_var_ls endfunc check_errata_2356587 + /* ----------------------------------------------------------------- + * Errata Workaround for Cortex A77 Errata #2743100 + * This applies to revisions r0p0, r1p0, and r1p1 and is still open. + * x0: variant[4:7] and revision[0:3] of current cpu. + * Shall clobber: x0-x17 + * ----------------------------------------------------------------- + */ +func errata_a77_2743100_wa + mov x17, x30 + bl check_errata_2743100 + cbz x0, 1f + + /* dsb before isb of power down sequence */ + dsb sy +1: + ret x17 +endfunc errata_a77_2743100_wa + +func check_errata_2743100 + /* Applies to r0p0, r1p0, and r1p1 right now */ + mov x1, #0x11 + b cpu_rev_var_ls +endfunc check_errata_2743100 + func check_errata_cve_2022_23960 #if WORKAROUND_CVE_2022_23960 mov x0, #ERRATA_APPLIES @@ -330,6 +354,12 @@ func cortex_a77_core_pwr_dwn mrs x0, CORTEX_A77_CPUPWRCTLR_EL1 orr x0, x0, #CORTEX_A77_CPUPWRCTLR_EL1_CORE_PWRDN_BIT msr CORTEX_A77_CPUPWRCTLR_EL1, x0 +#if ERRATA_A77_2743100 + mov x15, x30 + bl cpu_get_rev_var + bl errata_a77_2743100_wa + mov x30, x15 +#endif /* ERRATA_A77_2743100 */ isb ret endfunc cortex_a77_core_pwr_dwn @@ -354,6 +384,7 @@ func cortex_a77_errata_report report_errata ERRATA_A77_1925769, cortex_a77, 1925769 report_errata ERRATA_A77_1946167, cortex_a77, 1946167 report_errata ERRATA_A77_2356587, cortex_a77, 2356587 + report_errata ERRATA_A77_2743100, cortex_a77, 2743100 report_errata WORKAROUND_CVE_2022_23960, cortex_a77, cve_2022_23960 ldp x8, x30, [sp], #16 diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk index eb6d20f38..f19c16e49 100644 --- a/lib/cpus/cpu-ops.mk +++ b/lib/cpus/cpu-ops.mk @@ -315,6 +315,10 @@ ERRATA_A77_2356587 ?=0 # to revisions <= r1p1 of the Cortex A77 cpu. ERRATA_A77_1800714 ?=0 +# Flag to apply erratum 2743100 workaround during power down. This erratum +# applies to revisions r0p0, r1p0, and r1p1, it is still open. +ERRATA_A77_2743100 ?=0 + # Flag to apply erratum 1688305 workaround during reset. This erratum applies # to revisions r0p0 - r1p0 of the A78 cpu. ERRATA_A78_1688305 ?=0 @@ -948,6 +952,10 @@ $(eval $(call add_define,ERRATA_A77_2356587)) $(eval $(call assert_boolean,ERRATA_A77_1800714)) $(eval $(call add_define,ERRATA_A77_1800714)) +# Process ERRATA_A77_2743100 flag +$(eval $(call assert_boolean,ERRATA_A77_2743100)) +$(eval $(call add_define,ERRATA_A77_2743100)) + # Process ERRATA_A78_1688305 flag $(eval $(call assert_boolean,ERRATA_A78_1688305)) $(eval $(call add_define,ERRATA_A78_1688305)) |