diff options
author | Dimitris Papastamos <dimitris.papastamos@arm.com> | 2017-06-20 09:25:10 +0100 |
---|---|---|
committer | Dimitris Papastamos <dimitris.papastamos@arm.com> | 2017-06-22 16:42:23 +0100 |
commit | 6f512a3dfd61662dbdae4912fb6a320ae4d754d5 (patch) | |
tree | c82ac1f98b720f0a1f9239be24510e6ba592b14c /lib | |
parent | e036660aabe4c49ef34fb154b00ecace9b91322e (diff) | |
download | arm-trusted-firmware-6f512a3dfd61662dbdae4912fb6a320ae4d754d5.tar.gz |
aarch32: Apply workaround for errata 813419 of Cortex-A57
TLBI instructions for monitor mode won't have the desired effect under
specific circumstances in Cortex-A57 r0p0. The workaround is to
execute DSB and TLBI twice each time.
Even though this errata is only needed in r0p0, the current errata
framework is not prepared to apply run-time workarounds. The current one
is always applied if compiled in, regardless of the CPU or its revision.
The `DSB` instruction used when initializing the translation tables has
been changed to `DSB ISH` as an optimization and to be consistent with
the barriers used for the workaround.
NOTE: This workaround is present in AArch64 TF and already enabled by
default on Juno.
Change-Id: I10b0baa304ed64b13b7b26ea766e61461e759dfa
Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
Diffstat (limited to 'lib')
-rw-r--r-- | lib/xlat_tables/aarch32/xlat_tables.c | 2 | ||||
-rw-r--r-- | lib/xlat_tables_v2/aarch32/xlat_tables_arch.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/lib/xlat_tables/aarch32/xlat_tables.c b/lib/xlat_tables/aarch32/xlat_tables.c index 3c9051c34..9c1562407 100644 --- a/lib/xlat_tables/aarch32/xlat_tables.c +++ b/lib/xlat_tables/aarch32/xlat_tables.c @@ -149,7 +149,7 @@ void enable_mmu_secure(unsigned int flags) * and translation register writes are committed * before enabling the MMU */ - dsb(); + dsbish(); isb(); sctlr = read_sctlr(); diff --git a/lib/xlat_tables_v2/aarch32/xlat_tables_arch.c b/lib/xlat_tables_v2/aarch32/xlat_tables_arch.c index afc65e7d0..40fd2d0b0 100644 --- a/lib/xlat_tables_v2/aarch32/xlat_tables_arch.c +++ b/lib/xlat_tables_v2/aarch32/xlat_tables_arch.c @@ -141,7 +141,7 @@ void enable_mmu_internal_secure(unsigned int flags, uint64_t *base_table) * and translation register writes are committed * before enabling the MMU */ - dsb(); + dsbish(); isb(); sctlr = read_sctlr(); |