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| author | Varun Wadekar <vwadekar@nvidia.com> | 2015-07-31 10:15:41 +0530 |
|---|---|---|
| committer | Varun Wadekar <vwadekar@nvidia.com> | 2015-07-31 10:26:22 +0530 |
| commit | 2ee2c4f0bb5f764cba9f306d1ccd6ef536dd1d59 (patch) | |
| tree | 13e08e84202a59d36aa67921a62257c968750b9a /plat/nvidia/tegra | |
| parent | 0bf1b022f29147bdbab825947c07ed4509eac7fc (diff) | |
| download | arm-trusted-firmware-2ee2c4f0bb5f764cba9f306d1ccd6ef536dd1d59.tar.gz | |
Tegra132: set TZDRAM_BASE to 0xF5C00000
The TZDRAM base on the reference platform has been bumped up due to
some BL2 memory cleanup. Platforms can also use a different TZDRAM
base by setting TZDRAM_BASE=<value> in the build command line.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Diffstat (limited to 'plat/nvidia/tegra')
| -rw-r--r-- | plat/nvidia/tegra/soc/t132/platform_t132.mk | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/plat/nvidia/tegra/soc/t132/platform_t132.mk b/plat/nvidia/tegra/soc/t132/platform_t132.mk index 1be13e919..69d62964f 100644 --- a/plat/nvidia/tegra/soc/t132/platform_t132.mk +++ b/plat/nvidia/tegra/soc/t132/platform_t132.mk @@ -31,7 +31,7 @@ TEGRA_BOOT_UART_BASE := 0x70006300 $(eval $(call add_define,TEGRA_BOOT_UART_BASE)) -TZDRAM_BASE := 0xF1C00000 +TZDRAM_BASE := 0xF5C00000 $(eval $(call add_define,TZDRAM_BASE)) PLATFORM_CLUSTER_COUNT := 1 |