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author | Nishanth Menon <nm@ti.com> | 2021-03-26 00:34:17 -0500 |
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committer | Nishanth Menon <nm@ti.com> | 2021-03-26 02:25:35 -0500 |
commit | 2fb5312f61a7de8b7a70e1639199c4f14a10b6f9 (patch) | |
tree | 75176ce2df9e9b50274076484bb4062ea66ec84b /plat/ti | |
parent | 9ad1031408ce381b415c59ad15a9eb745bcff471 (diff) | |
download | arm-trusted-firmware-2fb5312f61a7de8b7a70e1639199c4f14a10b6f9.tar.gz |
plat: ti: k3: board: lite: Increase SRAM size to account for additional table
We actually have additional table entries than what we accounted for in
our size. MAX_XLAT_TABLES is 8, but really we could be using upto 10
depending on the platform. So, we need an extra 8K space in.
This gets exposed with DEBUG=1 and assert checks trigger, which for some
reason completely escaped testing previously.
ASSERT: lib/xlat_tables_v2/xlat_tables_core.c:97
BACKTRACE: START: assert
Signed-off-by: Nishanth Menon <nm@ti.com>
Change-Id: I5c5d04440ef1fccfaf2317066f3abbc0ec645903
Diffstat (limited to 'plat/ti')
-rw-r--r-- | plat/ti/k3/board/lite/include/board_def.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/plat/ti/k3/board/lite/include/board_def.h b/plat/ti/k3/board/lite/include/board_def.h index 7c7ea62c1..b363bea22 100644 --- a/plat/ti/k3/board/lite/include/board_def.h +++ b/plat/ti/k3/board/lite/include/board_def.h @@ -22,7 +22,7 @@ * a single cluster of 4 processor. */ #define SEC_SRAM_BASE 0x70000000 /* Base of SRAM */ -#define SEC_SRAM_SIZE 0x0001a000 /* 104k */ +#define SEC_SRAM_SIZE 0x0001c000 /* 112k */ #define PLAT_MAX_OFF_STATE U(2) #define PLAT_MAX_RET_STATE U(1) |