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authorMarc Bonnici <marc.bonnici@arm.com>2021-12-15 18:00:50 +0000
committerMarc Bonnici <marc.bonnici@arm.com>2022-05-13 15:51:23 +0100
commitf0143004e548582760aacd6f15f5499b18081a69 (patch)
tree0ef7c8766787d1a268296cea9d1a30220bc8bddf /services/std_svc/spm
parentf0c25a082fc8b891d4d21518028118561caa4735 (diff)
downloadarm-trusted-firmware-f0143004e548582760aacd6f15f5499b18081a69.tar.gz
feat(spmc): enable the SPMC to pass the linear core ID in a register
Add TF-A implementation defined behaviour to provide the linear core ID in the x4 register when bringing up an SP. Signed-off-by: Marc Bonnici <marc.bonnici@arm.com> Change-Id: I6cb215841097b264d252ec0262b0b7272be99d41
Diffstat (limited to 'services/std_svc/spm')
-rw-r--r--services/std_svc/spm/el3_spmc/spmc_setup.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/services/std_svc/spm/el3_spmc/spmc_setup.c b/services/std_svc/spm/el3_spmc/spmc_setup.c
index 7b23c9e3b..af5219d02 100644
--- a/services/std_svc/spm/el3_spmc/spmc_setup.c
+++ b/services/std_svc/spm/el3_spmc/spmc_setup.c
@@ -44,6 +44,12 @@ void spmc_el1_sp_setup(struct secure_partition_desc *sp,
DISABLE_ALL_EXCEPTIONS);
/*
+ * TF-A Implementation defined behaviour to provide the linear
+ * core ID in the x4 register.
+ */
+ ep_info->args.arg4 = (uintptr_t) plat_my_core_pos();
+
+ /*
* Check whether setup is being performed for the primary or a secondary
* execution context. In the latter case, indicate to the SP that this
* is a warm boot.