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| author | Manish Pandey <manish.pandey2@arm.com> | 2021-10-05 16:50:23 +0200 |
|---|---|---|
| committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | 2021-10-05 16:50:23 +0200 |
| commit | a6db44ad1658f1418e3fe3cf13708771ab3bf350 (patch) | |
| tree | 35d81632ae254badd1d5d01662c95f14d3e956c0 /tools | |
| parent | 64e8ac6f2a41926430e896ccd78dfcdc9cb315ea (diff) | |
| parent | 899108601a0c3b08ead5e686d92ea0794700ff35 (diff) | |
| download | arm-trusted-firmware-a6db44ad1658f1418e3fe3cf13708771ab3bf350.tar.gz | |
Merge changes Ie7c0eaf2,I11d882f3,I3f173ac4,If1fa12bf,I3e3a202f, ... into integration
* changes:
feat(plat/rcar3): keep RWDT enabled
feat(drivers/rcar3): add extra offset if booting B-side
feat(plat/rcar3): modify LifeC register setting for R-Car D3
feat(plat/rcar3): modify SWDT counter setting for R-Car D3
feat(plat/rcar3): update DDR setting for R-Car D3
feat(plat/rcar3): remove access to RMSTPCRn registers in R-Car D3
feat(plat/rcar3): add process of SSCG setting for R-Car D3
feat(plat/rcar3): add process to back up X6 and X7 register's value
feat(plat/rcar3): modify operation register from SYSCISR to SYSCISCR
feat(plat/rcar3): add SYSCEXTMASK bit set/clear in scu_power_up
feat(plat/rcar3): change the memory map for OP-TEE
feat(plat/rcar3): use PRR cut to determine DRAM size on M3
feat(plat/rcar3): apply ERRATA_A53_1530924 and ERRATA_A57_1319537
fix(plat/rcar3): fix disabling MFIS write protection for R-Car D3
fix(plat/rcar3): fix eMMC boot support for R-Car D3
fix(plat/rcar3): fix version judgment for R-Car D3
fix(plat/rcar3): fix source file to make about GICv2
fix(drivers/rcar3): console: fix a return value of console_rcar_init
Diffstat (limited to 'tools')
| -rw-r--r-- | tools/renesas/rcar_layout_create/sa6.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/tools/renesas/rcar_layout_create/sa6.c b/tools/renesas/rcar_layout_create/sa6.c index fa828b9ac..8fafdaded 100644 --- a/tools/renesas/rcar_layout_create/sa6.c +++ b/tools/renesas/rcar_layout_create/sa6.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2017, Renesas Electronics Corporation. All rights reserved. + * Copyright (c) 2015-2021, Renesas Electronics Corporation. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -96,7 +96,7 @@ #define RCAR_BL32DST_ADDRESS (0x44100000U) #define RCAR_BL32DST_ADDRESSH (0x00000000U) /* Destination size for BL32 */ -#define RCAR_BL32DST_SIZE (0x00040000U) +#define RCAR_BL32DST_SIZE (0x00080000U) /* Destination address for BL33 */ #define RCAR_BL33DST_ADDRESS (0x50000000U) #define RCAR_BL33DST_ADDRESSH (0x00000000U) |