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* refactor(stm32mp1): remove the support of calibration resultPatrick Delaunay2022-01-051-13/+1
| | | | | | | | | | | | | | | | | | | | | | | The support of a predefined DDR PHY tuning result is removed for STM32MP1 driver because it is not needed at the supported frequency when built-in calibration is executed. The calibration parameters were provided in the device tree by the optional node "st,phy-cal", activated in ddr helper file by the compilation flag DDR_PHY_CAL_SKIP and filled with values generated by CubeMX. This patch - updates the binding file to remove "st,phy-cal" support - updates the device trees and remove the associated defines - simplifies the STM32MP1 DDR driver and remove the support of the optional "st,phy-cal" After this patch the built-in calibration is always executed. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Change-Id: I3fc445520c259f7f05730aefc25e64b328bf7159
* fix(fdts stm32mp1): correct copyright datesYann Gautier2021-11-051-1/+1
| | | | | | | Add 2021 year in the file header Copyright line. Change-Id: I09f7bef1f746c429ff308286169354e58648a1cd Signed-off-by: Yann Gautier <yann.gautier@st.com>
* fix(fdts stm32mp1): use 'kHz' as kilohertz abbreviationPatrick Delaunay2021-10-281-1/+1
| | | | | | | | The kilohertz unit abbreviation should read 'kHz' in DDR settings files of stm32mp15. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Change-Id: Ifa363094f58dd943ef78c653c3e470a216739b41
* fdts: stm32mp1: realign device tree with kernelYann Gautier2020-09-241-25/+24
| | | | | | | | | | | | | | | | | | | | | | | | There is one dtsi file per SoC version: - STM32MP151: common part for all version, Single Cortex-A7 - STM32MP153: Dual Cortex-A7 - STM32MP157: + GPU and DSI, but not needed for TF-A The STM32MP15xC include a cryptography peripheral, add it in a dedicated file. There are 4 packages available, for which the IOs number change. Have one file for each package. The 2 packages AB and AD are added. STM32157A-DK1 and STM32MP157C-DK2 share most of their features, a common dkx file is then created. Some reordering is done in other files, and realign with kernel DT files. The DDR files are generated with our internal tool, no changes in the registers values. Change-Id: I9f2ef00306310abe34b94c2f10fc7a77a10493d1 Signed-off-by: Yann Gautier <yann.gautier@st.com>
* fdts: stm32mp1: realign device tree files with internal devsYann Gautier2019-06-171-7/+6
| | | | | | | | | | | | | | | Update DDR parameters to version 1.45. Remove useless sdmmc1_dir_pins_b node. Add USART3 and UART7 nodes. Correct a PMIC value for USB regulator. Add TIMER12, TIMER15, CRYP, HASH and USBOTG_HS nodes. Update DTSI file for SDMMC compatible, but overwrite it with the former name. Move BSEC board_id node to boards DTS files, as this OTP is specific to STMicroelectronics boards. Change-Id: If4d2fe090c6a8368afe8e21e5ac70579911d3939 Signed-off-by: Yann Gautier <yann.gautier@st.com>
* stm32mp1: introduce STM32MP1 discovery boardsYann Gautier2019-02-141-0/+121
Add the device tree files to support the 2 discovery boards: DK1 & DK2. Change-Id: I90b4797dc69bd0aab1b643a72c932ead48a03c1f Signed-off-by: Yann Gautier <yann.gautier@st.com>