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* refactor(stm32mp15-fdts): remove unused PMIC nodesYann Gautier2023-01-041-11/+0
| | | | | | | | The onkey and watchdog features of the PMIC are not used in TF-A for STM32MP15 boards. Remove the nodes from DT. Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I2933e0bdc5843fcb549a817742106d9c66097869
* style(stm32mp15-fdts): remove extra spaces on vbusYann Gautier2023-01-041-3/+3
| | | | | | | | | | Remove extra spaces before the closing brace of vbus_otg node in stm32mp157c-ed1 DT file, before the vbus_sw label, and before the closing brace of vbus_sw node. Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I2e77e0a043594876551ed8d77ed3d13f6a098c81
* refactor(stm32mp15-fdts): remove RCC secure-statusYann Gautier2022-08-261-1/+0
| | | | | | | | | | | The RCC security is managed with a dedicated compatible: "st,stm32mp1-rcc-secure" [1]. Remove useless secure-status property in boards rcc nodes. [1] 812daf916c ("feat(st): update the security based on new compatible") Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: Iff31044ade78dd9c432120dce65375fe2b0d36d6
* refactor(stm32mp1-fdts): remove nvmem_layout nodePatrick Delaunay2022-03-281-20/+0
| | | | | | | | Remove the nvmem_layout node with compatible "st,stm32-nvmem-layout" no more used in TF-A code to simplify the device tree. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Change-Id: I3748b20b7d3c60ee64ead15541fac1fd12656600
* feat(stm32mp1-fdts): update NVMEM nodesNicolas Le Bayon2022-01-281-2/+1
| | | | | | | | | | Set non-secure property on platform secure OTP nodes that non-secure world is allowed to access through secure world services. These are the SoC MAC address and the ST boards board_id OTPs. Most of these were already done but it was missing for ED1 board. Change-Id: Idfa6322d9d5c35285706d0b2d32ae09af38684a7 Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
* feat(stm32mp1-fdts): add nvmem_layout node and OTP definitionsNicolas Le Bayon2022-01-281-1/+21
| | | | | | | | | | | | | A new nvmem_layout node includes nvmem platform-dependent layout information, such as OTP NVMEM cell lists (phandle, name). This list allows easy access to OTP offsets defined in BSEC node, where more OTP definitions with offsets in bytes and length have been added (replace hard-coded values). Each board may redefine this list, especially for board_id info. Change-Id: I910ae671b3bf3320ee6500fecc9ec335ae67bbda Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com>
* refactor(stm32mp1-fdts): update regulator descriptionPascal Paillet2021-12-221-2/+3
| | | | | | | | | | Update regulator description to match with pmic driver updates. vref_ddr does not support over-current protection. vtt_ddr is set to sink source mode. Change-Id: I725f35b091ca8c230994c2b5f81693ebc97bf4aa Signed-off-by: Pascal Paillet <p.paillet@st.com> Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
* fix(fdts stm32mp1): correct copyright datesYann Gautier2021-11-051-1/+1
| | | | | | | Add 2021 year in the file header Copyright line. Change-Id: I09f7bef1f746c429ff308286169354e58648a1cd Signed-off-by: Yann Gautier <yann.gautier@st.com>
* fix(fdts stm32mp1): update PLL nodes for ED1/EV1 boardsYann Gautier2021-10-281-7/+15
| | | | | | | | | Align STM32MP157C-ED1/EV1 boards PLL nodes with what is done for DK boards. Change-Id: I91be408ea1d9b0474caf4965175df33792b7e11e Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
* fix(fdts stm32mp1): set ETH clock on PLL4P on ST boardsYann Gautier2021-10-281-1/+1
| | | | | | | Set Ethernet source clock on PLL4P. This is required to enable PTP. Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Change-Id: Ia64fbb681d3f04f2b90f373c5eb044f5daa2836c
* feat(fdts stm32mp1): align DT with latest kernelYann Gautier2021-10-281-2/+1
| | | | | | | Update STM32MP1 device tree files with kernel 5.15. Change-Id: Id405a79e18c61e80cd2292a4f87b7b9641df9c82 Signed-off-by: Yann Gautier <yann.gautier@st.com>
* fdts: add missing hash node in STM32MP157C-ED1 board DTYann Gautier2020-10-131-0/+4
| | | | | | | | Without this node, the board fails to boot and panics in the function stm32mp_init_auth(). Change-Id: Ia54924410dac2a8c94dd6e45d7e93977fe7d87e2 Signed-off-by: Yann Gautier <yann.gautier@st.com>
* fdts: stm32mp1: realign device tree with kernelYann Gautier2020-09-241-88/+103
| | | | | | | | | | | | | | | | | | | | | | | | There is one dtsi file per SoC version: - STM32MP151: common part for all version, Single Cortex-A7 - STM32MP153: Dual Cortex-A7 - STM32MP157: + GPU and DSI, but not needed for TF-A The STM32MP15xC include a cryptography peripheral, add it in a dedicated file. There are 4 packages available, for which the IOs number change. Have one file for each package. The 2 packages AB and AD are added. STM32157A-DK1 and STM32MP157C-DK2 share most of their features, a common dkx file is then created. Some reordering is done in other files, and realign with kernel DT files. The DDR files are generated with our internal tool, no changes in the registers values. Change-Id: I9f2ef00306310abe34b94c2f10fc7a77a10493d1 Signed-off-by: Yann Gautier <yann.gautier@st.com>
* fdts: stm32mp1: move FDCAN to PLL4_RAntonio Borneo2019-10-031-1/+1
| | | | | | | | | | | | | LTDC modifies the clock frequency to adapt it to the display. Such frequency change is not detected by the FDCAN driver that instead caches the value at probe and pretends to use it later. This change fixes the issue by moving the FDCAN to PLL4_R, leaving the LTDC alone on PLL4_Q. Signed-off-by: Antonio Borneo <antonio.borneo@st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I8230868b2b5fd6deb6e3f9dc3911030d8d484c58
* fdts: stm32mp1: realign device tree files with internal devsYann Gautier2019-06-171-2/+8
| | | | | | | | | | | | | | | Update DDR parameters to version 1.45. Remove useless sdmmc1_dir_pins_b node. Add USART3 and UART7 nodes. Correct a PMIC value for USB regulator. Add TIMER12, TIMER15, CRYP, HASH and USBOTG_HS nodes. Update DTSI file for SDMMC compatible, but overwrite it with the former name. Move BSEC board_id node to boards DTS files, as this OTP is specific to STMicroelectronics boards. Change-Id: If4d2fe090c6a8368afe8e21e5ac70579911d3939 Signed-off-by: Yann Gautier <yann.gautier@st.com>
* stm32mp1: add general SYSCFG managementYann Gautier2019-06-171-0/+6
| | | | | | | | | | | | | | | The system configuration controller is mainly used to manage the compensation cell and other IOs and system related settings. The SYSCFG driver is in charge of configuring masters on the interconnect, IO compensation, low voltage boards, or pull-ups for boot pins. All other configurations should be handled in Linux drivers requiring it. Device tree files are also updated to manage vdd-supply regulator. Change-Id: I10fb513761a7d1f2b7afedca9c723ad9d1bccf42 Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com>
* fdts: stm32mp1: add bsec nodeYann Gautier2019-03-111-9/+2
| | | | | | | | | | | | | This node is added in a new file stm32mp157c-security.dtsi. This node includes OTPs that should be shadowed and made readable to non secure world. Explicitly add status and secure-status, as these OTPs are accessible by secure and non-secure world. The stgen node is also moved to this file. Change-Id: I3c89a01588d2e411fecfc44997e1c5df2fc37cad Signed-off-by: Yann Gautier <yann.gautier@st.com>
* stm32mp1: add minimal support for co-processor Cortex-M4Yann Gautier2019-02-201-0/+2
| | | | | | | | | | STM32MP1 chip embeds a dual Cortex-A7 and a Cortex-M4. The support for Cortex-M4 clocks is added when configuring the clock tree. Some minimal security features to allow communications between A7 and M4 are also added. Change-Id: I60417e244a476f60a2758f4969700b2684056665 Signed-off-by: Yann Gautier <yann.gautier@st.com>
* stm32mp1: update I2C and PMIC driversYann Gautier2019-02-141-1/+1
| | | | | | | | | | | | | | | | | Regulator configuration at boot takes more information from DT. I2C configuration from DT is done in I2C driver. I2C driver manages more transfer modes. The min voltage of buck1 should also be increased to 1.2V, else the platform does not boot. Heavily modifies stm32_i2c.c since many functions move inside the source file to remove redundant declarations. Change-Id: I0bee5d776cf3ff15e687427cd6abc06ab237d025 Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Signed-off-by: Nicolas LE BAYON <nicolas.le.bayon@st.com>
* stm32mp1: update device tree filesYann Gautier2019-01-181-49/+113
| | | | | | | | The drivers are also updated to reflect the changes. Set RCC as non-secure. Change-Id: I568fa1f418355830ad1d4d1cdcdb910fb362231b Signed-off-by: Yann Gautier <yann.gautier@st.com>
* stm32mp1: rename stpmu1 to stpmic1Yann Gautier2019-01-181-3/+3
| | | | | | | | This is the correct name of the IP. Rename stm32mp1_pmic files to stm32mp_pmic. Change-Id: I238a7d1f9a1d099daf7788dc9ebbd3146ba2f15f Signed-off-by: Yann Gautier <yann.gautier@st.com>
* stm32mp1: Add device tree filesYann Gautier2018-07-241-0/+246
Those device tree files are taken from STM32MP1 U-Boot and Linux. And they are updated to fit TF-A needs. Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
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