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authorTom Hughes <tomhughes@chromium.org>2020-05-28 15:53:09 -0700
committerCommit Bot <commit-bot@chromium.org>2020-05-30 05:16:41 +0000
commita832f50a83e6d897cf22f306b4e01da4ee40fe4e (patch)
treeea84ac98fd6b55c624cf70413cb5bfb5bd8204bc
parent442ca01546e728e4f6b24790a6c1c61595c47bac (diff)
downloadchrome-ec-a832f50a83e6d897cf22f306b4e01da4ee40fe4e.tar.gz
test: Add tests for flash option bytes and control register
BRANCH=none BUG=b:155897971 TEST=On dragonclaw v0.2 with Segger J-Trace and servo micro attached: ./test/run_device_tests.py -t flash_physical => PASS Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I9a71cdcc2947d13cf2f1d44fdbd57cf20ed6402f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2220737 Commit-Queue: Yicheng Li <yichengli@chromium.org> Tested-by: Yicheng Li <yichengli@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
-rw-r--r--chip/stm32/flash-f.h6
-rw-r--r--test/flash_physical.c93
2 files changed, 99 insertions, 0 deletions
diff --git a/chip/stm32/flash-f.h b/chip/stm32/flash-f.h
index 53892655c8..8d2b8e1fae 100644
--- a/chip/stm32/flash-f.h
+++ b/chip/stm32/flash-f.h
@@ -66,6 +66,9 @@ void lock_flash_option_bytes(void);
/**
* Disable the flash option bytes register.
*
+ * This function expects that bus faults have not already been ignored when
+ * called.
+ *
* Once this function is called any attempt at accessing the flash option
* bytes register will generate a bus fault until the next reset.
*
@@ -76,6 +79,9 @@ void disable_flash_option_bytes(void);
/**
* Disable the flash control register.
*
+ * This function expects that bus faults have not already been ignored when
+ * called.
+ *
* Once this function is called any attempt at accessing the flash control
* register will generate a bus fault until the next reset.
*
diff --git a/test/flash_physical.c b/test/flash_physical.c
index 9b01445582..e5430f4bd0 100644
--- a/test/flash_physical.c
+++ b/test/flash_physical.c
@@ -3,7 +3,9 @@
* found in the LICENSE file.
*/
+#include "chip/stm32/flash-f.h"
#include "flash.h"
+#include "panic.h"
#include "test_util.h"
struct flash_info {
@@ -28,6 +30,87 @@ struct flash_info flash_info = {
#error "Flash info not defined for this chip. Please add it."
#endif
+
+test_static int test_lock_option_bytes(void)
+{
+ TEST_EQ(flash_option_bytes_locked(), true, "%d");
+
+ unlock_flash_option_bytes();
+
+ TEST_EQ(flash_option_bytes_locked(), false, "%d");
+
+ lock_flash_option_bytes();
+
+ TEST_EQ(flash_option_bytes_locked(), true, "%d");
+
+ unlock_flash_option_bytes();
+
+ TEST_EQ(flash_option_bytes_locked(), false, "%d");
+
+ return EC_SUCCESS;
+}
+
+test_static int test_disable_option_bytes(void)
+{
+ TEST_EQ(flash_option_bytes_locked(), false, "%d");
+
+ disable_flash_option_bytes();
+
+ TEST_EQ(flash_option_bytes_locked(), true, "%d");
+
+ /* Since we've disabled the option bytes we'll get a bus fault. */
+ ignore_bus_fault(1);
+
+ unlock_flash_option_bytes();
+
+ ignore_bus_fault(0);
+
+ /* Option bytes should still be locked. */
+ TEST_EQ(flash_option_bytes_locked(), true, "%d");
+
+ return EC_SUCCESS;
+}
+
+test_static int test_lock_flash_control_register(void)
+{
+ TEST_EQ(flash_control_register_locked(), true, "%d");
+
+ unlock_flash_control_register();
+
+ TEST_EQ(flash_control_register_locked(), false, "%d");
+
+ lock_flash_control_register();
+
+ TEST_EQ(flash_control_register_locked(), true, "%d");
+
+ unlock_flash_control_register();
+
+ TEST_EQ(flash_control_register_locked(), false, "%d");
+
+ return EC_SUCCESS;
+}
+
+test_static int test_disable_flash_control_register(void)
+{
+ TEST_EQ(flash_control_register_locked(), false, "%d");
+
+ disable_flash_control_register();
+
+ TEST_EQ(flash_control_register_locked(), true, "%d");
+
+ /* Since we've disabled the option bytes we'll get a bus fault. */
+ ignore_bus_fault(1);
+
+ unlock_flash_control_register();
+
+ ignore_bus_fault(0);
+
+ /* Control register should still be locked. */
+ TEST_EQ(flash_control_register_locked(), true, "%d");
+
+ return EC_SUCCESS;
+}
+
test_static int test_flash_config(void)
{
TEST_EQ(PHYSICAL_BANKS, flash_info.num_flash_banks, "%d");
@@ -40,5 +123,15 @@ void run_test(int argc, char **argv)
{
ccprintf("Running flash physical test\n");
RUN_TEST(test_flash_config);
+ /*
+ * TODO(b/157692395): These should be implemented for the STM32H743 as
+ * well.
+ */
+#if defined(CHIP_VARIANT_STM32F412)
+ RUN_TEST(test_lock_option_bytes);
+ RUN_TEST(test_disable_option_bytes);
+ RUN_TEST(test_lock_flash_control_register);
+ RUN_TEST(test_disable_flash_control_register);
+#endif
test_print_result();
}