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| author | yoojin <yoojin7.lee@samsung.com> | 2014-08-04 14:22:06 +0900 |
|---|---|---|
| committer | chrome-internal-fetch <chrome-internal-fetch@google.com> | 2014-08-05 01:34:59 +0000 |
| commit | 3b162523949d29d44e020daa7f613df533b9abce (patch) | |
| tree | 7d4499b1db054677774c55257d8c94ac529266ab | |
| parent | 05847557018f783ac1d7de0efb910f31cb31a0e5 (diff) | |
| download | chrome-ec-3b162523949d29d44e020daa7f613df533b9abce.tar.gz | |
Winky : Change power sequence for Core well stable on BYT-M
Winky included PCIe device.
Intel BYT-M spec. :
Core well stable to DRAM_CORE_PWROK and PMC_CORE_PWROK assertion
for power rails needed by PCIe devices is minimum 99ms.
BUG=chrome-os-partner:31116
TEST=emerge-winky chromeos-ec
Measure signal waveforms in power up sequence.
Change-Id: I2afde9f1216b360c926c254f98d64124d2dbf080
Reviewed-on: https://chromium-review.googlesource.com/210952
Reviewed-by: YongBeum Ha <ybha@samsung.com>
Tested-by: YongBeum Ha <ybha@samsung.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Commit-Queue: YongBeum Ha <ybha@samsung.com>
| -rwxr-xr-x[-rw-r--r--] | power/baytrail.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/power/baytrail.c b/power/baytrail.c index 995889ef6b..921b642f3d 100644..100755 --- a/power/baytrail.c +++ b/power/baytrail.c @@ -272,10 +272,10 @@ enum power_state power_handle_state(enum power_state state) disable_sleep(SLEEP_MASK_AP_RUN); /* - * Wait 15 ms after all voltages good. 100 ms is only needed - * for PCIe devices; mini-PCIe devices should need only 10 ms. + * Wait 105 ms after all voltages good. 100 ms is needed + * for PCIe devices; mini-PCIe devices is needed 10 ms. */ - msleep(15); + msleep(105); /* * Throttle CPU if necessary. This should only be asserted |