diff options
| author | Vadim Bendebury <vbendeb@google.com> | 2022-09-14 12:15:29 -0700 |
|---|---|---|
| committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2022-09-14 20:56:35 +0000 |
| commit | eb3cedf0d8d6ab7fc638f40e30b20d37acdb6df9 (patch) | |
| tree | eb7f1a024cd9d0ab12dbc4d97dfa42fb81261d8c | |
| parent | 84cad1fa91794e6b109dc251b4b6bb62bc8d480c (diff) | |
| download | chrome-ec-release-R107-15117.B-cr50_stab.tar.gz | |
gsctool: adjust CCD info v1 capabilities representationstabilize-15117.86.B-cr50_stabstabilize-15117.48.B-cr50_stabstabilize-15117.111.B-cr50_stabrelease-R107-15117.B-cr50_stab
The gsctool utility expects the 64 capabilities values to be
represented as two u32 quantities in big endian format, where each two
bits represent current and default states for various capabilities.
Ti50 represents the same values as single u64 little endian values.
This patch modifies the cpabilities values to match expectations in
case ccd_info structure is of version 1.
BUG=b:244750201
TEST=capalbilities display on the Ti50 console and in gsctool output
are the same in both cases when CCD is opened and locked:
localhost # ./gsctool -a -I
State: Opened
Password: None
Flags: 000000
Capabilities, current and default:
UartGscRxAPTx Y Always
UartGscTxAPRx Y Always
UartGscRxECTx Y Always
UartGscTxECRx Y IfOpened
UartGscRxFpmcuTx Y Always
UartGscTxFpmcuRx Y IfOpened
FlashAP Y IfOpened
FlashEC Y IfOpened
OverrideWP Y IfOpened
RebootECAP Y IfOpened
GscFullConsole Y IfOpened
UnlockNoReboot Y Always
UnlockNoShortPP Y Always
OpenNoTPMWipe Y IfOpened
OpenNoLongPP Y IfOpened
RemoveBatteryBypassPP Y Always
I2C Y IfOpened
FlashRead Y Always
OpenNoDevMode Y Always
OpenFromUSB Y Always
OverrideBatt Y IfOpened
BootUnverifiedRo Y Default
CCD caps bitmap: 0x3fffff
Capabilities are default.
localhost # ./gsctool -a -I
State: Locked
Password: None
Flags: 000000
Capabilities, current and default:
UartGscRxAPTx Y Always
UartGscTxAPRx Y Always
UartGscRxECTx Y Always
UartGscTxECRx - IfOpened
UartGscRxFpmcuTx Y Always
UartGscTxFpmcuRx - IfOpened
FlashAP - IfOpened
FlashEC - IfOpened
OverrideWP - IfOpened
RebootECAP - IfOpened
GscFullConsole - IfOpened
UnlockNoReboot Y Always
UnlockNoShortPP Y Always
OpenNoTPMWipe - IfOpened
OpenNoLongPP - IfOpened
RemoveBatteryBypassPP Y Always
I2C - IfOpened
FlashRead Y Always
OpenNoDevMode Y Always
OpenFromUSB Y Always
OverrideBatt - IfOpened
BootUnverifiedRo - Default
CCD caps bitmap: 0xe9817
Capabilities are default.
Signed-off-by: Vadim Bendebury <vbendeb@google.com>
Change-Id: I41e0ea22265cdb5aaaff33be4ba79030e402ee1b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3895514
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
Commit-Queue: Vadim Bendebury <vbendeb@chromium.org>
Tested-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
| -rw-r--r-- | extra/usb_updater/gsctool.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/extra/usb_updater/gsctool.c b/extra/usb_updater/gsctool.c index c2e189dea4..ff4857de1d 100644 --- a/extra/usb_updater/gsctool.c +++ b/extra/usb_updater/gsctool.c @@ -2283,6 +2283,18 @@ static void print_ccd_info(void *response, size_t response_size) (uint8_t *)response + sizeof(struct ccd_info_response_header), sizeof(ccd_info)); + /* + * V1 CCD info structure has the capabilities bitmaps + * represented as a single little endian u64, whereas this + * utility expects it to be two big endian u32s. This function + * fixes the V1 representation. + */ + for (i = 0; i < ARRAY_SIZE(ccd_info.ccd_caps_current); i++) { + ccd_info.ccd_caps_current[i] = + htobe32(ccd_info.ccd_caps_current[i]); + ccd_info.ccd_caps_defaults[i] = + htobe32(ccd_info.ccd_caps_defaults[i]); + } } else if (response_size == CCD_INFO_V0_SIZE) { ccd_info_version = 0; /* Default, Cr50 case. */ memcpy(&ccd_info, response, sizeof(ccd_info)); |