octopus: update bip for lower power hibernate

Pulled hibernate_wake_pins into each EC variant because the 4/5
item array was getting pretty fractured.

Bip EC now wakes up based on PPC interrupts instead of AC_PRESENT. This
allows the PPCs to disable the SNK FET (and all OVP circuitry). The power
won't get from the USB-C connector to the battery charger until the EC
wakes up, but that isn't an issue.

BRANCH=none
BUG=b:111006203,b:111520593
TEST=bip PD_A rail is 3.97mW during hiberate with this CL stack

Change-Id: I2d08ca5bb2b0b7181c7a0f0c5894b8f59ccbd85f
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1166184
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>

3 files changed, 52 insertions, 24 deletions

diff --git a/baseboard/octopus/baseboard.c b/baseboard/octopus/baseboard.c
index 577d9c28ba..0835753855 100644
--- a/baseboard/octopus/baseboard.c
+++ b/baseboard/octopus/baseboard.c
@@ -27,22 +27,6 @@
 #define CPRINTFUSB(format, args...) cprintf(CC_USBCHARGE, format, ## args)
 
 /******************************************************************************/
-/* Wake up pins */
-const enum gpio_signal hibernate_wake_pins[] = {
-	GPIO_LID_OPEN,
-	GPIO_AC_PRESENT,
-	GPIO_POWER_BUTTON_L,
-#if defined(VARIANT_OCTOPUS_EC_NPCX796FB) && defined(CONFIG_HIBERNATE_PSL)
-	/*
-	 * Enable EC_RST_ODL as a wake source if using NPCX EC variant and PSL
-	 * hibernate mode is enabled.
-	 */
-	GPIO_EC_RST_ODL,
-#endif
-};
-const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins);
-
-/******************************************************************************/
 /* Power signal list.  Must match order of enum power_signal. */
 const struct power_signal_info power_signal_list[] = {
 #ifdef CONFIG_POWER_S0IX
@@ -294,15 +278,30 @@ void board_hibernate(void)
 		pd_request_source_voltage(port, NX20P348X_SAFE_RESET_VBUS_MV);
 #endif
 
+	/*
+	 * If Vbus isn't already on this port, then we need to put the PPC into
+	 * low power mode or open the SNK FET based on which signals wake up
+	 * the EC from hibernate.
+	 */
 	for (port = 0; port < CONFIG_USB_PD_PORT_COUNT; port++) {
-		/*
-		 * If Vbus isn't already on this port, then open the SNK path
-		 * to allow AC to pass through to the charger when connected.
-		 * This is need if the TCPC/PPC rails do not go away.
-		 * (b/79173959)
-		 */
-		if (!pd_is_vbus_present(port))
+		if (!pd_is_vbus_present(port)) {
+#ifdef VARIANT_OCTOPUS_EC_ITE8320
+			/*
+			 * ITE variant uses the PPC interrupts instead of
+			 * AC_PRESENT to wake up, so we do not need to enable
+			 * the SNK FETS.
+			 */
+			ppc_enter_low_power_mode(port);
+#else
+			/*
+			 * Open the SNK path to allow AC to pass through to the
+			 * charger when connected. This is need if the TCPC/PPC
+			 * rails do not go away and AC_PRESENT wakes up the EC
+			 * (b/79173959).
+			 */
 			ppc_vbus_sink_enable(port, 1);
+#endif
+		}
 	}
 
 	/*
diff --git a/baseboard/octopus/variant_ec_ite8320.c b/baseboard/octopus/variant_ec_ite8320.c
index 7e81a00ed1..459ea113b3 100644
--- a/baseboard/octopus/variant_ec_ite8320.c
+++ b/baseboard/octopus/variant_ec_ite8320.c
@@ -10,6 +10,22 @@
 #include "util.h"
 
 /******************************************************************************/
+/* Wake up pins */
+const enum gpio_signal hibernate_wake_pins[] = {
+	GPIO_LID_OPEN,
+	GPIO_POWER_BUTTON_L,
+	/*
+	 * The PPC interrupts (which fire when Vbus changes) is a proxy for
+	 * AC_PRESENT. This allows us to turn off the PPC SNK FETS during
+	 * hibernation which saves power. Once the EC wakes up, it will enable
+	 * the SNK FETs and power will make it to the rest of the system.
+	 */
+	GPIO_USB_C0_PD_INT_ODL,
+	GPIO_USB_C1_PD_INT_ODL,
+};
+const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins);
+
+/******************************************************************************/
 /* I2C port map configuration */
 const struct i2c_port_t i2c_ports[] = {
 	{"power",  IT83XX_I2C_CH_A, 100, GPIO_I2C0_SCL, GPIO_I2C0_SDA},
diff --git a/baseboard/octopus/variant_ec_npcx796fb.c b/baseboard/octopus/variant_ec_npcx796fb.c
index bfd304876f..7ad15758f0 100644
--- a/baseboard/octopus/variant_ec_npcx796fb.c
+++ b/baseboard/octopus/variant_ec_npcx796fb.c
@@ -10,9 +10,22 @@
 #include "i2c.h"
 #include "power.h"
 #include "pwm_chip.h"
+#include "timer.h"
 #include "usbc_ppc.h"
 #include "util.h"
-#include "timer.h"
+
+/******************************************************************************/
+/* Wake up pins */
+const enum gpio_signal hibernate_wake_pins[] = {
+	GPIO_LID_OPEN,
+	GPIO_AC_PRESENT,
+	GPIO_POWER_BUTTON_L,
+#ifdef CONFIG_HIBERNATE_PSL
+	/* EC_RST_ODL needs to wake device if PSL hibernate mode is enabled. */
+	GPIO_EC_RST_ODL,
+#endif
+};
+const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins);
 
 /******************************************************************************/
 /* I2C port map configuration */