Add FMAP even if VBOOT is not activatedv1.0.0

This simplifies the re-flashing for stm32 based platforms.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BUG=chrome-os-partner:8865
TEST=On Daisy, flashrom -p internal:bus=lpc -w ec.bin

Change-Id: I66860383c34110b1edf852929c244a2b682bc105

8 files changed, 26 insertions, 10 deletions

diff --git a/board/daisy/board.h b/board/daisy/board.h
index b3a9588a37..625df877b5 100644
--- a/board/daisy/board.h
+++ b/board/daisy/board.h
@@ -14,9 +14,6 @@
 /* Use USART1 as console serial port */
 #define CONFIG_CONSOLE_UART 1
 
-/* support programming on-chip flash */
-#define CONFIG_FLASH
-
 /* use I2C for host communication */
 #define CONFIG_I2C
 
diff --git a/board/snow/board.h b/board/snow/board.h
index 9f788411d9..67156dc0ec 100644
--- a/board/snow/board.h
+++ b/board/snow/board.h
@@ -14,9 +14,6 @@
 /* Use USART1 as console serial port */
 #define CONFIG_CONSOLE_UART 1
 
-/* support programming on-chip flash */
-#define CONFIG_FLASH
-
 /* use I2C for host communication */
 #define CONFIG_I2C
 
diff --git a/chip/stm32/config-stm32f100.h b/chip/stm32/config-stm32f100.h
index ecc16e0652..750465a250 100644
--- a/chip/stm32/config-stm32f100.h
+++ b/chip/stm32/config-stm32f100.h
@@ -29,6 +29,13 @@
 #define CONFIG_SECTION_B_OFF    CONFIG_FW_B_OFF
 #define CONFIG_SECTION_B_SIZE   CONFIG_FW_B_SIZE
 
+/* no keys for now */
+#define CONFIG_VBOOT_ROOTKEY_OFF    (CONFIG_FW_RO_OFF + CONFIG_FW_RO_SIZE)
+#define CONFIG_VBLOCK_A_OFF         (CONFIG_FW_A_OFF + CONFIG_FW_A_SIZE)
+#define CONFIG_VBLOCK_B_OFF         (CONFIG_FW_B_OFF + CONFIG_FW_B_SIZE)
+#define CONFIG_VBOOT_ROOTKEY_SIZE   0
+#define CONFIG_VBLOCK_SIZE          0
+
 /* Number of IRQ vectors on the NVIC */
 #define CONFIG_IRQ_COUNT 61
 
diff --git a/chip/stm32/config-stm32l15x.h b/chip/stm32/config-stm32l15x.h
index e576758cba..5f42524d95 100644
--- a/chip/stm32/config-stm32l15x.h
+++ b/chip/stm32/config-stm32l15x.h
@@ -27,6 +27,14 @@
 #define CONFIG_SECTION_B_OFF    CONFIG_FW_B_OFF
 #define CONFIG_SECTION_B_SIZE   CONFIG_FW_B_SIZE
 
+/* no keys for now */
+#define CONFIG_VBOOT_ROOTKEY_OFF    (CONFIG_FW_RO_OFF + CONFIG_FW_RO_SIZE)
+#define CONFIG_VBLOCK_A_OFF         (CONFIG_FW_A_OFF + CONFIG_FW_A_SIZE)
+#define CONFIG_VBLOCK_B_OFF         (CONFIG_FW_B_OFF + CONFIG_FW_B_SIZE)
+#define CONFIG_VBOOT_ROOTKEY_SIZE   0
+#define CONFIG_VBLOCK_SIZE          0
+
+
 /* Number of IRQ vectors on the NVIC */
 #define CONFIG_IRQ_COUNT 45
 
diff --git a/chip/stm32/config.h b/chip/stm32/config.h
index 0ef887e4f7..19b872bc75 100644
--- a/chip/stm32/config.h
+++ b/chip/stm32/config.h
@@ -18,6 +18,9 @@
 /* System stack size */
 #define CONFIG_STACK_SIZE 1024
 
+/* support programming on-chip flash */
+#define CONFIG_FLASH
+
 /* build with assertions and debug messages */
 #define CONFIG_DEBUG
 
diff --git a/common/build.mk b/common/build.mk
index 3c50e868a7..35616eb73c 100644
--- a/common/build.mk
+++ b/common/build.mk
@@ -12,7 +12,7 @@ common-y+=gpio_commands.o version.o
 common-$(CONFIG_BATTERY_ATL706486)+=battery_atl706486.o
 common-$(CONFIG_CHARGER_BQ24725)+=charger_bq24725.o
 common-$(CONFIG_EOPTION)+=eoption.o
-common-$(CONFIG_FLASH)+=flash_common.o flash_commands.o
+common-$(CONFIG_FLASH)+=flash_common.o flash_commands.o fmap.o
 common-$(CONFIG_LPC)+=port80.o host_event_commands.o
 common-$(CONFIG_POWER_LED)+=power_led.o
 common-$(CONFIG_PSTORE)+=pstore_commands.o
@@ -36,7 +36,7 @@ VBOOT_DEVKEYS?=/usr/share/vboot/devkeys
 CFLAGS_$(CONFIG_VBOOT)+= -DCHROMEOS_ENVIRONMENT -DCHROMEOS_EC
 # CFLAGS_$(CONFIG_VBOOT)+= -DVBOOT_DEBUG
 
-common-$(CONFIG_VBOOT)+= fmap.o vboot.o vboot_stub.o
+common-$(CONFIG_VBOOT)+= vboot.o vboot_stub.o
 
 includes-$(CONFIG_VBOOT)+= \
 	$(VBOOT_SOURCE)/include \
diff --git a/common/flash_common.c b/common/flash_common.c
index 2582a32621..e79b4d9d79 100644
--- a/common/flash_common.c
+++ b/common/flash_common.c
@@ -336,10 +336,14 @@ int flash_get_protect_lock(void)
 
 int flash_pre_init(void)
 {
+#ifdef CHIP_stm32
+	usable_flash_size = flash_physical_size();
+#else
 	/* Calculate usable flash size.  Reserve one protection block
 	 * at the top to hold the "pretend SPI" write protect data. */
 	usable_flash_size = flash_physical_size() -
 		flash_get_protect_block_size();
+#endif
 
 	/* Apply write protect to blocks if needed */
 	return apply_pstate();
diff --git a/core/cortex-m/ec.lds.S b/core/cortex-m/ec.lds.S
index b1e9c71127..18d8fe6dc8 100644
--- a/core/cortex-m/ec.lds.S
+++ b/core/cortex-m/ec.lds.S
@@ -90,7 +90,7 @@ SECTIONS
         . = ALIGN(4);
         *(.rodata*)
 
-#if defined(SECTION_IS_RO) && defined(CONFIG_VBOOT)
+#if defined(SECTION_IS_RO) && defined(CONFIG_FLASH)
         . = ALIGN(64);
         *(.google)
 #endif
@@ -122,7 +122,7 @@ SECTIONS
     ASSERT(FW_SIZE(SECTION) >
                  (LOADADDR(.data) + SIZEOF(.data) - FW_OFF(SECTION)),
                  "No room left in the flash")
-#if !(defined(SECTION_IS_RO) && defined(CONFIG_VBOOT))
+#if !(defined(SECTION_IS_RO) && defined(CONFIG_FLASH))
     /DISCARD/ : {
               *(.google)
               }