diff options
author | Daisuke Nojiri <dnojiri@chromium.org> | 2021-11-09 17:22:43 -0800 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2021-11-11 00:50:14 +0000 |
commit | 0819d1e49b3dbc2416610e005af090249860673c (patch) | |
tree | da229a61dface51eb02b9962c3890da96beb6da8 | |
parent | 1902765cb90d60babf360f4fae86438886a5a7cc (diff) | |
download | chrome-ec-0819d1e49b3dbc2416610e005af090249860673c.tar.gz |
ectool/panicinfo: Print extra cortex-m fault registers
This patch makes ectool panicinfo print extra cortex-m fault
registers, including CFSR, HFSR, and IPSR.
Saved panic data:
=== PROCESS EXCEPTION: ad ====== xPSR: ffffffff ===
r0 : r1 : r2 : r3 :
r4 :dead6664 r5 :100995ae r6 :00000000 r7 :00000000
r8 :00000000 r9 :00000000 r10:00000000 r11:00000000
r12: sp :00000000 lr : pc :
cfsr=00000000, shcsr=000000000, hfsr=10000028, dfsr=00000000, ipsr=100995ad
BUG=b:200593658
BRANCH=None
TEST=Run on Nami. See a sample output above.
Change-Id: I56ecbefa2414553ab2204f113bedcad67b5ccad6
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3271886
Reviewed-by: caveh jalali <caveh@chromium.org>
-rw-r--r-- | util/ec_panicinfo.c | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/util/ec_panicinfo.c b/util/ec_panicinfo.c index ad6867fdc9..0294ac90de 100644 --- a/util/ec_panicinfo.c +++ b/util/ec_panicinfo.c @@ -26,6 +26,26 @@ static void print_panic_reg(int regnum, const uint32_t *regs, int index) printf((regnum & 3) == 3 ? "\n" : " "); } +static void panic_show_extra_cm(const struct panic_data *pdata) +{ + enum { + CPU_NVIC_CFSR_BFARVALID = BIT(15), + CPU_NVIC_CFSR_MFARVALID = BIT(7), + }; + + printf("\n"); + if (pdata->cm.cfsr & CPU_NVIC_CFSR_BFARVALID) + printf("bfar=%08x, ", pdata->cm.bfar); + if (pdata->cm.cfsr & CPU_NVIC_CFSR_MFARVALID) + printf("mfar=%08x, ", pdata->cm.mfar); + printf("cfsr=%08x, ", pdata->cm.cfsr); + printf("shcsr=%08x, ", pdata->cm.shcsr); + printf("hfsr=%08x, ", pdata->cm.hfsr); + printf("dfsr=%08x, ", pdata->cm.dfsr); + printf("ipsr=%08x", pdata->cm.regs[CORTEX_PANIC_REGISTER_IPSR]); + printf("\n"); +} + static int parse_panic_info_cm(const struct panic_data *pdata) { const uint32_t *lregs = pdata->cm.regs; @@ -68,6 +88,8 @@ static int parse_panic_info_cm(const struct panic_data *pdata) print_panic_reg(14, sregs, 5); print_panic_reg(15, sregs, 6); + panic_show_extra_cm(pdata); + return 0; } |