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authormatt_wang <matt_wang@compal.corp-partner.google.com>2023-03-08 18:28:59 +0800
committerChromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com>2023-03-09 05:02:53 +0000
commit0e03acb682863f15de05a00adbf49924698d0d15 (patch)
tree20a2e32ac002819f7617efc9e1c8283a100a99c4
parent56a4339c09fd16053aec075f22e24368d90531a1 (diff)
downloadchrome-ec-0e03acb682863f15de05a00adbf49924698d0d15.tar.gz
omnigul: modify GPIO50 to OD
According to HW design the GPIO50 has reserved for BC1.2. If EC set an UNUSE pin it will cause leakage. So change to OD to avoid the leakage. BUG=b:270368783 BRANCH=brya TEST=make BOARD=omnigul Change-Id: Id26983ab586b7c237cc4c2bc7346c54fc9a58ab3 Signed-off-by: matt_wang <matt_wang@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4318615 Code-Coverage: Kyle Lin <kylelinck@google.com> Reviewed-by: Kyle Lin <kylelinck@google.com> Commit-Queue: Kyle Lin <kylelinck@google.com>
-rw-r--r--board/omnigul/generated-gpio.inc20
1 files changed, 10 insertions, 10 deletions
diff --git a/board/omnigul/generated-gpio.inc b/board/omnigul/generated-gpio.inc
index d7f950ca48..8fec026b96 100644
--- a/board/omnigul/generated-gpio.inc
+++ b/board/omnigul/generated-gpio.inc
@@ -66,6 +66,7 @@ GPIO(USB_C1_FRS_EN, PIN(9, 4), GPIO_OUT_LOW)
GPIO(USB_C1_RT_INT_ODL, PIN(A, 0), GPIO_INPUT)
GPIO(USB_C1_RT_RST_R_ODL, PIN(0, 2), GPIO_ODR_LOW)
GPIO(VCCST_PWRGD_OD, PIN(A, 4), GPIO_ODR_LOW)
+GPIO(USB_C1_BC12_INT_ODL, PIN(5, 0), GPIO_ODR_HIGH)
/* UART alternate functions */
ALTERNATE(PIN_MASK(6, 0x30), 0, MODULE_UART, 0) /* GPIO64/CR_SIN1, GPO65/CR_SOUT1/FLPRG1_L */
@@ -111,15 +112,14 @@ UNUSED(PIN(3, 2)) /* GPO32/TRIS_L */
UNUSED(PIN(3, 5)) /* GPO35/CR_SOUT4/TEST_L */
UNUSED(PIN(6, 6)) /* GPIO66 */
UNUSED(PIN(5, 7)) /* GPIO57/SER_IRQ/ESPI_ALERT_L */
-UNUSED(PIN(4, 1)) /*GPIO41/ADC4*/
-UNUSED(PIN(7, 0)) /*GPIO70/PS2_DAT0*/
-UNUSED(PIN(8, 3)) /*GPIO83/KSO15*/
-UNUSED(PIN(9, 6)) /*GPIO96/F_DIO1*/
-UNUSED(PIN(B, 1)) /*GPIOB1/KSO17/CR_SIN4*/
-UNUSED(PIN(D, 0)) /*GPIOD0/I2C3_SDA0*/
-UNUSED(PIN(D, 1)) /*GPIOD1/I2C3_SCL0*/
-UNUSED(PIN(D, 4)) /*GPIOD4/CR_SIN3*/
-UNUSED(PIN(C, 6)) /*GPIOC6/SMI*/
-UNUSED(PIN(5, 0)) /*GPIO50*/
+UNUSED(PIN(4, 1)) /* GPIO41/ADC4 */
+UNUSED(PIN(7, 0)) /* GPIO70/PS2_DAT0 */
+UNUSED(PIN(8, 3)) /* GPIO83/KSO15 */
+UNUSED(PIN(9, 6)) /* GPIO96/F_DIO1 */
+UNUSED(PIN(B, 1)) /* GPIOB1/KSO17/CR_SIN4 */
+UNUSED(PIN(D, 0)) /* GPIOD0/I2C3_SDA0 */
+UNUSED(PIN(D, 1)) /* GPIOD1/I2C3_SCL0 */
+UNUSED(PIN(D, 4)) /* GPIOD4/CR_SIN3 */
+UNUSED(PIN(C, 6)) /* GPIOC6/SMI */
/* Pre-configured PSL balls: J8 K6 */