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authorJes B. Klinke <jbk@chromium.org>2023-01-20 16:24:38 -0800
committerChromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com>2023-01-25 20:38:31 +0000
commit0e73f8e84eab5f36a51cff217501e53ec6346765 (patch)
treebb27dc291464a27c1d7d8611b7f53f76445fbca1
parentf37804a6bdb895e60c484902a91aae79e64f2e25 (diff)
downloadchrome-ec-0e73f8e84eab5f36a51cff217501e53ec6346765.tar.gz
board/hyperdebug: Enable DFU
Configure HyperDebug board similar to Servo V4, in that the RO copy of the firmware is replaced with a 4kB bootloader, whose only task is to decide whether to jump to STM ROM DFU bootloader or to RW. BUG=b:192262089 TEST=Upgrade firmware on STM32L5 based Nucleo board using dfu-util Change-Id: I5a9461a5a9b28642b274f26affa1c64a4c2bfe11 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4183942 Reviewed-by: Brian Nemec <bnemec@google.com> Commit-Queue: Jes Klinke <jbk@chromium.org> Tested-by: Jes Klinke <jbk@chromium.org>
-rw-r--r--board/hyperdebug/board.c1
-rw-r--r--board/hyperdebug/board.h38
-rw-r--r--board/hyperdebug/build.mk5
-rw-r--r--board/hyperdebug/ec.tasklist4
4 files changed, 44 insertions, 4 deletions
diff --git a/board/hyperdebug/board.c b/board/hyperdebug/board.c
index c9a3702d1e..8b1c53c937 100644
--- a/board/hyperdebug/board.c
+++ b/board/hyperdebug/board.c
@@ -192,6 +192,7 @@ const void *const usb_strings[] = {
[USB_STR_USART3_STREAM_NAME] = USB_STRING_DESC("UART3"),
[USB_STR_USART4_STREAM_NAME] = USB_STRING_DESC("UART4"),
[USB_STR_USART5_STREAM_NAME] = USB_STRING_DESC("UART5"),
+ [USB_STR_DFU_NAME] = USB_STRING_DESC("DFU"),
};
BUILD_ASSERT(ARRAY_SIZE(usb_strings) == USB_STR_COUNT);
diff --git a/board/hyperdebug/board.h b/board/hyperdebug/board.h
index 760e66aa37..d7e8237d1c 100644
--- a/board/hyperdebug/board.h
+++ b/board/hyperdebug/board.h
@@ -13,11 +13,41 @@
/* 48 MHz SYSCLK clock frequency */
#define CPU_CLOCK 48000000
+/* Configure the flash */
+#undef CONFIG_RO_SIZE
+#undef CONFIG_FW_PSTATE_OFF
+#undef CONFIG_FW_PSTATE_SIZE
+#undef CONFIG_RW_MEM_OFF
+#undef CONFIG_RW_SIZE
+
+#define CONFIG_RO_SIZE (4 * 1024)
+#define CONFIG_RW_MEM_OFF (CONFIG_RO_MEM_OFF + CONFIG_RO_SIZE)
+#define CONFIG_RW_SIZE (CONFIG_FLASH_SIZE_BYTES - CONFIG_RW_MEM_OFF)
+#undef CONFIG_IMAGE_PADDING
+
+#ifdef SECTION_IS_RO
+
+/* Configure the Boot Manager. */
+#define CONFIG_MALLOC
+#define CONFIG_DFU_BOOTMANAGER_MAIN
+#define CONFIG_DFU_BOOTMANAGER_SHARED
+#undef CONFIG_COMMON_RUNTIME
+#undef CONFIG_COMMON_PANIC_OUTPUT
+#undef CONFIG_COMMON_GPIO
+#undef CONFIG_COMMON_TIMER
+#undef CONFIG_WATCHDOG
+
+#else /* !SECTION_IS_RO */
+
#define CONFIG_BOARD_PRE_INIT
#define CONFIG_ROM_BASE 0x0
#define CONFIG_ROM_SIZE (CONFIG_RAM_BASE - CONFIG_ROM_BASE)
+/* DFU Firmware Update */
+#define CONFIG_DFU_RUNTIME
+#define CONFIG_DFU_BOOTMANAGER_SHARED
+
/* Enable USB forwarding on UART 2, 3, 4, and 5. */
#define CONFIG_STREAM_USART
#undef CONFIG_STREAM_USART1
@@ -38,6 +68,7 @@
/* Optional features */
#define CONFIG_HW_CRC
#undef CONFIG_PVD
+
/*
* See 'Programmable voltage detector characteristics' in the
* STM32F072x8 Datasheet. PVD Threshold 1 corresponds to a falling
@@ -72,7 +103,8 @@
#define USB_IFACE_USART3_STREAM 4
#define USB_IFACE_USART4_STREAM 5
#define USB_IFACE_USART5_STREAM 6
-#define USB_IFACE_COUNT 7
+#define USB_IFACE_DFU 7
+#define USB_IFACE_COUNT 8
/* USB endpoint indexes (use define rather than enum to expand them) */
#define USB_EP_CONTROL 0
@@ -114,9 +146,12 @@
#define CONFIG_USB_I2C_MAX_WRITE_COUNT ((1 << 9) - 4)
#define CONFIG_USB_I2C_MAX_READ_COUNT ((1 << 9) - 6)
+#endif /* SECTION_IS_RO */
+
/* This is not actually an EC so disable some features. */
#undef CONFIG_WATCHDOG_HELP
#undef CONFIG_LID_SWITCH
+#undef CONFIG_FLASH_PSTATE
/*
* Allow dangerous commands all the time, since we don't have a write protect
@@ -145,6 +180,7 @@ enum usb_strings {
USB_STR_USART3_STREAM_NAME,
USB_STR_USART4_STREAM_NAME,
USB_STR_USART5_STREAM_NAME,
+ USB_STR_DFU_NAME,
USB_STR_COUNT
};
diff --git a/board/hyperdebug/build.mk b/board/hyperdebug/build.mk
index d65418f259..9faebb9100 100644
--- a/board/hyperdebug/build.mk
+++ b/board/hyperdebug/build.mk
@@ -10,4 +10,7 @@ CHIP:=stm32
CHIP_FAMILY:=stm32l5
CHIP_VARIANT:=stm32l552xe
-board-y=board.o
+# These files are compiled into RO
+chip-ro=bkpdata.o system.o
+
+board-rw=board.o
diff --git a/board/hyperdebug/ec.tasklist b/board/hyperdebug/ec.tasklist
index ed894a7f87..731007e9fe 100644
--- a/board/hyperdebug/ec.tasklist
+++ b/board/hyperdebug/ec.tasklist
@@ -7,5 +7,5 @@
* See CONFIG_TASK_LIST in config.h for details.
*/
#define CONFIG_TASK_LIST \
- TASK_ALWAYS(HOOKS, hook_task, NULL, VENTI_TASK_STACK_SIZE) \
- TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE)
+ TASK_ALWAYS_RW(HOOKS, hook_task, NULL, VENTI_TASK_STACK_SIZE) \
+ TASK_ALWAYS_RW(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE)