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authorJack Rosenthal <jrosenth@chromium.org>2021-11-09 17:26:07 -0700
committerCommit Bot <commit-bot@chromium.org>2021-11-10 23:02:58 +0000
commit24aaeaca2bb673098fd762dcade55e740548a417 (patch)
treede6e8e4f3c606e85e9a529a65bd10fc504e199b8
parent52f33fcf61835452f3c96d9861a199461a2da027 (diff)
downloadchrome-ec-24aaeaca2bb673098fd762dcade55e740548a417.tar.gz
zephyr: Drop support for kohaku
For context: this build was created so that we had a device that could be publicly purchased to play with Zephyr on in January 2021. With a little passage of time, we now have lazor, limozeen, and delbin as well. This build supports nothing other than power sequence to S0 (no keyboard, battery, charging, etc.) so sadly it's hardly usable for anything at the moment. Delete it so it does not create confusing directory structure for how we want variants to be created. BUG=b:193814903 BRANCH=none TEST=zmake testall Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: Ic0fa3099c19a484513b23c7826376604cf8d2f22 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3271872 Commit-Queue: Jeremy Bettis <jbettis@chromium.org> Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
-rw-r--r--.gitlab-ci.yml5
-rw-r--r--zephyr/boards/arm/kohaku/Kconfig.board10
-rw-r--r--zephyr/boards/arm/kohaku/Kconfig.defconfig10
-rw-r--r--zephyr/boards/arm/kohaku/board.cmake5
-rw-r--r--zephyr/boards/arm/kohaku/kohaku.dts418
-rw-r--r--zephyr/boards/arm/kohaku/kohaku.yaml19
-rw-r--r--zephyr/boards/arm/kohaku/kohaku_defconfig34
-rwxr-xr-xzephyr/firmware_builder.py1
-rw-r--r--zephyr/projects/kohaku/BUILD.py8
-rw-r--r--zephyr/projects/kohaku/CMakeLists.txt10
-rw-r--r--zephyr/projects/kohaku/include/gpio_map.h48
-rw-r--r--zephyr/projects/kohaku/prj.conf37
12 files changed, 0 insertions, 605 deletions
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 4a0de83099..dc2ad48535 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -137,11 +137,6 @@ it8xxx2_evb:
PROJECT: "it8xxx2_evb"
<<: *build_template
-kohaku:
- variables:
- PROJECT: "kohaku"
- <<: *build_template
-
lazor:
variables:
PROJECT: "lazor"
diff --git a/zephyr/boards/arm/kohaku/Kconfig.board b/zephyr/boards/arm/kohaku/Kconfig.board
deleted file mode 100644
index c1a1718847..0000000000
--- a/zephyr/boards/arm/kohaku/Kconfig.board
+++ /dev/null
@@ -1,10 +0,0 @@
-# Copyright 2021 The Chromium OS Authors. All rights reserved.
-# Use of this source code is governed by a BSD-style license that can be
-# found in the LICENSE file.
-
-config BOARD_KOHAKU
- bool "Google Kohaku EC"
- depends on SOC_NPCX7M6FC
- # NPCX doesn't actually have enough ram for coverage, but this will
- # allow generating initial 0 line coverage.
- select HAS_COVERAGE_SUPPORT
diff --git a/zephyr/boards/arm/kohaku/Kconfig.defconfig b/zephyr/boards/arm/kohaku/Kconfig.defconfig
deleted file mode 100644
index 83b97d8ef7..0000000000
--- a/zephyr/boards/arm/kohaku/Kconfig.defconfig
+++ /dev/null
@@ -1,10 +0,0 @@
-# Copyright 2021 The Chromium OS Authors. All rights reserved.
-# Use of this source code is governed by a BSD-style license that can be
-# found in the LICENSE file.
-
-if BOARD_KOHAKU
-
-config BOARD
- default "kohaku"
-
-endif # BOARD_KOHAKU
diff --git a/zephyr/boards/arm/kohaku/board.cmake b/zephyr/boards/arm/kohaku/board.cmake
deleted file mode 100644
index a204305534..0000000000
--- a/zephyr/boards/arm/kohaku/board.cmake
+++ /dev/null
@@ -1,5 +0,0 @@
-# Copyright 2021 The Chromium OS Authors. All rights reserved.
-# Use of this source code is governed by a BSD-style license that can be
-# found in the LICENSE file.
-
-set(NPCX_IMAGE_FILE ${PROJECT_BINARY_DIR}/zephyr.npcx.bin)
diff --git a/zephyr/boards/arm/kohaku/kohaku.dts b/zephyr/boards/arm/kohaku/kohaku.dts
deleted file mode 100644
index b82d89f254..0000000000
--- a/zephyr/boards/arm/kohaku/kohaku.dts
+++ /dev/null
@@ -1,418 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/dts-v1/;
-
-#include <cros/nuvoton/npcx7.dtsi>
-#include <dt-bindings/gpio_defines.h>
-#include <nuvoton/npcx7m6fc.dtsi>
-
-/ {
- model = "Google Kohaku EC";
-
- aliases {
- i2c-0 = &i2c0_0;
- i2c-1 = &i2c1_0;
- i2c-2 = &i2c2_0;
- i2c-3 = &i2c3_0;
- i2c-5 = &i2c5_0;
- i2c-7 = &i2c7_0;
- };
-
- chosen {
- zephyr,sram = &sram0;
- zephyr,console = &uart1;
- zephyr,shell-uart = &uart1;
- zephyr,flash = &flash0;
- };
-
- named-i2c-ports {
- compatible = "named-i2c-ports";
- };
-
- named-gpios {
- compatible = "named-gpios";
-
- lid_open {
- gpios = <&gpiod 2 GPIO_INPUT>;
- enum-name = "GPIO_LID_OPEN";
- label = "LID_OPEN";
- };
- wp_l {
- gpios = <&gpioa 1 GPIO_INPUT>;
- enum-name = "GPIO_WP_L";
- label = "WP_L";
- };
- power_button_l {
- gpios = <&gpio0 1 GPIO_INPUT>;
- enum-name = "GPIO_POWER_BUTTON_L";
- label = "POWER_BUTTON_L";
- };
- acok_od {
- gpios = <&gpio0 0 GPIO_INPUT>;
- enum-name = "GPIO_AC_PRESENT";
- label = "ACOK_OD";
- };
- slp_s0_l {
- gpios = <&gpiod 5 GPIO_INPUT>;
- enum-name = "GPIO_PCH_SLP_S0_L";
- label = "SLP_S0_L";
- };
- slp_s3_l {
- gpios = <&gpioa 5 GPIO_INPUT>;
- enum-name = "GPIO_PCH_SLP_S3_L";
- label = "SLP_S3_L";
- };
- slp_s4_l {
- gpios = <&gpiod 4 GPIO_INPUT>;
- enum-name = "GPIO_PCH_SLP_S4_L";
- label = "SLP_S4_L";
- };
- pg_ec_rsmrst_l {
- gpios = <&gpioe 2 GPIO_INPUT>;
- enum-name = "GPIO_PG_EC_RSMRST_ODL";
- label = "PG_EC_RSMRST_L";
- };
- pg_ec_all_sys_pwrgd {
- gpios = <&gpiof 4 GPIO_INPUT>;
- enum-name = "GPIO_PG_EC_ALL_SYS_PWRGD";
- label = "PG_EC_ALL_SYS_PWRGD";
- };
- pp5000_a_pg_od {
- gpios = <&gpiod 7 GPIO_INPUT>;
- enum-name = "GPIO_PP5000_A_PG_OD";
- label = "PP5000_A_PG_OD";
- };
- base_sixaxis_int_l {
- gpios = <&gpio5 6 GPIO_INPUT>;
- label = "BASE_SIXAXIS_INT_L";
- };
- wfcam_vsync {
- gpios = <&gpiob 7 GPIO_INPUT>;
- label = "WFCAM_VSYNC";
- };
- tcs3400_int_odl {
- gpios = <&gpio7 2 GPIO_INPUT>;
- label = "TCS3400_INT_ODL";
- };
- usb_c0_ppc_int_odl {
- gpios = <&gpioe 0 GPIO_INPUT>;
- label = "USB_C0_PPC_INT_ODL";
- };
- usb_c1_ppc_int_odl {
- gpios = <&gpioa 2 GPIO_INPUT>;
- label = "USB_C1_PPC_INT_ODL";
- };
- usb_c0_tcpc_int_odl {
- gpios = <&gpio6 2 GPIO_INPUT>;
- label = "USB_C0_TCPC_INT_ODL";
- };
- usb_c1_tcpc_int_odl {
- gpios = <&gpiof 5 GPIO_INPUT>;
- label = "USB_C1_TCPC_INT_ODL";
- };
- usb_c0_bc12_int_odl {
- gpios = <&gpio9 5 GPIO_INPUT>;
- label = "USB_C0_BC12_INT_ODL";
- };
- usb_c1_bc12_int_odl {
- gpios = <&gpioe 4 GPIO_INPUT>;
- label = "USB_C1_BC12_INT_ODL";
- };
- ec_voldn_btn_odl {
- gpios = <&gpio9 3 (GPIO_INPUT | GPIO_PULL_UP)>;
- label = "EC_VOLDN_BTN_ODL";
- };
- ec_volup_btn_odl {
- gpios = <&gpio7 5 (GPIO_INPUT | GPIO_PULL_UP)>;
- label = "EC_VOLUP_BTN_ODL";
- };
- sys_reset_l {
- gpios = <&gpioc 5 GPIO_ODR_HIGH>;
- enum-name = "GPIO_SYS_RESET_L";
- label = "SYS_RESET_L";
- };
- entering_rw {
- gpios = <&gpioe 3 GPIO_OUT_LOW>;
- enum-name = "GPIO_ENTERING_RW";
- label = "ENTERING_RW";
- };
- pch_wake_l {
- gpios = <&gpio7 4 GPIO_ODR_HIGH>;
- enum-name = "GPIO_EC_PCH_WAKE_ODL";
- label = "PCH_WAKE_L";
- };
- pch_pwrbtn_l {
- gpios = <&gpioc 1 GPIO_ODR_HIGH>;
- enum-name = "GPIO_PCH_PWRBTN_L";
- label = "PCH_PWRBTN_L";
- };
- en_pp5000_a {
- gpios = <&gpioa 4 GPIO_OUT_LOW>;
- enum-name = "GPIO_EN_PP5000_A";
- label = "EN_PP5000_A";
- };
- en_pp5000 {
- gpios = <&gpioa 4 GPIO_OUT_LOW>;
- enum-name = "GPIO_EN_PP5000";
- label = "EN_PP5000";
- };
- gpio_edp_bklten_od {
- gpios = <&gpiod 3 GPIO_ODR_HIGH>;
- enum-name = "GPIO_ENABLE_BACKLIGHT";
- label = "EDP_BKLTEN_OD";
- };
- en_a_rails {
- gpios = <&gpioa 3 GPIO_OUT_LOW>;
- enum-name = "GPIO_EN_A_RAILS";
- label = "EN_A_RAILS";
- };
- ec_pch_rsmrst_l {
- gpios = <&gpioa 6 GPIO_OUT_LOW>;
- enum-name = "GPIO_PCH_RSMRST_L";
- label = "EC_PCH_RSMRST_L";
- };
- ec_prochot_odl {
- gpios = <&gpio6 3 GPIO_ODR_HIGH>;
- enum-name = "GPIO_CPU_PROCHOT";
- label = "EC_PROCHOT_ODL";
- };
- ec_prochot_in_od {
- gpios = <&gpio3 4 GPIO_INPUT>;
- label = "EC_PROCHOT_IN_OD";
- };
- ec_pch_sys_pwrok {
- gpios = <&gpio3 7 GPIO_OUT_LOW>;
- enum-name = "GPIO_PCH_SYS_PWROK";
- label = "EC_PCH_SYS_PWROK";
- };
- cpu_c10_gate_l {
- gpios = <&gpio6 7 GPIO_INPUT>;
- label = "CPU_C10_GATE_L";
- };
- ec_int_l {
- gpios = <&gpio7 0 GPIO_ODR_HIGH>;
- label = "EC_INT_L";
- };
- ec_rst_odl {
- gpios = <&gpio0 2 GPIO_INPUT>;
- label = "EC_RST_ODL";
- };
- usb_c_oc_odl {
- gpios = <&gpiob 1 GPIO_ODR_HIGH>;
- label = "USB_C_OC_ODL";
- };
- usb_c0_tcpc_rst_odl {
- gpios = <&gpio9 7 GPIO_ODR_HIGH>;
- label = "USB_C0_TCPC_RST_ODL";
- };
- usb_c1_tcpc_rst_odl {
- gpios = <&gpio3 2 GPIO_ODR_HIGH>;
- label = "USB_C1_TCPC_RST_ODL";
- };
- usb_c0_bc12_chg_det_l {
- gpios = <&gpio6 0 GPIO_INPUT>;
- label = "USB_C0_BC12_CHG_DET_L";
- };
- usb_c1_bc12_chg_det_l {
- gpios = <&gpio9 6 GPIO_INPUT>;
- label = "USB_C1_BC12_CHG_DET_L";
- };
- usb_c0_bc12_vbus_on {
- gpios = <&gpio9 4 GPIO_OUT_LOW>;
- label = "USB_C0_BC12_VBUS_ON";
- };
- usb_c1_bc12_vbus_on {
- gpios = <&gpioc 6 GPIO_OUT_LOW>;
- label = "USB_C1_BC12_VBUS_ON";
- };
- ec_batt_pres_odl {
- gpios = <&gpioe 1 GPIO_INPUT>;
- label = "EC_BATT_PRES_ODL";
- };
- led_1_l {
- gpios = <&gpioc 4 GPIO_OUT_HIGH>;
- label = "LED_1_L";
- };
- led_2_l {
- gpios = <&gpioc 3 GPIO_OUT_HIGH>;
- label = "LED_2_L";
- };
- led_3_l {
- gpios = <&gpioc 2 GPIO_OUT_HIGH>;
- label = "LED_3_L";
- };
- ec_kb_bl_en {
- gpios = <&gpio8 6 GPIO_OUT_LOW>;
- label = "EC_KB_BL_EN";
- };
- edp_bklten_od {
- gpios = <&gpiod 3 GPIO_ODR_HIGH>;
- label = "EDP_BKLTEN_OD";
- };
- lid_accel_int_l {
- gpios = <&gpio5 0 GPIO_INPUT>;
- label = "LID_ACCEL_INT_L";
- };
- m2_sd_pln {
- gpios = <&gpioa 0 (GPIO_INPUT | GPIO_PULL_UP)>;
- label = "M2_SD_PLN";
- };
- imvp8_pe {
- gpios = <&gpioa 7 GPIO_INPUT>;
- label = "IMVP8_PE";
- };
- i2c0_scl {
- gpios = <&gpiob 5 GPIO_INPUT>;
- label = "I2C0_SCL";
- };
- i2c0_sda {
- gpios = <&gpiob 4 GPIO_INPUT>;
- label = "I2C0_SDA";
- };
- i2c1_scl {
- gpios = <&gpio9 0 GPIO_INPUT>;
- label = "I2C1_SCL";
- };
- i2c1_sda {
- gpios = <&gpio8 7 GPIO_INPUT>;
- label = "I2C1_SDA";
- };
- i2c2_scl {
- gpios = <&gpio9 2 GPIO_INPUT>;
- label = "I2C2_SCL";
- };
- i2c2_sda {
- gpios = <&gpio9 1 GPIO_INPUT>;
- label = "I2C2_SDA";
- };
- i2c3_scl {
- gpios = <&gpiod 1 GPIO_INPUT>;
- label = "I2C3_SCL";
- };
- i2c3_sda {
- gpios = <&gpiod 0 GPIO_INPUT>;
- label = "I2C3_SDA";
- };
- i2c5_scl {
- gpios = <&gpio3 3 GPIO_INPUT>;
- label = "I2C5_SCL";
- };
- i2c5_sda {
- gpios = <&gpio3 6 GPIO_INPUT>;
- label = "I2C5_SDA";
- };
- i2c7_scl {
- gpios = <&gpiob 3 GPIO_INPUT>;
- label = "I2C7_SCL";
- };
- i2c7_sda {
- gpios = <&gpiob 2 GPIO_INPUT>;
- label = "I2C7_SDA";
- };
- tp58 {
- gpios = <&gpio0 4 (GPIO_INPUT | GPIO_PULL_UP)>;
- label = "TP58";
- };
- tp73 {
- gpios = <&gpio8 2 (GPIO_INPUT | GPIO_PULL_UP)>;
- label = "TP73";
- };
- tp18 {
- gpios = <&gpioc 0 (GPIO_INPUT | GPIO_PULL_UP)>;
- label = "TP18";
- };
- tp54 {
- gpios = <&gpio4 0 (GPIO_INPUT | GPIO_PULL_UP)>;
- label = "TP54";
- };
- tp56 {
- gpios = <&gpio6 1 (GPIO_INPUT | GPIO_PULL_UP)>;
- label = "TP56";
- };
- tp57 {
- gpios = <&gpio8 1 (GPIO_INPUT | GPIO_PULL_UP)>;
- label = "TP57";
- };
- tp55 {
- gpios = <&gpio7 3 (GPIO_INPUT | GPIO_PULL_UP)>;
- label = "TP55";
- };
- tp59 {
- gpios = <&gpiob 0 (GPIO_INPUT | GPIO_PULL_UP)>;
- label = "TP59";
- };
- kbd_kso2 {
- gpios = <&gpio1 7 GPIO_OUT_LOW>;
- label = "KBD_KSO2";
- };
- };
-
- def-lvol-io-list {
- compatible = "nuvoton,npcx-lvolctrl-def";
- lvol-io-pads = <&lvol_iob4 &lvol_iob5 /* I2C_SDA0 & SCL0 */
- &lvol_io50>; /* GPIO50 */
- };
-};
-
-&uart1 {
- status = "okay";
- current-speed = <115200>;
- pinctrl-0 = <&altc_uart1_sl2>; /* Use UART1_SL2 ie. PIN64.65 */
-};
-
-&i2c0_0 {
- status = "okay";
- clock-frequency = <I2C_BITRATE_FAST>;
-};
-
-&i2c_ctrl0 {
- status = "okay";
-};
-
-&i2c1_0 {
- status = "okay";
- clock-frequency = <I2C_BITRATE_FAST_PLUS>;
-};
-
-&i2c_ctrl1 {
- status = "okay";
-};
-
-&i2c2_0 {
- status = "okay";
- clock-frequency = <I2C_BITRATE_FAST_PLUS>;
-};
-
-&i2c_ctrl2 {
- status = "okay";
-};
-
-&i2c3_0 {
- status = "okay";
- clock-frequency = <I2C_BITRATE_STANDARD>;
-};
-
-&i2c_ctrl3 {
- status = "okay";
-};
-
-&i2c5_0 {
- status = "okay";
- clock-frequency = <I2C_BITRATE_STANDARD>;
-};
-
-&i2c_ctrl5 {
- status = "okay";
-};
-
-&i2c7_0 {
- status = "okay";
- clock-frequency = <I2C_BITRATE_FAST>;
-};
-
-&i2c_ctrl7 {
- status = "okay";
-};
diff --git a/zephyr/boards/arm/kohaku/kohaku.yaml b/zephyr/boards/arm/kohaku/kohaku.yaml
deleted file mode 100644
index 48cc85e7df..0000000000
--- a/zephyr/boards/arm/kohaku/kohaku.yaml
+++ /dev/null
@@ -1,19 +0,0 @@
-#
-# Copyright (c) 2020 Google LLC.
-#
-# SPDX-License-Identifier: Apache-2.0
-#
-
-identifier: kohaku
-name: "Google Kohaku (Samsung Galaxy Chromebook) Embedded Controller"
-type: mcu
-arch: arm
-toolchain:
- - zephyr
- - gnuarmemb
-ram: 64
-flash: 512
-testing:
- ignore_tags:
- - net
- - bluetooth
diff --git a/zephyr/boards/arm/kohaku/kohaku_defconfig b/zephyr/boards/arm/kohaku/kohaku_defconfig
deleted file mode 100644
index eccf6da6ab..0000000000
--- a/zephyr/boards/arm/kohaku/kohaku_defconfig
+++ /dev/null
@@ -1,34 +0,0 @@
-# Copyright 2021 The Chromium OS Authors. All rights reserved.
-# Use of this source code is governed by a BSD-style license that can be
-# found in the LICENSE file.
-
-# Zephyr Kernel Configuration
-CONFIG_SOC_SERIES_NPCX7=y
-CONFIG_SOC_NPCX7M6FC=y
-
-# Platform Configuration
-CONFIG_BOARD_KOHAKU=y
-
-# Serial Drivers
-CONFIG_SERIAL=y
-CONFIG_UART_INTERRUPT_DRIVEN=y
-
-# Enable console
-CONFIG_CONSOLE=y
-CONFIG_UART_CONSOLE=y
-
-# Pinmux Driver
-CONFIG_PINMUX=y
-
-# GPIO Controller
-CONFIG_GPIO=y
-
-# Clock configuration
-CONFIG_CLOCK_CONTROL=y
-
-# WATCHDOG configuration
-CONFIG_WATCHDOG=y
-
-# BBRAM
-CONFIG_BBRAM=y
-CONFIG_BBRAM_NPCX=y
diff --git a/zephyr/firmware_builder.py b/zephyr/firmware_builder.py
index 22d882094b..78a202a56e 100755
--- a/zephyr/firmware_builder.py
+++ b/zephyr/firmware_builder.py
@@ -32,7 +32,6 @@ def build(opts):
f.write(json_format.MessageToJson(metrics))
targets = [
- 'projects/kohaku',
'projects/posix-ec',
'projects/volteer/volteer',
]
diff --git a/zephyr/projects/kohaku/BUILD.py b/zephyr/projects/kohaku/BUILD.py
deleted file mode 100644
index 1ad1637807..0000000000
--- a/zephyr/projects/kohaku/BUILD.py
+++ /dev/null
@@ -1,8 +0,0 @@
-# Copyright 2021 The Chromium OS Authors. All rights reserved.
-# Use of this source code is governed by a BSD-style license that can be
-# found in the LICENSE file.
-
-register_npcx_project(
- project_name="kohaku",
- zephyr_board="kohaku",
-)
diff --git a/zephyr/projects/kohaku/CMakeLists.txt b/zephyr/projects/kohaku/CMakeLists.txt
deleted file mode 100644
index 5a8c045731..0000000000
--- a/zephyr/projects/kohaku/CMakeLists.txt
+++ /dev/null
@@ -1,10 +0,0 @@
-# Copyright 2021 The Chromium OS Authors. All rights reserved.
-# Use of this source code is governed by a BSD-style license that can be
-# found in the LICENSE file.
-
-cmake_minimum_required(VERSION 3.13.1)
-
-find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE})
-project(kohaku)
-
-zephyr_library_include_directories(include)
diff --git a/zephyr/projects/kohaku/include/gpio_map.h b/zephyr/projects/kohaku/include/gpio_map.h
deleted file mode 100644
index 05fc93d5d5..0000000000
--- a/zephyr/projects/kohaku/include/gpio_map.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-#ifndef __ZEPHYR_GPIO_MAP_H
-#define __ZEPHYR_GPIO_MAP_H
-
-#include <devicetree.h>
-#include <gpio_signal.h>
-
-/* Cometlake power sequencing requires this definition */
-#define PP5000_PGOOD_POWER_SIGNAL_MASK POWER_SIGNAL_MASK(X86_PP5000_A_PGOOD)
-
-/*
- * Set EC_CROS_GPIO_INTERRUPTS to a space-separated list of GPIO_INT items.
- *
- * Each GPIO_INT requires three parameters:
- * gpio_signal - The enum gpio_signal for the interrupt gpio
- * interrupt_flags - The interrupt-related flags (e.g. GPIO_INT_EDGE_BOTH)
- * handler - The platform/ec interrupt handler.
- *
- * Ensure that this files includes all necessary headers to declare all
- * referenced handler functions.
- *
- * For example, one could use the follow definition:
- * #define EC_CROS_GPIO_INTERRUPTS \
- * GPIO_INT(NAMED_GPIO(h1_ec_pwr_btn_odl), GPIO_INT_EDGE_BOTH, button_print)
- */
-#define EC_CROS_GPIO_INTERRUPTS \
- GPIO_INT(NAMED_GPIO(lid_open), GPIO_INT_EDGE_BOTH, lid_interrupt) \
- GPIO_INT(NAMED_GPIO(power_button_l), GPIO_INT_EDGE_BOTH, \
- power_button_interrupt) \
- GPIO_INT(NAMED_GPIO(acok_od), GPIO_INT_EDGE_BOTH, extpower_interrupt) \
- GPIO_INT(NAMED_GPIO(slp_s0_l), GPIO_INT_EDGE_BOTH, \
- power_signal_interrupt) \
- GPIO_INT(NAMED_GPIO(slp_s3_l), GPIO_INT_EDGE_BOTH, \
- power_signal_interrupt) \
- GPIO_INT(NAMED_GPIO(slp_s4_l), GPIO_INT_EDGE_BOTH, \
- power_signal_interrupt) \
- GPIO_INT(NAMED_GPIO(pg_ec_rsmrst_l), GPIO_INT_EDGE_BOTH, \
- intel_x86_rsmrst_signal_interrupt) \
- GPIO_INT(NAMED_GPIO(pg_ec_all_sys_pwrgd), GPIO_INT_EDGE_BOTH, \
- power_signal_interrupt) \
- GPIO_INT(NAMED_GPIO(pp5000_a_pg_od), GPIO_INT_EDGE_BOTH, \
- power_signal_interrupt)
-
-#endif /* __ZEPHYR_GPIO_MAP_H */
diff --git a/zephyr/projects/kohaku/prj.conf b/zephyr/projects/kohaku/prj.conf
deleted file mode 100644
index 06e296c4ce..0000000000
--- a/zephyr/projects/kohaku/prj.conf
+++ /dev/null
@@ -1,37 +0,0 @@
-# Copyright 2021 The Chromium OS Authors. All rights reserved.
-# Use of this source code is governed by a BSD-style license that can be
-# found in the LICENSE file.
-
-CONFIG_CROS_EC=y
-CONFIG_PLATFORM_EC=y
-CONFIG_SHIMMED_TASKS=y
-
-CONFIG_ESPI=y
-CONFIG_I2C=y
-
-CONFIG_PLATFORM_EC_VBOOT_EFS2=n
-
-# Power sequencing
-CONFIG_AP=y
-CONFIG_AP_X86_INTEL_CML=y
-CONFIG_PLATFORM_EC_POWERSEQ=y
-CONFIG_PLATFORM_EC_POWERSEQ_S0IX=y
-
-# Power button
-CONFIG_PLATFORM_EC_POWER_BUTTON=y
-
-# External power
-CONFIG_PLATFORM_EC_EXTPOWER_GPIO=y
-
-# Lid switch
-CONFIG_PLATFORM_EC_LID_SWITCH=y
-
-CONFIG_PLATFORM_EC_KEYBOARD=n
-CONFIG_CROS_KB_RAW_NPCX=n
-
-# This is not yet supported
-CONFIG_PLATFORM_EC_ADC=n
-CONFIG_PLATFORM_EC_BOARD_VERSION_CBI=n
-CONFIG_PLATFORM_EC_BOARD_VERSION_GPIO=n
-
-CONFIG_SYSCON=y